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公开(公告)号:US20230343560A1
公开(公告)日:2023-10-26
申请号:US18217043
申请日:2023-06-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junyoung Oh , Jaeho Kwak , Boeun Jang , Seokyeon Hwang , Yongseok Seo , Sangsoo Kim , Seunghwan Kim , Jongho Park , Yongkwan Lee , Jongho Lee , Daewook Kim , Wonpil Lee , Changkyu Choi
IPC: H01J37/32 , C23C16/455
CPC classification number: H01J37/32449 , C23C16/45504 , C23C16/45589 , H01J37/32633 , H01J37/32357 , C23C16/45591 , C23C16/45502 , C23C16/4583
Abstract: A surface treatment apparatus and a surface treatment system having the same are disclosed. The surface treatment apparatus includes a process chamber in which the surface treatment process is conducted, a plasma generator for generating process radicals as a plasma state for the surface treatment process, the plasma generator being positioned outside of the process chamber and connected to the process chamber by a supply duct, a heat exchanger arranged on the supply duct and cooling down temperature of the process radicals passing through the supply duct and a flow controller controlling the process radicals to flow out of the process chamber. The flow controller is connected to a discharge duct through which the process radicals are discharged outside the process chamber. The plasma surface treatment process is conducted to the package structure having minute mounting gap without the damages to the IC chip and the board.
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公开(公告)号:US20210242190A1
公开(公告)日:2021-08-05
申请号:US17168706
申请日:2021-02-05
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junyoung Oh , Kyonghwan Koh , Sangsoo Kim , Seunghwan Kim , Jongho Park , Yongkwan Lee
IPC: H01L25/00 , H01L25/065 , H01L25/10 , H01L23/00 , H01L23/31 , H01L23/538 , H01L21/48 , H01L21/56 , H01L21/78
Abstract: A method of manufacturing a semiconductor package includes forming a laser reactive polymer layer on a substrate; mounting a semiconductor device on the substrate; irradiating at least a portion of the laser reactive polymer layer below the semiconductor device with a laser having a wavelength capable of penetrating through the semiconductor device on the substrate to modify the laser reactive polymer layer to have a hydrophilic functional group; and forming a first encapsulation material layer between the semiconductor device and the substrate.
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公开(公告)号:US20210320042A1
公开(公告)日:2021-10-14
申请号:US17098748
申请日:2020-11-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junyoung Oh , Hyunggil Baek , Seunghwan Kim , Jungjoo Kim , Jongho Park , Yongkwan Lee
IPC: H01L23/16 , H01L25/065 , H01L23/538 , H01L23/31 , H01L23/498
Abstract: A semiconductor package is provided. The semiconductor package includes: a first package substrate; a first semiconductor chip on the first package substrate; an interposer substrate including a lower surface facing the first package substrate, an upper surface opposite to the lower surface, and an upper conductive pad in the upper surface of the interposer substrate; a first dam structure on the upper surface of the interposer substrate and extending along an edge of the upper conductive pad; a first molding layer in contact with the lower and upper surfaces of the interposer substrate and with an outer wall of the first dam structure; and a conductive connector in contact with an inner wall of the at least one first dam structure and with the upper conductive pad.
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公开(公告)号:US11101243B2
公开(公告)日:2021-08-24
申请号:US16680657
申请日:2019-11-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jongho Park , Kyungsuk Oh , Hyunki Kim , Yongkwan Lee , Sangsoo Kim , Seungkon Mok , Junyoung Oh , Changyoung Yoo
IPC: H01L25/065 , H01L23/16 , H01L23/00 , H01L23/31 , H01L23/498
Abstract: A semiconductor package including a circuit substrate including a plurality of interconnections; a first chip on the circuit substrate; a second chip stacked on the first chip; a plurality of first pads on the circuit substrate, the plurality of first pads overlapping the first chip; a plurality of bumps between the circuit substrate and the first chip; a plurality of second pads on an edge portion of a first side of the circuit substrate, the plurality of second pads electrically connected to the second chip through a conductive wire; an underfill that fills a space between the circuit substrate and the first chip; and a first dam on the circuit substrate, the first dam overlapping the first chip. The first dam includes a conductive material and overlaps at least one of the plurality of interconnections.
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公开(公告)号:US20240105680A1
公开(公告)日:2024-03-28
申请号:US18198418
申请日:2023-05-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Junyoung Oh , Jumyong Park , Dongjoon Oh
IPC: H01L25/065 , H01L23/00 , H01L23/31 , H01L23/498
CPC classification number: H01L25/0657 , H01L23/3107 , H01L23/49827 , H01L24/08 , H01L24/16 , H01L24/48 , H01L24/73 , H01L2224/08146 , H01L2224/16225 , H01L2224/48147 , H01L2224/48149 , H01L2224/73257 , H01L2225/06506 , H01L2225/06517 , H01L2225/06541 , H01L2924/15321
Abstract: A semiconductor chip stack structure includes: a first semiconductor chip including a first semiconductor substrate, a first redistribution layer on the first semiconductor substrate and including a first redistribution pattern, and a first pad on an outermost side of the first redistribution layer; a second semiconductor chip including a second semiconductor substrate, a second redistribution layer on the second semiconductor substrate and including a second redistribution pattern, and a second pad on an outermost side of the second redistribution layer, and an area of the second semiconductor chip being smaller than an area of the first semiconductor chip; a first metal wire on the first semiconductor chip; a second metal wire on the second semiconductor chip; and a molding member on the first semiconductor chip and at least a portion of each of the second semiconductor chip, the first metal wire, and the second metal wire.
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公开(公告)号:US11927640B2
公开(公告)日:2024-03-12
申请号:US16973117
申请日:2019-06-05
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seongho Han , Bookeun Oh , Gilho Kim , Junyoung Oh , Sungun Wi , Jaeyeon Lee
IPC: G01R31/367 , G01R31/371 , G01R31/382 , G06N20/00
CPC classification number: G01R31/367 , G01R31/371 , G01R31/382 , G06N20/00
Abstract: An electronic device according to various embodiments of the present invention includes: a memory which stores one or more mapping parameters that indicate the correlation between a voltage change amount and the state of health (SOH) of the battery; and a processor, wherein the processor can be set to: detect that an external device for charging the battery is connected to the electronic device; charge the battery by using a charging current supplied from the external device; decide on at least one mapping parameter among the one or more mapping parameters on the basis of at least the charging current; check the voltage change amount of the battery while the battery is being charged; and acquire the SOH of the battery at least partially on the basis of the at least one mapping parameter and the voltage change amount.
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公开(公告)号:US11728142B2
公开(公告)日:2023-08-15
申请号:US16883392
申请日:2020-05-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junyoung Oh , Jaeho Kwak , Boeun Jang , Seokyeon Hwang , Yongseok Seo , Sangsoo Kim , Seunghwan Kim , Jongho Park , Yongkwan Lee , Jongho Lee , Daewook Kim , Wonpil Lee , Changkyu Choi
IPC: H01J37/32 , C23C16/455 , C23C16/458 , H01L21/673
CPC classification number: H01J37/32449 , C23C16/45504 , C23C16/45589 , H01J37/32633 , C23C16/4583 , C23C16/45502 , C23C16/45591 , H01J37/32357 , H01L21/67326
Abstract: A surface treatment apparatus and a surface treatment system having the same are disclosed. The surface treatment apparatus includes a process chamber in which the surface treatment process is conducted, a plasma generator for generating process radicals as a plasma state for the surface treatment process, the plasma generator being positioned outside of the process chamber and connected to the process chamber by a supply duct, a heat exchanger arranged on the supply duct and cooling down temperature of the process radicals passing through the supply duct and a flow controller controlling the process radicals to flow out of the process chamber. The flow controller is connected to a discharge duct through which the process radicals are discharged outside the process chamber. The plasma surface treatment process is conducted to the package structure having minute mounting gap without the damages to the IC chip and the board.
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公开(公告)号:US11742329B2
公开(公告)日:2023-08-29
申请号:US17399233
申请日:2021-08-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jongho Park , Kyungsuk Oh , Hyunki Kim , Yongkwan Lee , Sangsoo Kim , Seungkon Mok , Junyoung Oh , Changyoung Yoo
IPC: H01L23/16 , H01L25/065 , H01L23/00 , H01L23/31 , H01L23/498
CPC classification number: H01L25/0657 , H01L23/16 , H01L23/3185 , H01L23/49811 , H01L24/16 , H01L24/48 , H01L2224/16227 , H01L2224/48227
Abstract: A semiconductor package including a circuit substrate including a plurality of interconnections; a first chip on the circuit substrate; a second chip stacked on the first chip; a plurality of first pads on the circuit substrate, the plurality of first pads overlapping the first chip; a plurality of bumps between the circuit substrate and the first chip; a plurality of second pads on an edge portion of a first side of the circuit substrate, the plurality of second pads electrically connected to the second chip through a conductive wire; an underfill that fills a space between the circuit substrate and the first chip; and a first dam on the circuit substrate, the first dam overlapping the first chip. The first dam includes a conductive material and overlaps at least one of the plurality of interconnections.
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公开(公告)号:US11688656B2
公开(公告)日:2023-06-27
申请号:US17098748
申请日:2020-11-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junyoung Oh , Hyunggil Baek , Seunghwan Kim , Jungjoo Kim , Jongho Park , Yongkwan Lee
IPC: H01L23/16 , H01L25/065 , H01L23/498 , H01L23/31 , H01L23/538
CPC classification number: H01L23/16 , H01L23/3128 , H01L23/49811 , H01L23/5389 , H01L25/0657
Abstract: A semiconductor package is provided. The semiconductor package includes: a first package substrate; a first semiconductor chip on the first package substrate; an interposer substrate including a lower surface facing the first package substrate, an upper surface opposite to the lower surface, and an upper conductive pad in the upper surface of the interposer substrate; a first dam structure on the upper surface of the interposer substrate and extending along an edge of the upper conductive pad; a first molding layer in contact with the lower and upper surfaces of the interposer substrate and with an outer wall of the first dam structure; and a conductive connector in contact with an inner wall of the at least one first dam structure and with the upper conductive pad.
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公开(公告)号:US20210066046A1
公开(公告)日:2021-03-04
申请号:US16883392
申请日:2020-05-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junyoung Oh , Jaeho Kwak , Boeun Jang , Seokyeon Hwang , Yongseok Seo , Sangsoo Kim , Seunghwan Kim , Jongho Park , Yongkwan Lee , Jongho Lee , Daewook Kim , Wonpil Lee , Changkyu Choi
Abstract: A surface treatment apparatus and a surface treatment system having the same are disclosed. The surface treatment apparatus includes a process chamber in which the surface treatment process is conducted, a plasma generator for generating process radicals as a plasma state for the surface treatment process, the plasma generator being positioned outside of the process chamber and connected to the process chamber by a supply duct, a heat exchanger arranged on the supply duct and cooling down temperature of the process radicals passing through the supply duct and a flow controller controlling the process radicals to flow out of the process chamber. The flow controller is connected to a discharge duct through which the process radicals are discharged outside the process chamber. The plasma surface treatment process is conducted to the package structure having minute mounting gap without the damages to the IC chip and the board.
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