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    SEMICONDUCTOR PACKAGE
    2.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20220157780A1

    公开(公告)日：2022-05-19

    申请号：US17375511

    申请日：2021-07-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Ohguk KWON ,  Namhoon KIM ,  Hyoeun KIM ,  Sunkyoung SEO

    IPC: H01L25/065 ,  H01L23/538

    Abstract: A semiconductor package including a substrate; a first semiconductor chip on the substrate; a second semiconductor chip on the first semiconductor chip; and at least one connection terminal between the first semiconductor chip and the second semiconductor chip, wherein the first semiconductor chip includes a first semiconductor chip body; and at least one upper pad on a top surface of the first semiconductor chip body and in contact with the at least one connection terminal, the at least one upper pad includes a recess that is downwardly recessed from a top surface thereof, and a depth of the recess is less than a thickness of the at least one upper pad.

    SEMICONDUCTOR PACKAGE
    3.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20240404955A1

    公开(公告)日：2024-12-05

    申请号：US18800320

    申请日：2024-08-12

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sunkyoung SEO ,  Taehwan Kim ,  Hyunjung Song ,  Hyoeun Kim ,  Wonil Lee ,  Sanguk Han

    IPC: H01L23/538 ,  H01L23/00 ,  H01L23/367

    Abstract: A semiconductor package includes a redistribution structure, a lower semiconductor device arranged on the redistribution structure and including first through electrodes each having a first horizontal width, a connecting substrate arranged on the redistribution structure and spaced apart from the lower semiconductor device in a horizontal direction and including second through electrodes each having a second horizontal width greater than the first horizontal width, a first molding layer arranged on the redistribution structure and surrounding a side surface of the lower semiconductor device and a side surface of the connecting substrate, and an upper semiconductor device arranged on the lower semiconductor device and the connecting substrate, the upper semiconductor device electrically connected to the first and second through electrodes. A plane area of the upper semiconductor device is greater than a plane area of the lower semiconductor device, and the first horizontal width is about 1 μm to about 7 μm and the second horizontal width is about 10 μm to about 20 μm.

    SEMICONDUCTOR PACKAGES
    5.
    发明申请
    SEMICONDUCTOR PACKAGES 有权

    公开(公告)号：US20220130802A1

    公开(公告)日：2022-04-28

    申请号：US17571796

    申请日：2022-01-10

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Joonho JUN ,  Un-Byoung KANG ,  Sunkyoung SEO ,  Jongho LEE ,  Young Kun JEE

    IPC: H01L25/065 ,  H01L23/00

    Abstract: A semiconductor package may include first and second substrates, which are vertically stacked, a semiconductor device layer on a bottom surface of the second substrate to face a top surface of the first substrate, upper chip pads and an upper dummy pad on the top surface of the first substrate, penetration electrodes, which each penetrate the first substrate and are connected to separate, respective upper chip pads, lower chip pads on a bottom surface of the semiconductor device layer and electrically connected to separate, respective upper chip pads, and a lower dummy pad on the bottom surface of the semiconductor device layer and electrically isolated from the upper dummy pad. A distance between the upper and lower dummy pads in a horizontal direction that is parallel to the first substrate may be smaller than a diameter of the lower dummy pad.

    SEMICONDUCTOR PACKAGE
    7.
    发明公开
    SEMICONDUCTOR PACKAGE 审中-公开

    公开(公告)号：US20230170304A1

    公开(公告)日：2023-06-01

    申请号：US18095900

    申请日：2023-01-11

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sunkyoung SEO ,  Taehwan KIM ,  Hyunjung SONG ,  Hyoeun KIm ,  Wonil LEE ,  Sanguk HAN

    IPC: H01L23/538 ,  H01L23/00 ,  H01L23/367

    CPC classification number: H01L23/5384 ,  H01L24/14 ,  H01L23/367 ,  H01L23/5385 ,  H01L23/5386

    Abstract: A semiconductor package includes a package substrate, a lower semiconductor device arranged on the package substrate and including first through electrodes, first lower connection bumps arranged between the package substrate and the lower semiconductor device and electrically connecting the package substrate to the first through electrodes, a connecting substrate arranged on the package substrate and including second through electrodes, second lower connection bumps arranged between the package substrate and the connecting substrate and electrically connecting the package substrate to the second through electrodes, and an upper semiconductor device arranged on the lower semiconductor device and electrically connected to the first through electrodes and the second through electrodes.

    SEMICONDUCTOR PACKAGE
    8.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20220093543A1

    公开(公告)日：2022-03-24

    申请号：US17376616

    申请日：2021-07-15

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sunkyoung SEO ,  Teak Hoon LEE ,  Chajea JO

    IPC: H01L23/00 ,  H01L25/065 ,  H01L25/10

    Abstract: A semiconductor package includes a sequential stack of first and second semiconductor chips, and a first internal connection member that connects the first and second semiconductor chips to each other. The first semiconductor chip includes a first substrate that has a first top surface and a first bottom surface that are opposite to each other, and a first conductive pad on the first top surface. The second semiconductor chip includes a second substrate that has a second top surface and a second bottom surface that are opposite to each other, and a second conductive bump on the second bottom surface. The first internal connection member connects the first conductive pad to the second conductive bump. The first conductive pad has a first width in one direction. The second conductive bump has a second width in the one direction. The first width is smaller than the second width.

    SEMICONDUCTOR PACKAGE
    9.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20210193581A1

    公开(公告)日：2021-06-24

    申请号：US17003639

    申请日：2020-08-26

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sunkyoung SEO ,  Taehwan KIM ,  Hyunjung SONG ,  Hyoeun KIM ,  Wonil LEE ,  Sanguk HAN

    IPC: H01L23/538 ,  H01L23/00 ,  H01L23/367

    Abstract: A semiconductor package includes a package substrate, a lower semiconductor device arranged on the package substrate and including first through electrodes, first lower connection bumps arranged between the package substrate and the lower semiconductor device and electrically connecting the package substrate to the first through electrodes, a connecting substrate arranged on the package substrate and including second through electrodes, second lower connection bumps arranged between the package substrate and the connecting substrate and electrically connecting the package substrate to the second through electrodes, and an upper semiconductor device arranged on the lower semiconductor device and electrically connected to the first through electrodes and the second through electrodes.

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