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18 条记录 (耗时 0.016 秒)

    Process of producing thin film transistor array
    2.
    发明授权
    Process of producing thin film transistor array 失效
    制造薄膜晶体管阵列的工艺

    公开(公告)号：US5756371A

    公开(公告)日：1998-05-26

    申请号：US439444

    申请日：1995-05-11

    申请人： Seiji Ohno ,  Yukihisa Kusuda

    发明人： Seiji Ohno ,  Yukihisa Kusuda

    IPC分类号： G02F1/136 ,  G02F1/1368 ,  H01L21/28 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L29/78 ,  H01L29/786 ,  H01L21/00

    CPC分类号： H01L21/28008 ,  H01L27/1214 ,  H01L29/66765

    摘要： A process of manufacture has the steps of forming a metal film on the insulating substrate, applying photoresist on the metal film, exposing the photoresist to light to form a photoresist pattern by developing, etching the metal film with the photoresist pattern as an etching mask, forming an insulating film on the insulating substrate by making the insulating substrate with the photoresist pattern contact a liquid-phase deposition treatment liquid, and removing the photoresist pattern or the combination of the photoresist pattern and the insulating film thereon. Through these steps, the metal film for use as the metal wiring to effect contact with the electrode of the TFT is buried in the surface of the insulating substrate. Consequently, the resistance of the metal wiring can greatly be reduced. Thereby, it is produced a thin film transistor capable of rendering an large area, large capacity display possible and free from a difference in level.

    摘要翻译： 制造方法具有以下步骤：在绝缘基板上形成金属膜，在金属膜上施加光致抗蚀剂，通过显影，用光致抗蚀剂图案蚀刻金属膜作为蚀刻掩模，使光致抗蚀剂曝光以形成光致抗蚀剂图案， 通过使具有光致抗蚀剂图案的绝缘基板与液相沉积处理液接触，以及去除光致抗蚀剂图案或其上的光致抗蚀剂图案和绝缘膜的组合，在绝缘基板上形成绝缘膜。 通过这些步骤，用作与TFT的电极接触的金属布线的金属膜被埋在绝缘基板的表面中。 因此，可以大大降低金属布线的电阻。 由此，制造出能够呈现大面积，大容量显示成为可能而且没有电平差的薄膜晶体管。

    Self-scanning light-emitting device
    5.
    发明授权
    Self-scanning light-emitting device 有权
    自扫描发光装置

    公开(公告)号：US06531826B1

    公开(公告)日：2003-03-11

    申请号：US09830042

    申请日：2001-04-19

    申请人： Seiji Ohno ,  Yukihisa Kusuda ,  Harunobu Yoshida ,  Ken Yamashita

    发明人： Seiji Ohno ,  Yukihisa Kusuda ,  Harunobu Yoshida ,  Ken Yamashita

    IPC分类号： G09G310

    CPC分类号： B41J2/45 ,  B41J2002/453

    摘要： A self-scanning light-emitting device is provided in which the amounts of light of light-emitting elements may be corrected to make the distribution of amounts of light in a luminescent chip or among luminescent chips uniform. The correction for amounts of light of light-emitting elements may be carried out by regulating the time duration of on-state of a light-emitting element or the voltage of a write signal applied to a light-emitting element. According to the present invention, the distribution of amounts of light becomes uniform, so that the printing quality of a printer using such self-scanning light-emitting device is improved.

    摘要翻译： 提供了一种自扫描型发光装置，其中可以校正发光元件的光量，以使得发光芯片中或发光芯片之间的光量分布均匀。 可以通过调节发光元件的导通状态的持续时间或施加到发光元件的写入信号的电压来进行发光元件的光量的校正。 根据本发明，光量的分布变得均匀，从而提高了使用这种自扫描型发光装置的打印机的打印质量。

    Method for designing mask pattern of a self scanning light emitting device
    8.
    发明授权
    Method for designing mask pattern of a self scanning light emitting device 有权
    用于设计自扫描发光器件的掩模图案的方法

    公开(公告)号：US06496973B1

    公开(公告)日：2002-12-17

    申请号：US09831110

    申请日：2001-05-04

    申请人： Yukihisa Kusuda ,  Shunsuke Ohtsuka ,  Seiji Ohno

    发明人： Yukihisa Kusuda ,  Shunsuke Ohtsuka ,  Seiji Ohno

    IPC分类号： G06F1750

    CPC分类号： B41J2/45 ,  B41J2002/453 ,  H01L27/156

    摘要： A method of designing an optimum mask pattern for forming a metal line by an etching process, the metal line also effectively serving as a light-shielding layer, is provided. In this method, assuming that a mask pattern for forming a first metal line on a transparent insulating film has a width of “L1” overlapped with a first control electrode in a direction perpendicular to an array direction of of transfer elements, “L1” is selected so as to satisfy the following relation L1>(S+dS)+a, wherein “S” is the distance of side etching of the first metal line, “dS” is the dispersion of the distance of the side etching, and “a” is the misalignment of the mask pattern.

    摘要翻译： 提供了通过蚀刻工艺设计用于形成金属线的最佳掩模图案的方法，还有效地用作遮光层的金属线。 在该方法中，假设在透明绝缘膜上形成第一金属线的掩模图案在与传送元件的排列方向垂直的方向上与第一控制电极重叠的宽度为“L1”，“L1”为 选择为满足以下关系L1>（S + dS）+ a，其中“S”是第一金属线的侧蚀刻的距离，“dS”是侧蚀刻的距离的分散，“ a“是掩模图案的未对准。