公开(公告)号：US4553854A

公开(公告)日：1985-11-19

申请号：US558943

申请日：1983-12-07

申请人： Takeo Yamada ,  Naoki Harada ,  Kiyotaka Imai

发明人： Takeo Yamada ,  Naoki Harada ,  Kiyotaka Imai

IPC分类号： G01J5/00 ,  G01J5/52 ,  G01J5/10 ,  G01K13/06

CPC分类号： G01J5/52 ,  G01J5/0022

摘要： A method for continuously measuring the surface temperature of a heated steel strip, includes providing a flat reflecting plate so as to face a heated steel strip at an angle of inclination (.alpha.) with the steel strip. A radiation thermometer measures the amount of heat radiation energy which is emitted from an arbitrary point on the surface of the steel strip and comes directly into the radiation thermometer; and the thermometer also measures the total sum of heat radiation energy which (a) is emitted from a different point on the surface of the steel strip and comes into the radiation thermometer after having been reflected at least twice between the steel strip and the reflecting plate and, (b) is emitted from a final reflecting point, on the steel strip, of the heat radiation from said different point. The emissivity of the steel strip is computed on the basis of said total sum of the energies of the heat radiations and the amount of energy of the heat radiation from the arbitrary point; and the surface temperature of the steel strip is measured on the basis of the computed emissivity and the amount of energy of a reference heat radiation. The final angle of reflection (.theta.) from the steel strip of the heat radiation from said different point, and the angle of inclination (.alpha.) of the reflecting plate, are set at values which satisfy specific limits.

摘要翻译： 一种用于连续测量加热钢带的表面温度的方法包括提供平板反射板，以便以与钢带倾斜角度（α）相对的方式面对加热的钢带。 辐射温度计测量从钢带表面上的任意点发射的热辐射能量，并直接进入辐射温度计; 并且温度计还测量（a）从钢带表面上的不同点发射并在钢带和反射板之间反射至少两次之后进入辐射温度计的总辐射能量的总和 并且（b）从所述不同点的热辐射从钢带上的最终反射点发射。 根据热辐射能量的总和和来自任意点的热辐射能量的量，计算钢带的发射率; 并根据计算的发射率和参考热辐射的能量来测量钢带的表面温度。 来自所述不同点的热辐射的钢带的最终反射角（θ）和反射板的倾斜角（α）被设定为满足特定极限的值。

公开(公告)号：US4643587A

公开(公告)日：1987-02-17

申请号：US774820

申请日：1985-09-11

申请人： Eiichi Makabe ,  Naoki Harada ,  Kiyotaka Imai ,  Yoshiro Hosoda ,  Akira Kato

发明人： Eiichi Makabe ,  Naoki Harada ,  Kiyotaka Imai ,  Yoshiro Hosoda ,  Akira Kato

IPC分类号： G01J5/10 ,  G01J5/00 ,  G01J5/02 ,  G01K3/00

CPC分类号： G01J5/0022 ,  G01J5/004 ,  G01J2005/0048 ,  G01J2005/0081

摘要： The tip of an alloy rod in a vacuum chamber is remelted by radiation with an electron beam from an electron gun and the remelted droplets fall into a mold where they solidify. The droplets are scanned a plurality of times through a window provided on the vacuum chamber by an image pickup device as they pass its field of view. From the signal of the maximum level obtained during these scans, temperature data of the droplet is obtained by a temperature measurement control device.

摘要翻译： 合金棒在真空室中的尖端被来自电子枪的电子束的辐射重熔，并且再熔化的液滴落入其中固化的模具中。 当图像拾取装置通过其视场时，通过设置在真空室上的窗口多次扫描液滴。 从这些扫描期间获得的最大水平的信号，通过温度测量控制装置获得液滴的温度数据。

公开(公告)号：US07759744B2

公开(公告)日：2010-07-20

申请号：US11129440

申请日：2005-05-16

申请人： Naohiko Kimizuka ,  Kiyotaka Imai ,  Yuri Masuoka ,  Toshiyuki Iwamoto ,  Motofumi Saitoh ,  Hirohito Watanabe ,  Masayuki Terai

发明人： Naohiko Kimizuka ,  Kiyotaka Imai ,  Yuri Masuoka ,  Toshiyuki Iwamoto ,  Motofumi Saitoh ,  Hirohito Watanabe ,  Masayuki Terai

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119 ,  H01L27/01 ,  H01L27/12 ,  H01L31/0392 ,  H01L23/62 ,  H01L27/10 ,  H01L29/73

CPC分类号： H01L29/517 ,  H01L21/823857 ,  H01L29/4916 ,  H01L29/513 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device 100 includes a silicon substrate 102, an N-type MOSFET 118 including a first high dielectric constant film 111 and a polycrystalline silicon film 114 on the silicon substrate 102, and a P-type MOSFET 120 including a second high dielectric constant film 12 and a polycrystalline silicon film 114 juxtaposed to N-type MOSFET 118 on the silicon substrate 102. The second high dielectric constant film 112 is formed to have the film thickness thinner than the film thickness of the first high dielectric constant film 111. The first high dielectric constant film 111 and the second high dielectric constant film 112 contains one or more element(s) selected from Hf and Zr.

摘要翻译： 半导体器件100包括硅衬底102，在硅衬底102上包括第一高介电常数膜111和多晶硅膜114的N型MOSFET 118和包括第二高介电常数膜的P型MOSFET 120 12和与硅衬底102上的N型MOSFET 118并列的多晶硅膜114.第二高介电常数膜112形成为具有比第一高介电常数膜111的膜厚薄的膜厚度。第一 高介电常数膜111和第二高介电常数膜112含有选自Hf和Zr的一种或多种元素。

公开(公告)号：US07157322B2

公开(公告)日：2007-01-02

申请号：US09828862

申请日：2001-04-10

申请人： Kiyotaka Imai

发明人： Kiyotaka Imai

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L21/8238

CPC分类号： H01L21/26506 ,  H01L21/26513 ,  H01L21/823814 ,  H01L29/665

摘要： A semiconductor device including an NMOSFET which has an n-type source/drain main region containing arsenic and an n-type source/drain buffer region having arsenic and phosphorous of which a concentration is lower than that of the source/drain main region, and the concentration of the phosphorous in the source/drain buffer region is smaller than the concentration of the arsenic therein. The semiconductor device has a suppressed reverse short channel effect and reduced p-n junction leakage current. Further, the semiconductor device has a larger margin to a certain gate length and a specified threshold voltage to elevate a production yield.

摘要翻译： 包括具有含有砷的n型源极/漏极主区域和具有浓度低于源极/漏极主区域的砷和磷的n型源极/漏极缓冲区域的NMOSFET的半导体器件，以及 源/漏缓冲区中的磷的浓度小于其中的砷的浓度。 半导体器件具有抑制的反向短沟道效应和降低的p-n结漏电流。 此外，半导体器件具有较大的裕度以达到一定的栅极长度和特定的阈值电压以提高产量。

公开(公告)号：US06756676B2

公开(公告)日：2004-06-29

申请号：US09863737

申请日：2001-05-23

申请人： Noriaki Oda ,  Kiyotaka Imai

发明人： Noriaki Oda ,  Kiyotaka Imai

IPC分类号： H01L2348

CPC分类号： H01L21/02131 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/02321 ,  H01L21/02351 ,  H01L21/3105 ,  H01L21/31629 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a semiconductor device having a multilayer metallization structure using SiOF film as an interlayer insulating film, with respect to the interlayer insulating film, the fluorine concentration of SiOF films (11, 16) in a wiring gap portion in the same layer wiring is set to be higher than the fluorine concentration of SiOF films (12, 17) between the upper and lower layer wirings (8, 15; 15, 20).

摘要翻译： 在具有使用SiOF膜作为层间绝缘膜的多层金属化结构的半导体器件中，相对于层间绝缘膜，将同层布线的布线间隙部分中的SiOF膜（11,16）的氟浓度设定为 高于上层和下层布线（8,15; 15,20）之间的SiOF膜（12,17）的氟浓度。

公开(公告)号：US06664148B2

公开(公告)日：2003-12-16

申请号：US10073103

申请日：2002-02-12

申请人： Yoshiro Goto ,  Kiyotaka Imai ,  Naohiko Kimizuka

发明人： Yoshiro Goto ,  Kiyotaka Imai ,  Naohiko Kimizuka

IPC分类号： H01L2100

CPC分类号： H01L21/823462 ,  H03K19/0016

摘要： In an integrated circuit device, third transistors having the thickest gate insulation film are driven at high voltage and thus operate at high speed with minimal gate leak current. First transistors having the thinnest gate insulation film and second transistors which do not have the thinnest gate insulation film are driven at low voltage, the second transistors being driven at all times and the first transistors being halted as appropriate. The second transistors operate constantly at low speed and with minimal gate leak current, and the first transistors, which have significant gate leak current, operate at high speed while halting as appropriate.

公开(公告)号：US06489236B1

公开(公告)日：2002-12-03

申请号：US09692471

申请日：2000-10-20

申请人： Atsuki Ono ,  Kiyotaka Imai

发明人： Atsuki Ono ,  Kiyotaka Imai

IPC分类号： H01L2144

CPC分类号： H01L29/66492 ,  H01L21/26513 ,  H01L21/28518 ,  H01L21/324 ,  H01L29/665 ,  H01L29/6653

摘要： A method for forming a MOSFET includes the steps of forming cobalt silicide layers on a polysilicon gate electrode and source/drain regions, implanting impurity ions to form source/drain extensions and diffusing the impurity ions in the source/drain extensions The temperature of the heat treatment for diffusing step is lower than the maximum of the temperatures of the heat treatment for forming the silicide layer, whereby a MOSFET having excellent short-channel characteristics and a higher reliability can be obtained.

摘要翻译： 一种用于形成MOSFET的方法包括以下步骤：在多晶硅栅极电极和源极/漏极区域上形成钴硅化物层，注入杂质离子以形成源极/漏极延伸部分，并使杂质离子扩散到源极/漏极延伸部分中的温度 用于扩散步骤的处理低于用于形成硅化物层的热处理的温度的最大值，由此可以获得具有优异的短沟道特性和更高可靠性的MOSFET。

公开(公告)号：US06344675B1

公开(公告)日：2002-02-05

申请号：US09591506

申请日：2000-06-12

申请人： Kiyotaka Imai

发明人： Kiyotaka Imai

IPC分类号： H01L2900

CPC分类号： H01L29/66772 ,  H01L29/41733 ,  H01L29/41775 ,  H01L29/458 ,  H01L29/665 ,  H01L29/66659 ,  H01L29/7841 ,  H01L29/78609 ,  H01L29/78612 ,  H01L29/78624 ,  H01L29/78654

摘要： The present invention provides a source/drain structure formed in a semiconductor layer which has source and drain regions of a first conductivity type and a body portion of a second conductivity type disposed between said source and drain regions. The body portion is positioned under a gate insulation film over which a gate electrode is provided. The source region has a first low resistive region which is lower in electrical resistivity than said source region and said drain region having a second low resistive region which is lower in electrical resistively than said source region. For the first present invention, it is important that a distance of an inside edge portion of the first low resistive region from a first interface between the source region and the body portion is shorter than a distance of an inside portion of the second low resistive region from a second interface between the drain region and the body portion.

摘要翻译： 本发明提供一种形成在半导体层中的源极/漏极结构，其具有设置在所述源极和漏极区域之间的第一导电类型的源区和漏极区以及第二导电类型的主体部分。 主体部分位于设置有栅电极的栅极绝缘膜的下方。 源区具有电阻率低于所述源极区的第一低电阻区域，而所述漏极区域具有电阻比所述源极区域低的第二低电阻区域。 对于第一本发明，重要的是，第一低电阻区域的内边缘部分与源区域和主体部分之间的第一界面的距离短于第二低电阻区域的内部部分的距离 从漏极区域和主体部分之间的第二界面。

公开(公告)号：US5424228A

公开(公告)日：1995-06-13

申请号：US258999

申请日：1994-06-13

申请人： Kiyotaka Imai

发明人： Kiyotaka Imai

IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L29/732 ,  H01L21/265 ,  H01L21/20

CPC分类号： H01L29/66287

摘要： A semiconductor device manufacturing method according to the present invention includes forming an outer base region in a collector layer. The outer base region connects an intrinsic base layer and a base electrode so that base contact resistance between them is decreased.

摘要翻译： 根据本发明的半导体器件制造方法包括在集电体层中形成外部基极区域。 外部基极区域连接本征基极层和基极电极，使得它们之间的基极接触电阻降低。

公开(公告)号：US09153664B2

公开(公告)日：2015-10-06

申请号：US14285649

申请日：2014-05-23

申请人： Kiyotaka Imai ,  Young-Gwon Kim ,  Shigenobu Maeda ,  Soon-Chul Hwang

发明人： Kiyotaka Imai ,  Young-Gwon Kim ,  Shigenobu Maeda ,  Soon-Chul Hwang

IPC分类号： H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L21/02 ,  H01L21/266

CPC分类号： H01L29/66545 ,  H01L21/02667 ,  H01L21/266 ,  H01L21/823418 ,  H01L29/7833

摘要： A method for fabricating a semiconductor device is provided, which includes forming a screen layer on a substrate, the screen layer including a first portion doped with a first type impurity, forming a first undoped semiconductor layer on the screen layer, forming a gate structure on the first semiconductor layer, forming a first amorphous region on both sides of the gate structure in the first semiconductor layer, and re-crystallizing the first amorphous region through performing a first heat treatment of the first amorphous region.

摘要翻译： 提供一种制造半导体器件的方法，其包括在衬底上形成屏幕层，所述屏幕层包括掺杂有第一类型杂质的第一部分，在所述屏幕层上形成第一未掺杂半导体层，形成栅极结构 第一半导体层，在第一半导体层中的栅极结构的两侧上形成第一非晶区，并且通过进行第一非晶区的第一热处理，使第一非晶区再结晶。