公开(公告)号：US20200176265A1

公开(公告)日：2020-06-04

申请号：US16564851

申请日：2019-09-09

Applicant: TOKYO ELECTRON LIMITED

Inventor： Takayuki KATSUNUMA ,  Toru HISAMATSU ,  Shinya ISHIKAWA ,  Yoshihide KIHARA ,  Masanobu HONDA ,  Maju TOMURA ,  Sho KUMAKURA

IPC: H01L21/311 ,  H01L21/02

Abstract: A substrate processing method includes providing a processing target substrate having a pattern, forming a film on the substrate, forming a reaction layer on a surface layer of the substrate by plasma, and removing the reaction layer by applying energy to the substrate.

公开(公告)号：US20190259627A1

公开(公告)日：2019-08-22

申请号：US16347697

申请日：2017-11-02

Applicant: TOKYO ELECTRON LIMITED

Inventor： Masahiro TABATA ,  Toru HISAMATSU ,  Yoshihide KIHARA ,  Masanobu HONDA

IPC: H01L21/311 ,  H01J37/32

Abstract: In an embodiment, in the method for processing a workpiece including an etching target layer containing silicon oxide, a mask provided on the etching target layer, and an opening provided in the mask and exposing the etching target layer, according to the embodiment, the etching target layer is etched by removing the etching target layer for each atomic layer through repetitive execution of a sequence of generating plasma of a first processing gas containing nitrogen, forming a mixed layer containing ions included in the plasma on an atomic layer on an exposed surface of the etching target layer, generating plasma of a second processing gas containing fluorine, and removing the mixed layer by radicals included in the plasma. The plasma of the second processing gas contains the radicals that remove the mixed layer containing silicon nitride.

公开(公告)号：US20190131141A1

公开(公告)日：2019-05-02

申请号：US16089071

申请日：2017-03-27

Applicant: TOKYO ELECTRON LIMITED

Inventor： Yoshihide KIHARA ,  Toru HISAMATSU

IPC: H01L21/311

CPC classification number: H01L21/31144 ,  H01L21/02164 ,  H01L21/02219 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/0273 ,  H01L21/3105 ,  H01L21/31058 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32139

Abstract: In an embodiment, a wafer W includes a layer EL to be etched and a mask MK4 provided on the layer EL to be etched, and a method MT of an embodiment, the layer EL to be etched is etched by removing the layer EL to be etched for each atomic layer, by repeating sequence SQ3 including step ST9a of irradiating the mask MK4 with secondary electrons by generating plasma and applying a DC voltage to an upper electrode 30 of a parallel plate electrode, and covering the mask MK4 with silicon oxide compound, step ST9b of generating plasma of fluorocarbon-based gas and forming a mixed layer MX2 including radicals on an atomic layer of the layer EL to be etched, and ST9d of generating plasma of Ar gas and applying a bias voltage to remove the mixed layer MX2.

公开(公告)号：US20160099148A1

公开(公告)日：2016-04-07

申请号：US14863863

申请日：2015-09-24

Applicant: TOKYO ELECTRON LIMITED

Inventor： Yoshihide KIHARA ,  Toru HISAMATSU

IPC: H01L21/033 ,  H01L21/027 ,  H01L21/311

CPC classification number: H01L21/0338 ,  C23C16/401 ,  C23C16/402 ,  C23C16/45525 ,  C23C16/4554 ,  C23C16/45553 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/0276 ,  H01L21/0332 ,  H01L21/0335 ,  H01L21/0337 ,  H01L21/3086 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32139

Abstract: A controllability of a size of a mask can be improved in a multi-patterning method. A process of forming a silicon oxide film on a first mask and an antireflection film is performed. In this process, plasma of a first gas including a silicon halide gas and plasma of a second gas including an oxygen gas are alternately generated. Then, a region of the silicon oxide film is removed such that only a region along a side wall of the first mask is left, and then, the first mask is removed and the antireflection film and an organic film is etched.

Abstract translation: 在多图案化方法中可以提高掩模尺寸的可控性。 执行在第一掩模和抗反射膜上形成氧化硅膜的工艺。 在该过程中，交替地产生包括卤化硅气体的第一气体和包括氧气的第二气体的等离子体的等离子体。 然后，除去氧化硅膜的区域，使得仅留下沿着第一掩模的侧壁的区域，然后去除第一掩模，并且蚀刻抗反射膜和有机膜。

公开(公告)号：US20160099131A1

公开(公告)日：2016-04-07

申请号：US14866467

申请日：2015-09-25

Applicant: TOKYO ELECTRON LIMITED

Inventor： Yoshihide KIHARA ,  Toru HISAMATSU ,  Masanobu HONDA

IPC: H01J37/32

CPC classification number: H01J37/3244 ,  H01J37/32009 ,  H01J37/32532 ,  H01L21/02164 ,  H01L21/02258 ,  H01L21/02274 ,  H01L21/0337

Abstract: Disclosed is a method of processing a workpiece including a mask. The processing method includes: a first process of generating plasma of a first gas containing a silicon halide gas in a processing container of a plasma processing apparatus that accommodates a workpiece having a mask, to form a reactive precursor; a second process of purging a space in the processing container; a third process of generating plasma of a second gas containing oxygen gas in the processing container to form a silicon oxide film; and a fourth process of purging the space in the processing container. In the processing method, a sequence including the first to fourth processes is repeated.

Abstract translation: 公开了一种处理包括掩模的工件的方法。 该处理方法包括：在容纳具有掩模的工件的等离子体处理装置的处理容器中产生含有卤化硅气体的第一气体的等离子体的第一工艺，以形成反应性前体; 吹扫处理容器中的空间的第二过程; 在所述处理容器中产生含有氧气的第二气体的等离子体的第三工序，以形成氧化硅膜; 以及清洗处理容器中的空间的第四过程。 在处理方法中，重复包括第一至第四处理的序列。

公开(公告)号：US20140134848A1

公开(公告)日：2014-05-15

申请号：US14074020

申请日：2013-11-07

Applicant: TOKYO ELECTRON LIMITED

Inventor： Toru HISAMATSU ,  Masanobu HONDA ,  Yoshihide KIHARA

IPC: H01L21/311

CPC classification number: H01L21/31138 ,  H01J2237/334 ,  H01L21/0273 ,  H01L21/31144

Abstract: Disclosed is a plasma etching method which suppresses the narrowing of the line-width of the line formed by etching and maintain the height of a remaining photoresist. The plasma etching method includes a modification process and an etching process. The modification process modifies a photoresist having a predetermined pattern by plasma of HBr/Ar gas while applying a negative DC voltage to an upper electrode containing silicon disposed to face a target object in which an organic film and the photoresist are sequentially laminated. The etching process etches the organic film by plasma of a processing gas which contains a CF-based gas and a CHF-based gas.

Abstract translation: 公开了一种等离子体蚀刻方法，其抑制由蚀刻形成的线的线宽变窄并保持剩余的光致抗蚀剂的高度。 等离子体蚀刻方法包括修改处理和蚀刻处理。 修改方法通过HBr / Ar气体的等离子体修饰具有预定图案的光致抗蚀剂，同时向包含硅的上部电极施加负的DC电压，所述上部电极被设置为面向其中依次层叠有机膜和光致抗蚀剂的目标物体。 蚀刻工艺通过含有CF基气体和基于CHF的气体的处理气体的等离子体来蚀刻有机膜。

公开(公告)号：US20220375724A1

公开(公告)日：2022-11-24

申请号：US17749149

申请日：2022-05-20

Applicant: Tokyo Electron Limited

Inventor： Manabu OIE ,  Takanori BANSE ,  Toru HISAMATSU

IPC: H01J37/32

Abstract: A plasma processing method includes: (a) mounting a substrate including a first mask layer, which is a removal target, formed on a first layer with a metal-containing layer that is included therein to be partially exposed, on a stage disposed inside a processing container of the plasma processing apparatus; (b) supplying a process gas containing one or more of fluorocarbon gas and hydrofluorocarbon gas into the processing container; (c) supplying a first radio-frequency power that forms a plasma from the process gas into the processing container; (d) supplying a second radio-frequency power having a frequency lower than a frequency of the first radio-frequency power to the stage after a predetermined time is elapsed from stop of the first radio-frequency power; and (e) repeating (c) and (d).

公开(公告)号：US20200032395A1

公开(公告)日：2020-01-30

申请号：US16522890

申请日：2019-07-26

Applicant: TOKYO ELECTRON LIMITED

Inventor： Michiko NAKAYA ,  Toru HISAMATSU ,  Shinya ISHIKAWA ,  Sho KUMAKURA ,  Masanobu HONDA ,  Yoshihide KIHARA

IPC: C23C16/455 ,  H01J37/32 ,  H01L21/02 ,  H01L21/311 ,  C23C16/52

Abstract: A plasma processing method executed by a plasma processing apparatus in the present disclosure includes a first step and a second step. In the first step, the plasma processing apparatus forms a first film on the side walls of an opening in the processing target, the first film having different thicknesses along a spacing between pairs of side walls facing each other. In the second step, the plasma processing apparatus forms a second film by performing a film forming cycle once or more times after the first step, the second film having different thicknesses along the spacing between the pairs of side walls facing each other.

公开(公告)号：US20190378730A1

公开(公告)日：2019-12-12

申请号：US16214870

申请日：2018-12-10

Applicant: TOKYO ELECTRON LIMITED

Inventor： Masahiro TABATA ,  Toru HISAMATSU

IPC: H01L21/67 ,  C23C16/455 ,  C23C16/48 ,  C23C16/50 ,  C23C16/52 ,  C23C16/56

Abstract: A substrate processing method includes: selectively forming a first film on a surface of a substrate disposed in a processing container by plasma enhanced vapor deposition (PECVD); and forming a second film by atomic layer deposition (ALD) in a region of the substrate where the first film does not exist. The second film is formed by repeatedly performing a sequence including: forming a precursor layer on the surface of the substrate; purging an interior of the processing container after forming of the precursor; converting the precursor layer into the second film; and purging a space in the processing container after the converting. A plasma processing apparatus performing the method is also provided.

公开(公告)号：US20160314982A1

公开(公告)日：2016-10-27

申请号：US15137095

申请日：2016-04-25

Applicant: TOKYO ELECTRON LIMITED

Inventor： Yoshihide KIHARA ,  Tomoyuki OISHI ,  Toru HISAMATSU

IPC: H01L21/3065 ,  H01J37/32 ,  H01L21/033 ,  H01L21/67 ,  H01L21/311

CPC classification number: H01L21/3065 ,  C23C16/402 ,  C23C16/45534 ,  C23C16/45542 ,  H01J2237/334 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/67069

Abstract: A method for processing a target object by using a capacitively coupled plasma processing apparatus includes a first step of supplying a first gas containing a silicon-containing gas into the processing chamber where a target object is accommodated; a second step of generating a plasma of a rare gas in the processing chamber after executing the first step; a third step of generating a plasma of a second gas containing oxygen gas in the processing chamber after executing the second step; and a fourth step of generating a plasma of a rare gas in the processing chamber after executing the third step. A silicon oxide film is formed by repeatedly executing a sequence including the first step to the fourth step. A negative DC voltage is applied to the upper electrode in at least any one of the second step to the fourth step.

Abstract translation: 通过使用电容耦合的等离子体处理装置来处理目标物体的方法包括：将含有含硅气体的第一气体供给到容纳有目标物体的处理室中的第一步骤; 在执行第一步骤之后在处理室中产生稀有气体的等离子体的第二步骤; 在执行第二步骤之后，在处理室中产生含有氧气的第二气体的等离子体的第三步骤; 以及在执行第三步之后在处理室中产生稀有气体的等离子体的第四步骤。 通过重复执行包括第一步骤至第四步骤的序列来形成氧化硅膜。 在第二步骤至第四步骤中的至少任一步骤中，对上部电极施加负的直流电压。