公开(公告)号：US06207378B1

公开(公告)日：2001-03-27

申请号：US09136411

申请日：1998-08-19

申请人： Tsuneo Yamane ,  Hideo Nakano ,  Masashi Ouchi ,  Reiko Okumura ,  Satoshi Sekiguchi

发明人： Tsuneo Yamane ,  Hideo Nakano ,  Masashi Ouchi ,  Reiko Okumura ,  Satoshi Sekiguchi

IPC分类号： C12Q168

CPC分类号： C12P21/02 ,  C12Q1/686 ,  C12Q2527/143

摘要： A method for amplifying desired nucleic acid molecules by PCR which comprises the steps of isolating and purifying a group of nucleic acid molecules including desired nucleic acid molecules to be amplified, then carrying out PCR while establishing such a condition that the nucleic acid molecules capable of being amplified, except for primers, present in a PCR reaction solution are constituted by only the desired nucleic acid molecules and that the concentration of each primer used is limited to a level of not more than 100 nM; a method for producing a protein in a cell-free protein-synthesis system containing a cell-free extract which comprises using the nucleic acid of a single kind produced by the method described above and a method for establishing a protein library which comprises the steps of separately carrying out the method for amplifying desired nucleic acid molecules by PCR to obtain at least two kinds of nucleic acid molecules and separately carrying out the foregoing method for producing a protein using each of the at least two kinds of the amplified nucleic acids as a template to thus establish a protein library which comprises at least two kinds of proteins encoded by the resulting at least two nucleic acids respectively.

摘要翻译： 一种通过PCR扩增所需核酸分子的方法，该方法包括以下步骤：分离和纯化包括要扩增的所需核酸分子的核酸分子组，然后进行PCR，同时建立这样的条件，使得核酸分子能够 存在于PCR反应溶液中的引物除了扩增，仅由所需的核酸分子构成，使用的引物的浓度限制在不超过100nM的水平; 一种含有无细胞提取物的无细胞蛋白质合成系统中的蛋白质的制备方法，该方法包括使用通过上述方法制备的单一种核酸和建立蛋白质文库的方法，该方法包括以下步骤： 分别进行通过PCR扩增所需核酸分子的方法，以获得至少两种核酸分子，并且使用所述至少两种扩增的核酸作为模板分别进行上述制备蛋白质的方法 从而建立蛋白质文库，该蛋白质文库分别包含由所得至少两个核酸编码的至少两种蛋白质。

公开(公告)号：US20050156277A1

公开(公告)日：2005-07-21

申请号：US11011788

申请日：2004-12-15

申请人： Hideo Nakano ,  Shoji Yoshida ,  Masakatsu Maeda

发明人： Hideo Nakano ,  Shoji Yoshida ,  Masakatsu Maeda

IPC分类号： H01L21/822 ,  H01L23/522 ,  H01L23/528 ,  H01L27/04 ,  H01L27/06 ,  H01L27/08 ,  H01L29/94 ,  H01L29/00

CPC分类号： H01L29/94 ,  H01L23/5223 ,  H01L23/5286 ,  H01L24/48 ,  H01L24/49 ,  H01L27/0635 ,  H01L27/0811 ,  H01L2224/48091 ,  H01L2224/49 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： There is provided a semiconductor device, wherein a digital circuit region and an analog circuit region are located independently. A power supply wiring and a ground wiring are placed on the periphery of each circuit region and are connected to elements in each circuit region. A MOS capacitor is formed under the power supply wiring and the ground wiring. The terminals of the MOS capacity are connected to the power supply wiring and the ground wiring. Pads are placed in each circuit region surrounded by the power supply wiring, the ground wiring, and the MOS capacitor and are connected to the elements of each circuit region.

摘要翻译： 提供了一种半导体器件，其中数字电路区域和模拟电路区域独立地定位。 电源布线和接地布线被放置在每个电路区域的周边上并且连接到每个电路区域中的元件。 在电源布线和接地布线下面形成MOS电容器。 MOS电容的端子连接到电源线和接地线。 垫被放置在由电源布线，接地布线和MOS电容器包围的每个电路区域中，并且连接到每个电路区域的元件。

公开(公告)号：US20060176112A1

公开(公告)日：2006-08-10

申请号：US11391623

申请日：2006-03-28

申请人： Toshifumi Nakatani ,  Jyunji Itoh ,  Hideo Nakano

发明人： Toshifumi Nakatani ,  Jyunji Itoh ,  Hideo Nakano

IPC分类号： H03F1/14

CPC分类号： H03G1/0088

摘要： A variable gain amplifying apparatus has an amplifier, one or more first switching elements connected in parallel to the amplifier, and a phase shifter connected in series to the first switching element. The first switching element is enabled if the level of an input signal or an output signal is higher than a predetermined level, and the first switching element is disabled if the level of the input signal or the output signal is equal to or lower than the predetermined level. The amplifier does not operate when the first switching element is enabled, and the amplifier operates when the first switching element is disabled, and the amount of phase shift when the input signal is passed through the amplifier and phase shifter is substantially equal to the amount of phase shift when the input signal is passed through the first switching element.

摘要翻译： 可变增益放大装置具有放大器，与放大器并联连接的一个或多个第一开关元件和与第一开关元件串联连接的移相器。 如果输入信号或输出信号的电平高于预定电平，则第一开关元件被使能，并且如果输入信号或输出信号的电平等于或小于预定电平，则禁用第一开关元件 水平。 当第一开关元件使能时，放大器不工作，并且当第一开关元件被禁止时放大器工作，并且当输入信号通过放大器和移相器时，放大器的相移量基本上等于 当输入信号通过第一开关元件时，相移。

公开(公告)号：US06704027B2

公开(公告)日：2004-03-09

申请号：US09827172

申请日：2001-04-06

申请人： Hideo Nakano

发明人： Hideo Nakano

IPC分类号： G09G500

CPC分类号： H04M1/72555 ,  G09G5/00 ,  G09G5/397 ,  G09G2320/02 ,  G09G2340/0407 ,  G09G2340/12 ,  G09G2340/145 ,  H04L51/38

摘要： The present invention was made to solve the problem that users cannot check e-mail containing an attached image at a glance on conventional portable terminals. According to the present invention, there is provided a portable terminal that can display the e-mail text overlapped upon the attached image in an easy-to-see manner, and hence improve its usability as a mail receiving terminal. An image processing/output means converts the attached image data into image data of a size corresponding to that of the display area, and processes the attached image data to correct either of the brightness and contrast thereof. Further, a character setting/output means sets display color of the mail text according to the chromaticity of the image data so that the mail text will be overlapped upon and displayed with the set display color against the background of the processed image.

摘要翻译： 本发明是为了解决用户无法在常规便携式终端上一目了然地检查包含附着图像的电子邮件的问题的。 根据本发明，提供了一种便携式终端，其能够以易于看见的方式显示重叠在附加图像上的电子邮件文本，从而提高其作为邮件接收终端的可用性。图像处理/输出 意味着将附加的图像数据转换成与显示区域的尺寸相对应的尺寸的图像数据，并且处理附加的图像数据以校正其亮度和对比度。 此外，字符设置/输出装置根据图像数据的色度设置邮件文本的显示颜色，使得邮件文本将与处理的图像的背景相对应并且以设置的显示颜色显示。

公开(公告)号：US6151770A

公开(公告)日：2000-11-28

申请号：US197568

申请日：1998-11-23

申请人： Shunji Hashimoto ,  Mikio Taoka ,  Hideo Nakano

发明人： Shunji Hashimoto ,  Mikio Taoka ,  Hideo Nakano

IPC分类号： H01F27/02 ,  H01F27/29 ,  H01F41/10 ,  H01R43/00

CPC分类号： H01F41/10 ,  H01F27/027 ,  H01F27/292 ,  Y10T29/49071

摘要： A chip inductor of a sealed type having a square-shaped winding comprises a bobbin for winding, which has a square-shaped flange on its both ends, and a metal terminal sticking out from the outer side surface of each respective flange and each respective metal terminal being bent inside each respective flange upward so as to stick out to the upper side surface of the flange, also have the foregoing metal terminal further bent along the upper side surface of the flange, and further make insert-molding of the foregoing bent terminal possible to form the bobbin for winding.

摘要翻译： 具有方形绕组的密封型片式电感器包括绕组的绕线管，其两端具有方形凸缘，以及从每个相应凸缘的外侧表面伸出的金属端子和每个相应的金属 端子在每个相应的凸缘内向上弯曲以伸出到凸缘的上侧表面，还具有沿着凸缘的上侧表面进一步弯曲的上述金属端子，并进一步使上述弯曲端子的嵌件成型 可能形成绕线筒。

公开(公告)号：US6125426A

公开(公告)日：2000-09-26

申请号：US389060

申请日：1999-09-02

申请人： Masato Yoneda ,  Hiroshi Yoshizawa ,  Yoshihiro Ishida ,  Hideo Nakano

发明人： Masato Yoneda ,  Hiroshi Yoshizawa ,  Yoshihiro Ishida ,  Hideo Nakano

IPC分类号： G11C15/00 ,  G06F7/20

CPC分类号： G11C15/00

摘要： An associative memory device having a high speed and good performance is provided without degrading the simple design of a peripheral circuit of a conventional associative memory. The associative memory device has an N-bit first buffer and an M-bit second buffer in which W-bit data is stored through a data input port, detection device for detecting that the W-bit data is input to the first buffer k times or to the second buffer r times, a switch for alternately switching buffers in which the W-bit data is stored, and a search control for performing a search operation for a memory region by using data in the first or second buffer. By using data in the first or second buffer, during the search operation for the memory region of the associative memory, the W-bit data for the next search operation is input to the second or first buffer.

摘要翻译： 提供了具有高速度和良好性能的联想存储器件，而不降低常规关联存储器的外围电路的简单设计。 关联存储器件具有N位第一缓冲器和M位第二缓冲器，其中通过数据输入端口存储W位数据，检测装置用于检测W位数据被输入到第一缓冲器k次 或第二缓冲器r次，用于交替地切换存储有W位数据的缓冲器的开关和用于通过使用第一或第二缓冲器中的数据对存储器区域执行搜索操作的搜索控制。 通过在第一或第二缓冲器中使用数据，在关联存储器的存储器区域的搜索操作期间，用于下一个搜索操作的W位数据被输入到第二或第一缓冲器。

公开(公告)号：US07790468B2

公开(公告)日：2010-09-07

申请号：US11071369

申请日：2005-03-04

申请人： Chisato Yoshimura ,  Hideo Nakano ,  Takanori Ishishika

发明人： Chisato Yoshimura ,  Hideo Nakano ,  Takanori Ishishika

IPC分类号： G01N21/07 ,  G01N21/03 ,  B04B1/00

CPC分类号： B01L3/502753 ,  B01L3/502746 ,  B01L2300/0803 ,  B01L2300/0861 ,  B01L2300/0883 ,  B01L2400/0409 ,  B01L2400/086 ,  G01N21/07 ,  G01N21/6428 ,  G01N21/645 ,  G01N2021/6482 ,  Y10T436/111666

摘要： A test object receptacle, capable of measuring a test object in a wide range of concentrations with good accuracy and within a short time, contains a plurality of fine protruding portions inside grooves. The test object receptacle can fix antigens, antibodies and test objects faster than without the protruding portions. Furthermore, the protruding portions are so formed that the surface area thereof increases gradually to the downstream with respect to the movement direction of the test object in the grooves, the detection intensity (intensity of color development) of the test object is not saturated downstream of the grooves even when the test object has a high concentration. For this reason, the test object can be detected within a short time and the measurements can be conducted within a wide concentration range.

摘要翻译： 能够在很宽的浓度范围内在短时间内测量被测物体的测试对象插座在凹槽内包含多个细小突出部分。 测试对象容器可以比没有突出部分更快地固定抗原，抗体和测试对象。 此外，突出部形成为使得其表面积相对于槽中的被检体的移动方向逐渐向下游增加，检测对象的检测强度（显色强度）不饱和 甚至当测试对象具有高浓度时也是这样。 因此，能够在短时间内检测被测物，能够在宽的浓度范围内进行测定。

公开(公告)号：US07123073B2

公开(公告)日：2006-10-17

申请号：US10506078

申请日：2003-03-18

申请人： Toshifumi Nakatani ,  Jyunji Itoh ,  Hideo Nakano

发明人： Toshifumi Nakatani ,  Jyunji Itoh ,  Hideo Nakano

IPC分类号： G06F7/44

CPC分类号： H03F3/45089 ,  H03F1/34 ,  H03F2200/372 ,  H03F2203/45298 ,  H03F2203/45386 ,  H03F2203/45464 ,  H03F2203/45544 ,  H03F2203/45631

摘要： An amplifier circuit amplifies a differential signal supplied by a pair of input terminals. A phase controller circuit is placed between the emitters of two bipolar transistors and the ground. A feedback circuit is placed across the input and the output of the amplifier circuit for feeding the output of the amplifier circuit back to the input thereof. A phase change amount in the amplifier circuit is determined by the values of two inductors, whereas a phase change amount in the feedback circuit is determined by the values of two resistances and capacitors. The values of these devices are selected so that a phase difference between an input signal and a feedback signal is approximately 180 degrees in a range from the frequency of a fundamental wave of the input signal to the frequency of a second harmonic thereof.

摘要翻译： 放大器电路放大由一对输入端提供的差分信号。 相位控制器电路放置在两个双极晶体管的发射极和地之间。 反馈电路放置在放大器电路的输入和输出两端，用于将放大器电路的输出反馈回其输入端。 放大器电路中的相位变化量由两个电感器的值确定，而反馈电路中的相位变化量由两个电阻和电容器的值决定。 选择这些装置的值，使得在从输入信号的基波的频率到其二次谐波的频率的范围内，输入信号和反馈信号之间的相位差为大约180度。

公开(公告)号：US20050062540A1

公开(公告)日：2005-03-24

申请号：US10945987

申请日：2004-09-22

申请人： Toshifumi Nakatani ,  Jyunji Itoh ,  Hideo Nakano

发明人： Toshifumi Nakatani ,  Jyunji Itoh ,  Hideo Nakano

IPC分类号： H03F1/22 ,  H03F1/34 ,  H03F3/19 ,  H03F3/45

CPC分类号： H03F1/22 ,  H03F1/34 ,  H03F3/19 ,  H03F3/45089 ,  H03F2200/144 ,  H03F2200/372 ,  H03F2200/492 ,  H03F2203/45256 ,  H03F2203/45464

摘要： An amplifier circuit 10 amplifies a signal inputted from an input terminal P1. A first feedback circuit 20 is placed across an emitter of a bipolar transistor 101 and an input of the amplifier circuit 10. A second feedback circuit 30 is placed across the input and an output of the amplifier circuit 10 for feeding the output of the amplifier circuit 10 back to the input. A phase change amount in the feedback circuit is determined by the values of an inductor and a capacitor. The values of these elements are selected so that a phase of a signal in which fundamental waves included in two feedback signals are combined and a phase of a signal in which second harmonics included in the two feedback signals are combined are shifted by approximately 180 degrees from a phase of a fundamental wave of an input signal.

摘要翻译： 放大电路10放大从输入端子P1输入的信号。 第一反馈电路20放置在双极晶体管101的发射极和放大器电路10的输入端之间。第二反馈电路30放置在放大器电路10的输入端和放大器电路10的输出端，用于馈送放大器电路的输出 10回到输入。 反馈电路中的相位变化量由电感器和电容器的值决定。 选择这些元件的值，使得组合包括在两个反馈信号中的基波的信号的相位，并且将包括在两个反馈信号中的二次谐波组合的信号的相位偏离大约180度从 输入信号的基波的相位。

公开(公告)号：US5748065A

公开(公告)日：1998-05-05

申请号：US412562

申请日：1995-03-29

申请人： Shunji Hashimoto ,  Mikio Taoka ,  Hideo Nakano

发明人： Shunji Hashimoto ,  Mikio Taoka ,  Hideo Nakano

IPC分类号： H01F27/02 ,  H01F27/29 ,  H01F41/10 ,  H01F27/30

CPC分类号： H01F41/10 ,  H01F27/027 ,  H01F27/292 ,  Y10T29/49071

摘要： The object of the present invention is to provide a chip inductor structured for miniaturization, excellent mass-producibility and high reliability. The present invention discloses a chip inductor of a sealed type having a square-shaped winding comprising a bobbin a winding, which has a square-shaped flange on its both ends, and a metal terminal sticking out from the outer side surface of each respective flange with each respective metal terminal being bent inside each respective flange upward so as to stick out to the upper side surface of the flange, and also having the foregoing metal terminal further bent along the upper side surface of the flange, making it possible to insert mold the foregoing bent terminal forming the bobbin for a winding.

摘要翻译： 本发明的目的是提供一种用于小型化，优异的质量可生产性和高可靠性的芯片感应器。 本发明公开了一种密封型芯片电感器，其具有方形绕组，该方形绕组包括绕线管，绕组在其两端具有方形凸缘，以及金属端子从每个凸缘的外侧表面伸出 其中每个相应的金属端子在每个相应的凸缘内向上弯曲，以便伸出到凸缘的上侧表面，并且还具有沿着凸缘的上侧表面进一步弯曲的上述金属端子，使得可以将模具 上述弯曲端子形成用于绕组的线轴。