公开(公告)号：US20210235070A1

公开(公告)日：2021-07-29

申请号：US17231470

申请日：2021-04-15

Applicant: SOCIONEXT INC.

Inventor： Yuya SHIGENOBU ,  Masao KITAGAWA

IPC: H04N19/103

Abstract: An image encoding method includes, using an image as input, determining a first mode suited to encode the image in accordance with a first processing procedure; using the image as input, determining a second mode suited to encode the image in accordance with a second processing procedure; selecting one of first mode and the second mode as a final mode; encoding the image, using the final mode; and calculating a cost of using the second mode to encode the image. The second processing procedure is implemented by a reconfigurable circuit. In the selecting, the first mode is selected when the cost calculated in the calculating is higher than a first predetermined value, and the second mode is selected when the cost is lower than or equal to the first predetermined value.

公开(公告)号：US11063035B2

公开(公告)日：2021-07-13

申请号：US16803748

申请日：2020-02-27

Applicant: SOCIONEXT INC.

Inventor： Chika Ito ,  Isaya Sobue ,  Hidetoshi Tanaka

IPC: H01L27/02 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06

Abstract: An ESD protection circuit includes a first fin structure having fins of a first conductivity type and a second fin structure having fins of a second conductivity type, the second fin structure being opposed to the first fin structure. A first power interconnect connected with the first fin structure and a signal interconnect connected with the second fin structure are formed in a first interconnect layer, and a second power interconnect connected with the first power interconnect is formed in a second interconnect layer. The width occupied by the second fin structure is greater than that of the first fin structure, and the width of the signal interconnect is greater than that of the first power interconnect.

公开(公告)号：US20210211804A1

公开(公告)日：2021-07-08

申请号：US17210387

申请日：2021-03-23

Applicant: SOCIONEXT INC.

Inventor： Shuji MIYASAKA

IPC: H04R3/04 ,  H04R1/22

Abstract: An acoustic device that reproduces audio signals, the acoustic device including: a first acoustic reproducer that reproduces a signal corresponding to a treble range among the audio signals; a second acoustic reproducer that has a reproduction band from a cutoff frequency on a low frequency side to a cutoff frequency on a high frequency side, and reproduces a signal corresponding to a midrange lower than the treble range among the audio signals; and a harmonic overtone generator that generates a plurality of harmonic overtone signals for a fundamental tone signal corresponding to a specific frequency lower than the cutoff frequency on the low frequency side among the audio signals, wherein at least a part of the plurality of harmonic overtone signals is included in the reproduction band of the second acoustic reproducer.

公开(公告)号：US20210210468A1

公开(公告)日：2021-07-08

申请号：US17210743

申请日：2021-03-24

Applicant: SOCIONEXT INC.

Inventor： Hirotaka TAKENO ,  Wenzhen WANG ,  Atsushi OKAMOTO

IPC: H01L25/065 ,  H01L27/02

Abstract: A semiconductor device includes a first semiconductor chip, and a second semiconductor chip, wherein the first semiconductor chip includes a substrate including a first principal surface facing the second semiconductor chip and a second principal surface opposite to the first principal surface, a first power supply line and a second power supply line arranged on the second principal surface of the substrate, a power supply switch circuit arranged electrically between the first power supply line and the second power supply line, a first via arranged in the substrate to extend from the first power supply line to the first principal surface, and a second via arranged in the substrate to extend from the second power supply line to the first principal surface, wherein the second semiconductor chip includes a third power supply line connected to the first via, and a fourth power supply line connected to the second via.

公开(公告)号：US11056477B2

公开(公告)日：2021-07-06

申请号：US15931171

申请日：2020-05-13

Applicant: SOCIONEXT INC.

Inventor： Hiroyuki Shimbo

IPC: H01L27/02 ,  H01L29/66 ,  H01L23/528 ,  H01L21/8238 ,  H01L27/092 ,  H01L27/12 ,  H01L27/088

Abstract: Disclosed herein is a semiconductor integrated circuit device which includes a standard cell with a plurality of fins extending in a first direction and arranged in a second direction that is perpendicular to the first direction. An active fin of the fins forms part of an active transistor. A dummy fin of the fins is disposed between the active fin and an end of the standard cell.

公开(公告)号：US20210167782A1

公开(公告)日：2021-06-03

申请号：US17100350

申请日：2020-11-20

Applicant: SOCIONEXT INC.

Inventor： David Hany Gaied MIKHAEL ,  Bernd Hans GERMANN

IPC: H03L7/08 ,  H03L7/099 ,  H03C3/09 ,  H03B5/12

Abstract: Quadrature oscillator circuitry, comprising: a first differential oscillator circuit having differential output nodes and configured to generate a first pair of differential oscillator signals at those output nodes, respectively; a second differential oscillator circuit having differential output nodes and configured to generate a second pair of differential oscillator signals at those output nodes, respectively; and a cross-coupling circuit connected to cross-couple the first and second differential oscillator circuits. The cross-coupling circuit may comprise a pair of cross-coupled transistors.

公开(公告)号：US11025911B2

公开(公告)日：2021-06-01

申请号：US16890292

申请日：2020-06-02

Applicant: Socionext Inc.

Inventor： Yoichi Azukizawa

IPC: H04N19/122 ,  H04N19/167 ,  H04N19/176 ,  H04N19/625

Abstract: An encoding method for encoding an image using an inter-picture prediction includes determining a prediction block on which the inter-picture prediction is to be performed, partitioning the prediction block into a plurality of transform blocks by a partitioning method that partitions the prediction block, so that boundaries of the plurality of transform blocks are symmetrical with respect to a horizontal line passing a center of the prediction block and are symmetrical with respect to a vertical line passing the center of the prediction block, the plurality of transform blocks being rectangular, and determining, for each of the plurality of transform blocks, an orthogonal transformation type used for each of a vertical direction and a horizontal direction of a given transform block of the plurality of transform blocks based on a positional relation between the given transform block and the center of the prediction block.

公开(公告)号：US11003611B2

公开(公告)日：2021-05-11

申请号：US17037431

申请日：2020-09-29

Applicant: SOCIONEXT INC.

Inventor： Eiichi Nimoda ,  Seiji Goto ,  Satoru Okamoto ,  Shuichi Yamane ,  Yasuo Nishiguchi

IPC: G06F12/02 ,  G06F13/40 ,  G06F12/10 ,  G06F13/16 ,  G06F13/42

Abstract: A bridge apparatus includes slave circuits connected to each other via a bus. Each of the slave circuits is connected to one of master apparatuses, function as a slave for the master apparatus connected thereto, and performs communication in accordance with a protocol in which the number of masters in a system is restricted. Addresses of memories are respectively set in the slave circuits, and the memories are connected to the master apparatuses to which the slave circuits are respectively connected. When a first master apparatus accesses a memory connected to a second master apparatus by specifying a first address of the memory, the bridge apparatus causes the first master apparatus and the second master apparatus to communicate via a first slave circuit, a second slave circuit in which an address corresponding to the first address is set, and the bus, based on the addresses of the memories.

公开(公告)号：US20210133097A1

公开(公告)日：2021-05-06

申请号：US17145091

申请日：2021-01-08

Applicant: SOCIONEXT INC.

Inventor： Masataka MORI ,  Hironori TSUCHIYA

IPC: G06F12/02 ,  G06F11/07 ,  G06F11/34 ,  G06F13/36 ,  G06F13/42

Abstract: The signal collection method is a method that collects internal states indicated by signals in an electronic circuit device including a bus, the signal collection method including: storing the internal states with a fine resolution data storage by obtaining the internal states per a first period; per a second period, which is longer than the first period: obtaining a first data transfer amount, which is a data amount transferred by the bus, via a coarse resolution data storage; calculating a difference between a second data transfer amount and the first data transfer amount obtained in the obtaining, the second data transfer amount being calculated in advance and obtained from a cycle pattern generator; and determining whether the difference calculated in the calculating is within a predetermined range to stop storing in the storing when it is determined that the difference is not within the predetermined range.

公开(公告)号：US20210091981A1

公开(公告)日：2021-03-25

申请号：US17114284

申请日：2020-12-07

Applicant: SOCIONEXT INC.

Inventor： Taku HIRAMATSU ,  Shigeaki Kawai

IPC: H04L25/49 ,  H03K17/687 ,  H04B1/04 ,  H03K19/0175

Abstract: A signal output circuit includes: a driver circuit including a variable current source and configured to output a multilevel signal; a replica circuit having a circuit configuration equivalent to the driver circuit; and a control circuit configured to control a characteristic of the driver circuit, based on an output signal of the replica circuit, wherein the replica circuit includes: a first replica circuit part configured to output first output signals having signal levels of a first subset of a plurality of signal levels corresponding to the multilevel signal; and a second replica circuit part configured to output second output signals having signal levels of a second subset of the plurality of signal levels, and the control circuit is configured to control a characteristic of the variable current source, based the first output signals and the second output signals.