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    Recovery of data read from memory with unknown polarity
    91.
    发明授权
    Recovery of data read from memory with unknown polarity 有权

    公开(公告)号：US10475524B2

    公开(公告)日：2019-11-12

    申请号：US15265869

    申请日：2016-09-15

    Applicant: Apple Inc.

    Inventor： Assaf Shappir ,  Eyal Gurgi

    IPC: G11C29/52 ,  G11C11/22

    Abstract: A memory controller includes an interface and circuitry. The interface is configured to communicate with a memory device, which includes multiple memory cells, and which applies refreshing to the memory cells by repeatedly inverting data stored in the memory cells. The circuitry is configured to store input data in a group of the memory cells, to read the stored input data from the group of the memory cells to produce read data, the read data has an actual polarity that is either un-inverted or inverted due to the refreshing of the memory cells in the group, to analyze the read data for identifying the actual polarity of the read data, and to recover the input data from the read data based on the identified actual polarity.

    Recovering from Addressing Fault in a Non-Volatile Memory
    92.
    发明申请
    Recovering from Addressing Fault in a Non-Volatile Memory 审中-公开

    公开(公告)号：US20190034273A1

    公开(公告)日：2019-01-31

    申请号：US15658433

    申请日：2017-07-25

    Applicant: Apple Inc.

    Inventor： Charan Srinivasan ,  Eyal Gurgi

    IPC: G06F11/10 ,  G06F11/14

    CPC classification number: G06F11/1016 ,  G06F11/08 ,  G06F11/1076 ,  G06F11/1441 ,  G06F2201/805 ,  G06F2201/82

    Abstract: A storage system includes an interface and storage circuitry. The interface is configured to communicate with a plurality of memory cells coupled to multiple Bit Lines (BLs). The memory cells are programmed and read in sub-groups of multiple BLs, and the sub-groups correspond to respective addresses. The storage circuitry is configured to generate a sequence of addresses for reading memory cells that together store a data part and a pattern part containing a predefined pattern, via multiple respective sub-groups, to detect that the data part read from the memory cells is erroneous due to a fault that occurred in the sequence of addresses by identifying a mismatch between the pattern part read from the memory cells and the predefined pattern, and, in response to detecting the fault, to take a corrective measure to recover an error-free version of the data part.

    One-pass programming in a multi-level nonvolatile memory device with improved write amplification
    93.
    发明授权
    One-pass programming in a multi-level nonvolatile memory device with improved write amplification 有权

    公开(公告)号：US10191683B2

    公开(公告)日：2019-01-29

    申请号：US15728518

    申请日：2017-10-10

    Applicant: Apple Inc.

    Inventor： Charan Srinivasan ,  Eyal Gurgi

    IPC: G06F12/00 ,  G06F3/06 ,  G11C11/56 ,  G11C16/34

    Abstract: A method for data storage includes preparing first data having a first size for storage in a memory device that stores data having a nominal size larger than the first size, by programming a group of memory cells to multiple predefined levels using a one-pass program-and-verify scheme. The first data is combined with dummy data to produce first combined data having the nominal size, and is sent to the memory device for storage in the group. The dummy data is chosen to limit the levels to which the memory cells in the group are programmed to a partial subset of the predefined levels. In response to identifying second data to be stored in the group, the second data is combined with the first data to obtain second combined data having the nominal size, and is sent to the memory device for storage, in place, in the group.

    Mitigation of retention drift in charge-trap non-volatile memory
    97.
    发明授权
    Mitigation of retention drift in charge-trap non-volatile memory 有权
    减少电荷陷阱非易失性存储器中的滞留漂移

    公开(公告)号：US09490023B2

    公开(公告)日：2016-11-08

    申请号：US14219315

    申请日：2014-03-19

    Applicant: Apple Inc.

    Inventor： Naftali Sommer ,  Avraham Poza Meir ,  Yoav Kasorla ,  Eyal Gurgi

    IPC: G11C16/34 ,  G11C7/02 ,  G11C7/04

    CPC classification number: G11C16/3404 ,  G11C7/02 ,  G11C7/04

    Abstract: A method includes storing data values in a group of memory cells that share a common isolating layer, by producing quantities of electrical charge representative of the data values at respective regions of the common isolating layer that are associated with the memory cells. A function, which relates a drift of the electrical charge in a given memory cell in the group to the data values stored in one or more other memory cells in the group, is estimated. The drift is compensated for using the estimated function.

    Abstract translation: 一种方法包括通过产生表示与存储器单元相关联的公共隔离层的各个区域处的数据值的电荷量来将数据值存储在共享公共隔离层的一组存储器单元中。 估计将组中的给定存储单元中的电荷的漂移与存储在组中的一个或多个其他存储单元中的数据值相关联的功能。 使用估计功能补偿漂移。

    Mitigation of data retention drift by programming neighboring memory cells
    99.
    发明授权
    Mitigation of data retention drift by programming neighboring memory cells 有权
    通过编程相邻的存储单元减少数据保留漂移

    公开(公告)号：US09401212B2

    公开(公告)日：2016-07-26

    申请号：US14822992

    申请日：2015-08-11

    Applicant: Apple Inc.

    Inventor： Avraham Poza Meir ,  Eyal Gurgi ,  Naftali Sommer ,  Yoav Kasorla

    IPC: G11C16/10 ,  G11C16/04 ,  G11C11/56 ,  G11C16/34

    CPC classification number: G11C16/10 ,  G11C11/5671 ,  G11C16/0466 ,  G11C16/3418 ,  G11C16/3427

    Abstract: A method includes, in a plurality of memory cells that share a common isolation layer and store in the common isolation layer quantities of electrical charge representative of data values, assigning a first group of the memory cells for data storage, and assigning a second group of the memory cells for protecting the electrical charge stored in the first group from retention drift. Data is stored in the memory cells of the first group. Protective quantities of the electrical charge that protect from the retention drift in the memory cells of the first group are stored in the memory cells of the second group.

    Abstract translation: 一种方法包括在共享公共隔离层并存储在公共隔离层中的代表数据值的电荷量的多个存储器单元中，分配用于数据存储的第一组存储器单元，以及分配第二组 用于保护存储在第一组中的电荷的存储单元不保持漂移。 数据存储在第一组的存储单元中。 防止第一组的存储单元中保持漂移的电荷的保护量被存储在第二组的存储单元中。

    ORDERING OF PARALLEL DATA STORAGE BASED ON DIE PROGRAMMING DURATIONS
    100.
    发明申请
    ORDERING OF PARALLEL DATA STORAGE BASED ON DIE PROGRAMMING DURATIONS 有权
    基于DIE编程的平行数据存储订单

    公开(公告)号：US20160196065A1

    公开(公告)日：2016-07-07

    申请号：US14588947

    申请日：2015-01-04

    Applicant: APPLE INC.

    Inventor： Shai Ojalvo ,  Eyal Gurgi ,  Yoav Kasorla

    IPC: G06F3/06

    CPC classification number: G06F3/061 ,  G06F3/064 ,  G06F3/0688 ,  G06F12/0246 ,  G06F2212/1016 ,  G06F2212/7207 ,  G06F2212/7208

    Abstract: A method includes, in a memory system that includes multiple memory units, holding information indicative of respective programming durations of the memory units. Data is stored in a stripe that includes a plurality of the memory units, by programming the memory units in the stripe in an order that is set based on the information.

    Abstract translation: 一种方法包括在包括多个存储器单元的存储器系统中，保存指示存储器单元的相应编程持续时间的信息。 通过以基于该信息设置的顺序对条带中的存储器单元进行编程，将数据存储在包括多个存储器单元的条带中。

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