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109 条记录 (耗时 0.042 秒)

    Method of producing device quality (Al)InGaP alloys on lattice-mismatched substrates
    91.
    发明授权
    Method of producing device quality (Al)InGaP alloys on lattice-mismatched substrates 失效
    在晶格失配衬底上生产器件质量（Al）InGaP合金的方法

    公开(公告)号：US06805744B2

    公开(公告)日：2004-10-19

    申请号：US10023047

    申请日：2001-12-13

    申请人： Andrew Y. Kim ,  Eugene A. Fitzgerald

    发明人： Andrew Y. Kim ,  Eugene A. Fitzgerald

    IPC分类号： C30B2506

    CPC分类号： H01L21/02392 ,  C30B25/02 ,  C30B29/40 ,  H01L21/02395 ,  H01L21/02461 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/02543 ,  H01L21/02576 ,  H01L21/0262 ,  H01L31/1844 ,  H01L33/0062 ,  H01L33/0066 ,  H01L33/30 ,  Y02E10/544

    摘要： A method of forming a semiconductor structure including providing a single crystal semiconductor substrate of GaP, and fabricating a graded composition buffer including a plurality of epitaxial semiconductor Inx(AlyGa1−y)1−xP alloy layers. The buffer includes a first alloy layer immediately contacting the substrate having a lattice constant that is nearly identical to that of the substrate, subsequent alloy layers having lattice constants that differ from adjacent layers by less than 1%, and a final alloy layer having a lattice constant that is substantially different from the substrate. The growth temperature of the final alloy layer is at least 20° C. less than the growth temperature of the first alloy layer.

    摘要翻译： 一种形成半导体结构的方法，包括提供GaP的单晶半导体衬底，以及制造包括多个外延半导体In x（Al y Ga 1-y）1-xP合金层的渐变组合物缓冲层。 缓冲器包括立即接触基板的第一合金层，其具有与基板的晶格常数几乎相同的晶格常数，随后的合金层具有不同于相邻层的晶格常数小于1％，以及具有晶格的最终合金层 基本上不同于基底的常数。 最终合金层的生长温度比第一合金层的生长温度低至少20℃。

    Semiconductor substrate structure
    92.
    发明授权
    Semiconductor substrate structure 失效

    公开(公告)号：US06737670B2

    公开(公告)日：2004-05-18

    申请号：US10384160

    申请日：2003-03-07

    申请人： Zhi-Yuan Cheng ,  Eugene A. Fitzgerald ,  Dimitri A. Antoniadis ,  Judy L. Hoyt

    发明人： Zhi-Yuan Cheng ,  Eugene A. Fitzgerald ,  Dimitri A. Antoniadis ,  Judy L. Hoyt

    IPC分类号： H01L2906

    CPC分类号： H01L21/76254 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/0251 ,  H01L21/02521 ,  H01L21/02532 ,  H01L21/02546 ,  Y10S438/933

    摘要： A process for producing monocrystalline semiconductor layers. In an exemplary embodiment, a graded Si1−xGex (x increases from 0 to y) is deposited on a first silicon substrate, followed by deposition of a relaxed Si1−yGey layer, a thin strained Si1−zGez layer and another relaxed Si1−yGey layer. Hydrogen ions are then introduced into the strained SizGez layer. The relaxed Si1−yGey layer is bonded to a second oxidized substrate. An annealing treatment splits the bonded pair at the strained Si layer, such that the second relaxed Si1−yGey layer remains on the second substrate. In another exemplary embodiment, a graded Si1−xGex is deposited on a first silicon substrate, where the Ge concentration x is increased from 0 to 1. Then a relaxed GaAs layer is deposited on the relaxed Ge buffer. As the lattice constant of GaAs is close to that of Ge, GaAs has high quality with limited dislocation defects. Hydrogen ions are introduced into the relaxed GaAs layer at the selected depth. The relaxed GaAs layer is bonded to a second oxidized substrate. An annealing treatment splits the bonded pair at the hydrogen ion rich layer, such that the upper portion of relaxed GaAs layer remains on the second substrate.

    Formation of planar strained layers
    93.
    发明授权
    Formation of planar strained layers 失效
    平面应变层的形成

    公开(公告)号：US06730551B2

    公开(公告)日：2004-05-04

    申请号：US10211126

    申请日：2002-08-02

    申请人： Minjoo L. Lee ,  Christopher W. Leitz ,  Eugene A. Fitzgerald

    发明人： Minjoo L. Lee ,  Christopher W. Leitz ,  Eugene A. Fitzgerald

    IPC分类号： H01L21337

    CPC分类号： H01L29/1054 ,  H01L21/823807 ,  H01L27/092 ,  H01L29/78 ,  H01L29/802

    摘要： A structure and a method for forming the structure, the method including forming a compressively strained semiconductor layer, the compressively strained layer having a strain greater than or equal to 0.25%. A tensilely strained semiconductor layer is formed over the compressively strained layer. The compressively strained layer is substantially planar, having a surface roughness characterized in (i) having an average wavelength greater than an average wavelength of a carrier in the compressively strained layer or (ii) having an average height less than 10 nm.

    摘要翻译： 一种用于形成结构的结构和方法，所述方法包括形成压缩应变半导体层，所述压应变层具有大于或等于0.25％的应变。 在压缩应变层上形成拉伸应变半导体层。 压缩应变层基本上是平面的，具有表面粗糙度，其特征在于：（i）平均波长大于压缩应变层中的载体的平均波长或（ii）平均高度小于10nm。

    Strained silicon-on-silicon by wafer bonding and layer transfer
    98.
    发明授权
    Strained silicon-on-silicon by wafer bonding and layer transfer 有权
    通过晶片接合和层转移来应变硅上硅

    公开(公告)号：US07495266B2

    公开(公告)日：2009-02-24

    申请号：US10869814

    申请日：2004-06-16

    申请人： David M. Isaacson ,  Eugene A. Fitzgerald

    发明人： David M. Isaacson ,  Eugene A. Fitzgerald

    IPC分类号： H01L31/0328

    CPC分类号： H01L21/187

    摘要： A semiconductor-based structure includes first and second layers bonded directly to each other at an interface. Parallel to the interface, the lattice spacing of the second layer is different than the lattice spacing of the first layer. The first and second layers are each formed of essentially the same semiconductor. A method for making a semiconductor-based structure includes providing first and second layers that are formed of essentially the same semiconductor. The first and second layers have, respectively, first and second surfaces. The second layer has a different lattice spacing parallel to the second surface than the lattice spacing of the first layer parallel to the first surface. The method includes contacting the first and second surfaces, and annealing to promote direct atomic bonding between the first and second layers.

    摘要翻译： 基于半导体的结构包括在界面处彼此直接键合的第一和第二层。 平行于界面，第二层的晶格间距不同于第一层的晶格间距。 第一层和第二层各自由基本上相同的半导体形成。 制造基于半导体的结构的方法包括提供由基本上相同的半导体形成的第一和第二层。 第一和第二层分别具有第一和第二表面。 第二层具有与第一层平行于第一表面的晶格间隔平行于第二表面的不同晶格间距。 该方法包括使第一和第二表面接触，退火以促进第一和第二层之间的直接原子结合。

    Method of fabricating a semiconductor structure that includes transferring one or more material layers to a substrate and smoothing an exposed surface of at least one of the material layers
    99.
    发明授权
    Method of fabricating a semiconductor structure that includes transferring one or more material layers to a substrate and smoothing an exposed surface of at least one of the material layers 有权
    制造半导体结构的方法，其包括将一个或多个材料层转移到基底并使至少一个材料层的暴露表面平滑

    公开(公告)号：US07348259B2

    公开(公告)日：2008-03-25

    申请号：US11028248

    申请日：2005-01-03

    申请人： Zhiyuan Cheng ,  Eugene A. Fitzgerald ,  Dimitri A. Antoniadis

    发明人： Zhiyuan Cheng ,  Eugene A. Fitzgerald ,  Dimitri A. Antoniadis

    IPC分类号： H01L21/461

    CPC分类号： H01L21/76256 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/02664 ,  H01L21/30608

    摘要： A method of fabricating a semiconductor structure. According to one aspect of the invention, on a first semiconductor substrate, a first compositionally graded Si1-xGex buffer is deposited where the Ge composition x is increasing from about zero to a value less than about 20%. Then a first etch-stop Si1-yGey layer is deposited where the Ge composition y is larger than about 20% so that the layer is an effective etch-stop. A second etch-stop layer of strained Si is then grown. The deposited layer is bonded to a second substrate. After that the first substrate is removed to release said first etch-stop S1-yGey layer. The remaining structure is then removed in another step to release the second etch-stop layer. According to another aspect of the invention, a semiconductor structure is provided. The structure has a layer in which semiconductor devices are to be formed. The semiconductor structure includes a substrate, an insulating layer, a relaxed SiGe layer where the Ge composition is larger than approximately 15%, and a device layer selected from a group consisting of, but not limited to, strained-Si, relaxed Si1-yGey layer, strained Si1-zGez layer, Ge, GaAs, III-V materials, and II-VI materials, where Ge compositions y and z are values between 0 and 1.

    摘要翻译： 一种制造半导体结构的方法。 根据本发明的一个方面，在第一半导体衬底上沉积第一组分梯度的Si 1-x N Ge x N x缓冲层，其中Ge组合物x从约 零到小于约20％的值。 然后沉积第一蚀刻停止Si 1-y Ge层，其中Ge组分y大于约20％，使得该层是有效的蚀刻停止 。 然后生长第二蚀刻停止层的应变Si。 沉积层结合到第二衬底。 之后，移除第一衬底以释放所述第一蚀刻停止层1-y层。 然后在另一步骤中除去剩余的结构以释放第二蚀刻停止层。 根据本发明的另一方面，提供一种半导体结构。 该结构具有要形成半导体器件的层。 半导体结构包括衬底，绝缘层，Ge组分大于约15％的弛豫SiGe层，以及选自但不限于应变Si，弛豫Si