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786 条记录 (耗时 0.036 秒)

    CMOS devices having dual high-mobility channels
    92.
    发明授权
    CMOS devices having dual high-mobility channels 有权
    CMOS器件具有双重高移动性通道

    公开(公告)号：US07993998B2

    公开(公告)日：2011-08-09

    申请号：US12043588

    申请日：2008-03-06

    申请人： Ding-Yuan Chen ,  Chen-Hua Yu

    发明人： Ding-Yuan Chen ,  Chen-Hua Yu

    IPC分类号： H01L21/8238

    CPC分类号： H01L27/092 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7848

    摘要： A method for forming a semiconductor structure includes providing a semiconductor substrate including a first region and a second region; and forming a first and a second metal-oxide-semiconductor (MOS) device. The step of forming the first MOS device includes forming a first silicon germanium layer over the first region of the semiconductor substrate; forming a silicon layer over the first silicon germanium layer; forming a first gate dielectric layer over the silicon layer; and patterning the first gate dielectric layer to form a first gate dielectric. The step of forming the second MOS device includes forming a second silicon germanium layer over the second region of the semiconductor substrate; forming a second gate dielectric layer over the second silicon germanium layer with no substantially pure silicon layer therebetween; and patterning the second gate dielectric layer to form a second gate dielectric.

    摘要翻译： 一种形成半导体结构的方法包括：提供包括第一区域和第二区域的半导体衬底; 以及形成第一和第二金属氧化物半导体（MOS）器件。 形成第一MOS器件的步骤包括在半导体衬底的第一区域上形成第一硅锗层; 在所述第一硅锗层上形成硅层; 在所述硅层上形成第一栅介质层; 以及图案化所述第一栅极介电层以形成第一栅极电介质。 形成第二MOS器件的步骤包括在半导体衬底的第二区域上形成第二硅锗层; 在第二硅锗层上形成第二栅极电介质层，其间没有基本上纯的硅层; 以及图案化所述第二栅极介电层以形成第二栅极电介质。

    Omnidirectional Reflector
    94.
    发明申请
    Omnidirectional Reflector 有权
    全向反射器

    公开(公告)号：US20100038659A1

    公开(公告)日：2010-02-18

    申请号：US12202167

    申请日：2008-08-29

    申请人： Ding-Yuan Chen ,  Chen-Hua Yu ,  Wen-Chih Chiou

    发明人： Ding-Yuan Chen ,  Chen-Hua Yu ,  Wen-Chih Chiou

    IPC分类号： H01L33/00

    CPC分类号： H01L33/60 ,  H01L33/0079 ,  H01L33/10 ,  H01L33/46 ,  H01L2933/0083

    摘要： A system and method for manufacturing an LED is provided. A preferred embodiment includes a substrate with a distributed Bragg reflector formed over the substrate. A photonic crystal layer is formed over the distributed Bragg reflector to collimate the light that impinges upon the distributed Bragg reflector, thereby increasing the efficiency of the distributed Bragg reflector. A first contact layer, an active layer, and a second contact layer are preferably either formed over the photonic crystal layer or alternatively attached to the photonic crystal layer.

    摘要翻译： 提供了一种用于制造LED的系统和方法。 优选的实施例包括在衬底上形成分布式布拉格反射器的衬底。 在分布式布拉格反射器上形成光子晶体层，使入射到分布式布拉格反射器上的光准直，从而提高分布式布拉格反射器的效率。 优选地，在光子晶体层上形成第一接触层，有源层和第二接触层，或者替代地附着到光子晶体层。

    Light-Emitting Diodes on Concave Texture Substrate
    96.
    发明申请
    Light-Emitting Diodes on Concave Texture Substrate 有权
    凹面纹理基板上的发光二极管

    公开(公告)号：US20100032700A1

    公开(公告)日：2010-02-11

    申请号：US12247895

    申请日：2008-10-08

    申请人： Chen-Hua Yu ,  Hung-Ta Lin ,  Wen-Chih Chiou ,  Ding-Yuan Chen ,  Chia-Lin Yu

    发明人： Chen-Hua Yu ,  Hung-Ta Lin ,  Wen-Chih Chiou ,  Ding-Yuan Chen ,  Chia-Lin Yu

    IPC分类号： H01L33/00

    CPC分类号： H01L33/48 ,  H01L33/20 ,  H01L33/24

    摘要： A semiconductor device having light-emitting diodes (LEDs) formed on a concave textured substrate is provided. A substrate is patterned and etched to form recesses. A separation layer is formed along the bottom of the recesses. An LED structure is formed along the sidewalls and, optionally, along the surface of the substrate between adjacent recesses. In these embodiments, the surface area of the LED structure is increased as compared to a planar surface. In another embodiment, the LED structure is formed within the recesses such that the bottom contact layer is non-conformal to the topology of the recesses. In these embodiments, the recesses in a silicon substrate result in a cubic structure in the bottom contact layer, such as an n-GaN layer, which has a non-polar characteristic and exhibits higher external quantum efficiency.

    摘要翻译： 提供了一种形成在凹面纹理基板上的发光二极管（LED）的半导体器件。 对衬底进行图案化和蚀刻以形成凹陷。 沿着凹部的底部形成分离层。 沿着侧壁和任选地沿着相邻凹部之间的基板的表面形成LED结构。 在这些实施例中，与平面表面相比，LED结构的表面积增加。 在另一个实施例中，LED结构形成在凹部内，使得底部接触层与凹部的拓扑不一致。 在这些实施例中，硅衬底中的凹陷导致底接触层中的立方结构，例如具有非极性特性并且表现出更高外部量子效率的n-GaN层。

    Wafer Dicing Methods
    97.
    发明申请
    Wafer Dicing Methods 审中-公开
    晶圆切片方法

    公开(公告)号：US20100015782A1

    公开(公告)日：2010-01-21

    申请号：US12175818

    申请日：2008-07-18

    申请人： Chen-Hua Yu ,  Wen-Chih Chiou ,  Ding-Yuan Chen

    发明人： Chen-Hua Yu ,  Wen-Chih Chiou ,  Ding-Yuan Chen

    IPC分类号： H01L21/00

    CPC分类号： H01L21/78 ,  H01L33/0095

    摘要： Semiconductor wafer dicing methods are disclosed. These methods include forming etch patterns between adjacent semiconductor dice to be separated. Various etch processes can be used to form the etch patterns. The etch patterns generally reach a pre-determined depth into the wafer substrate significantly beyond the wafer top layer where pre-fabricated semiconductor dice are embedded. Semiconductor dice may be separated from a post-etch, large-sized, frangible wafer through wafer grinding, mechanical cleaving, and laser dicing approaches. Preferred embodiments result in reduced wafer-dicing related device damage and improved product yield.

    摘要翻译： 公开了半导体晶片切割方法。 这些方法包括在相邻半导体晶片之间形成待分离的蚀刻图案。 可以使用各种蚀刻工艺来形成蚀刻图案。 蚀刻图案通常达到晶片衬底的预定深度，显着超过嵌入预制半导体晶片的晶片顶层。 半导体晶片可以通过晶片研磨，机械切割和激光切割方法与后蚀刻，大尺寸的易碎晶片分离。 优选的实施例导致晶片切割相关装置损坏减少和产品产量提高。

    Patterned substrate for hetero-epitaxial growth of group-III nitride film
    99.
    发明授权
    Patterned substrate for hetero-epitaxial growth of group-III nitride film 有权
    III族氮化物膜的异质外延生长图案化衬底

    公开(公告)号：US08435820B2

    公开(公告)日：2013-05-07

    申请号：US13418098

    申请日：2012-03-12

    申请人： Chen-Hua Yu ,  Ding-Yuan Chen

    发明人： Chen-Hua Yu ,  Ding-Yuan Chen

    IPC分类号： H01L21/56

    CPC分类号： H01L27/156 ,  H01L31/0304 ,  H01L31/1035 ,  H01L33/007 ,  H01L33/20

    摘要： A circuit structure includes a substrate and a film over the substrate and including a plurality of portions allocated as a plurality of rows. Each of the plurality of rows of the plurality of portions includes a plurality of convex portions and a plurality of concave portions. In each of the plurality of rows, the plurality of convex portions and the plurality of concave portions are allocated in an alternating pattern.

    摘要翻译： 电路结构包括衬底和衬底上的膜，并且包括分配为多行的多个部分。 多个部分的多行中的每一个包括多个凸部和多个凹部。 在多行中的每一行中，以交替图案分配多个凸部和多个凹部。

    III-V compound semiconductor epitaxy from a non-III-V substrate
    100.
    发明授权
    III-V compound semiconductor epitaxy from a non-III-V substrate 有权
    III-V族化合物半导体外延从非III-V衬底

    公开(公告)号：US08377796B2

    公开(公告)日：2013-02-19

    申请号：US12539374

    申请日：2009-08-11

    申请人： Chia-Lin Yu ,  Chen-Hua Yu ,  Ding-Yuan Chen ,  Wen-Chih Chiou

    发明人： Chia-Lin Yu ,  Chen-Hua Yu ,  Ding-Yuan Chen ,  Wen-Chih Chiou

    IPC分类号： H01L21/768

    CPC分类号： H01L21/02365 ,  H01L21/02104 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02491 ,  H01L21/02502 ,  H01L21/02538 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/02645 ,  H01L29/12

    摘要： A method of forming a circuit structure includes providing a substrate; forming recesses in the substrate; forming a mask layer over the substrate, wherein the mask layer covers non-recessed portions of the substrate, with the recesses exposed through openings in the mask layer; forming a buffer/nucleation layer on exposed portions of the substrate in the recesses; and growing a group-III group-V (III-V) compound semiconductor material from the recesses until portions of the III-V compound semiconductor material grown from the recesses join each other to form a continuous III-V compound semiconductor layer.

    摘要翻译： 形成电路结构的方法包括提供基板; 在基板上形成凹部; 在所述基板上形成掩模层，其中所述掩模层覆盖所述基板的非凹部，所述凹部通过所述掩模层中的开口暴露; 在所述凹部中的所述基板的暴露部分上形成缓冲/成核层; 以及从所述凹部生长第III族V族化合物半导体材料，直到从所述凹部生长的所述III-V族化合物半导体材料的部分相互连接形成连续的III-V族化合物半导体层。