摘要:
A bistable structure provided by the invention is characterized as including a deflection element that has mechanically constrained end points and a compliant span between the end points that is substantially free to deflect between two stable positions when a force is applied at a point along the span. The deflection element span is provided, as-fabricated, curved in one of the two stable positions and in a mechanically unstressed condition along the length of the span. The as-fabricated curve of the deflection element span includes a curve maxima at a point along the span length that is at least about ¼ of the span length from the end points of the span. The deflection element span is constrained to substantially prohibit development of a second bending mode that is characteristic for the span as the element deflects between the two stable positions.
摘要:
Systems and methods by which to subject cellulosic fibers to alkaline treatment are provided. The systems and methods of the invention include equipment, such as nanofiltration units and slurry concentrators, which result in a lowered overall consumption of alkaline solution during alkaline treatment. The systems and methods of the invention further allow the components of hemicaustic streams produced by such alkaline treatments to be utilized in higher value end uses.
摘要:
A method and system for examining biological tissue includes the steps of radiating a tissue region with a plurality of microwave radiation pulses. The microwave pulses are swept across a range of microwave frequencies. In response to the swept frequency microwave pulses, the tissue region emits a plurality of thermoacoustic signals. At least one image of the tissue region is formed from the plurality of thermoacoustic signals. The signals can be ultrawideband signals.
摘要:
A method for manufacturing a lateral heterojunction bipolar transistor (HBT) is provided comprising a semiconductor substrate having a first insulating layer over the semiconductor substrate. A base trench is formed in a first silicon layer over the first insulating layer to form a collector layer over an exposed portion of the semiconductor substrate and an emitter layer over the first insulating layer. A semiconductive layer is formed on the sidewalls of the base trench to form a collector structure in contact with the collector layer and an emitter structure in contact with the emitter layer. A base structure is formed in the base trench. A plurality of connections is formed through an interlevel dielectric layer to the collector layer, the emitter layer, and the base structure. The base structure preferably is a compound semiconductive material of silicon and at least one of silicon-germanium, silicon-germanium-carbon, and combinations thereof.
摘要:
The invention relates to the induction of responses relating to the maturation of dendritic cells, using IL-18 and IL-18 muteins, and compounds, compositions, methods of making and using thereof, including therapeutic methods and products.
摘要:
An output block for an in-system programmable analog integrated circuit. The output block features an output amplifier that accepts a differential current-mode input signal and provides a single-ended output voltage. The output amplifier is also selectably operable as a linear amplifier, an integrator or a comparator. The output block also includes a common-mode feedback circuit (CMFB), an analog trim circuit (OATRM), a CLAMP circuit, and an offset calibration circuit (CLDAC), all coupled to the differential input of the output amplifier. The CMFB exhibits bandwidth comparable to that of the output amplifier and a drive capability that enables the differential-input to single-ended output conversion. The CLAMP is connected to the differential input in the comparator mode in order to avoid slow recovery from an overdrive condition. The OATRM forces a difference current into the differential input that compensates for a (gain independent) offset voltage that results from various mismatches. The CLDAC uses a digital-to-analog converter (DAC) to perform offset calibration at the differential input of the output amplifier. In addition, the output block is configured to be operational in a number of user-selectable modes, including, in one embodiment, one or more of: a linear (NORM) mode, a comparator (COMP) mode, and an integrator (INT) mode. An amplifier in the output block is variously reconfigured to achieve the selected mode of operation. Also, the output block accommodates an autocalibration (CAL) technique by clamping the single-ended output stage and balancing, through operation of the CLDAC, signals at an input node and at an interstage node of the amplifier.
摘要:
A polymer memory device includes two organic adhesion layers that facilitate an integral package comprising a lower and an upper electrode and the ferroelectric polymer memory structure. The ferroelectric polymer memory structure includes crystalline ferroelectric polymer layers such as single and co-polymer compositions. The structure includes spin-on and/or Langmuir-Blodgett deposited compositions. A memory system allows the polymer memory device to interface with various existing hosts.
摘要:
A microelectronic substrate including at least one microelectronic die disposed within an opening in a microelectronic substrate core, wherein an encapsulation material is disposed within portions of the opening not occupied by the microelectronic dice, or a plurality microelectronic dice encapsulated without the microelectronic substrate core. Interconnection layers of dielectric materials and conductive traces are then fabricated on the microelectronic die, the encapsulation material, and the microelectronic substrate core (if present) to form the microelectronic substrate.
摘要:
A carbonate fuel cell comprising cathode side hardware having a thin coating of a conductive ceramic for providing corrosion resistance and a method of making the same.
摘要:
The present invention relates to a ferroelectric polymer storage device including at least two stacked ferroelectric polymer memory structures that are arrayed next to at least two respective stacked topologies that are a pre-fabricated silicon substrate cavity that includes interlayer dielectric layers and via structures.