High-voltage diodes formed in advanced power integrated circuit devices
    91.
    发明授权
    High-voltage diodes formed in advanced power integrated circuit devices 有权
    高压二极管形成于先进的功率集成电路器件中

    公开(公告)号:US07045830B1

    公开(公告)日:2006-05-16

    申请号:US11005755

    申请日:2004-12-07

    IPC分类号: H01L29/43

    CPC分类号: H01L29/861 H01L29/7391

    摘要: A diode-connected lateral transistor on a substrate of a first conductivity type includes a vertical parasitic transistor through which a parasitic substrate leakage current flows. Means for shunting at least a portion of the flow of parasitic substrate leakage current away from the vertical parasitic transistor is provided.

    摘要翻译: 在第一导电类型的衬底上的二极管连接的横向晶体管包括垂直寄生晶体管,寄生衬底漏电流通过该垂直寄生晶体管流动。 提供了用于分流远离垂直寄生晶体管的寄生衬底泄漏电流的至少一部分的装置。

    Integrated circuit structure with improved LDMOS design
    92.
    发明授权
    Integrated circuit structure with improved LDMOS design 失效
    具有改进的LDMOS设计的集成电路结构

    公开(公告)号:US06870218B2

    公开(公告)日:2005-03-22

    申请号:US10315517

    申请日:2002-12-10

    申请人: Jun Cai

    发明人: Jun Cai

    摘要: A semiconductor integrated circuit including an LDMOS device structure includes a semiconductor layer with a pair of spaced-apart field effect gate structures over an upper surface of the semiconductor layer. First and second spaced-apart source regions of a first conductivity type are formed in a portion of the layer between the pair of gate structures with a first region of a second conductivity type formed there between. A lightly doped body region of a second conductivity type is formed in the semiconductor layer, extending from below the source regions to below the gate structures and extending a variable depth into the semiconductor layer. This body region is characterized by an inflection in depth in that portion of the body region extending below the first region.

    摘要翻译: 包括LDMOS器件结构的半导体集成电路包括在半导体层的上表面上的具有一对间隔开的场效应栅极结构的半导体层。 第一导电类型的第一和第二间隔开的源极区域形成在一对栅极结构之间的层的一部分中,其间形成有第二导电类型的第一区域。 在半导体层中形成第二导电类型的轻掺杂体区域,从源极区域的下方延伸到栅极结构的下方,并将可变深度延伸到半导体层中。 该身体区域的特征在于在第一区域的下方延伸的身体区域的部分中的深度变化。

    ESD protection structure
    93.
    发明授权
    ESD protection structure 失效
    ESD保护结构

    公开(公告)号:US06835985B2

    公开(公告)日:2004-12-28

    申请号:US09733836

    申请日:2000-12-09

    IPC分类号: H01L2362

    摘要: A transistor structure is provided for ESD protection in an integrated circuit device. A semiconductor substrate has source and drain diffusion regions and respective source and drain wells under the source and drain diffusion regions. A shallow trench isolation formed over the semiconductor substrate and into the semiconductor substrate separates the source and drain diffusion regions and a portion of the source and drain wells. Source and drain contact structures respectively formed on the shallow trench isolation over the source and drain diffusion regions and extend through the shallow trench isolation to contact the source and drain diffusion regions. An ion implantation is performed through the contact openings into the bottoms of the source and drain wells to control the device trigger voltage and position the discharge current far away from the surface, which increases the device ESD performance significantly.

    Thick oxide MOS device used in ESD protection circuit
    94.
    发明授权
    Thick oxide MOS device used in ESD protection circuit 有权
    ESD保护电路中使用的厚氧化物MOS器件

    公开(公告)号:US06329253B1

    公开(公告)日:2001-12-11

    申请号:US09434922

    申请日:1999-11-05

    IPC分类号: H01L21336

    摘要: A method for forming a novel thick oxide electrostatic discharge device using shallow trench isolation technology is described. A trench is etched into a semiconductor substrate. An oxide layer is deposited overlying the semiconductor substrate and filling the trench. The oxide within the trench is partially etched away leaving the oxide on the sidewalls and bottom of the trench. The oxide is polished away to the surface of the semiconductor substrate whereby oxide remains only on the sidewalls and bottom of the trench. A gate is formed within the trench whereby the gate is surrounded by the oxide. First ions are implanted into the semiconductor substrate adjacent to the trench to form N-wells. Second ions are implanted into the semiconductor substrate in a top portion of the N-wells to form source/drain regions. Third ions are implanted into the semiconductor substrate underlying the N-wells and underlying the trench to form electrostatic discharge trigger taps. This completes formation of an electrostatic discharge device in the fabrication of integrated circuits.

    摘要翻译: 描述了使用浅沟槽隔离技术形成新的厚氧化物静电放电装置的方法。 将沟槽蚀刻到半导体衬底中。 沉积在半导体衬底上并填充沟槽的氧化物层。 部分地蚀刻沟槽内的氧化物,留下沟槽的侧壁和底部上的氧化物。 氧化物被抛光到半导体衬底的表面,由此氧化物仅保留在沟槽的侧壁和底部上。 在沟槽内形成栅极,由此栅极被氧化物包围。 将第一离子注入到与沟槽相邻的半导体衬底中以形成N阱。 在N阱的顶部将第二离子注入到半导体衬底中以形成源/漏区。 将第三离子注入位于N阱下方并位于沟槽下方的半导体衬底中以形成静电放电触发抽头。 这就形成了集成电路制造中的静电放电装置。

    Lateral DMOS device with dummy gate
    95.
    发明授权
    Lateral DMOS device with dummy gate 有权
    具有虚拟门的侧面DMOS设备

    公开(公告)号:US09450056B2

    公开(公告)日:2016-09-20

    申请号:US13351295

    申请日:2012-01-17

    摘要: An LDMOS transistor with a dummy gate comprises an extended drift region formed over a substrate, a drain region formed in the extended drift region, a channel region formed in the extended drift region, a source region formed in the channel region and a dielectric layer formed over the extended drift region. The LDMOS transistor with a dummy gate further comprises an active gate formed over the channel region and a dummy gate formed over the extended drift region. The dummy gate helps to reduce the gate charge of the LDMOS transistor while maintaining the breakdown voltage of the LDMOS transistor.

    摘要翻译: 具有伪栅极的LDMOS晶体管包括形成在衬底上的扩展漂移区,形成在扩展漂移区中的漏极区,形成在扩展漂移区中的沟道区,形成在沟道区中的源极区和形成的电介质层 在扩展漂移区域上。 具有伪栅极的LDMOS晶体管还包括形成在沟道区上的有源栅极和形成在扩展漂移区上的伪栅极。 虚拟栅极有助于降低LDMOS晶体管的栅极电荷,同时保持LDMOS晶体管的击穿电压。

    Fuel injector with mixing circuit
    96.
    发明授权
    Fuel injector with mixing circuit 有权
    燃油喷射器配混合电路

    公开(公告)号:US08887506B2

    公开(公告)日:2014-11-18

    申请号:US13469217

    申请日:2012-05-11

    IPC分类号: F02C1/00

    CPC分类号: F23R3/286 F23R3/346

    摘要: A fuel injector having an injector body, a mixing circuit, and at least one injector is provided. The injector body has a plurality of manifolds, an inlet, and an outlet. The manifolds are configured for receiving fuel, and the inlet is configured for receiving air. The mixing circuit is positioned within the injector body. The mixing circuit is configured for receiving fuel from at least one of the manifolds, and air from the inlet to create an air-fuel mixture that exits the outlet. The least one fuel injector is positioned radially outwardly from the mixing circuit. The at least one injector receives fuel from at least one of the plurality of manifolds and injects fuel to the outlet.

    摘要翻译: 提供一种具有喷射器主体,混合回路和至少一个喷射器的燃料喷射器。 喷射器主体具有多个歧管,入口和出口。 歧管被配置为用于接收燃料,并且入口构造成用于接收空气。 混合电路位于注射器主体内。 混合回路构造成用于接收来自至少一个歧管的燃料和来自入口的空气以产生离开出口的空气 - 燃料混合物。 至少一个燃料喷射器从混合回路径向向外定位。 所述至少一个喷射器从所述多个歧管中的至少一个歧管接收燃料并将燃料喷射到所述出口。

    Fuel Injector With Mixing Circuit
    97.
    发明申请
    Fuel Injector With Mixing Circuit 有权
    带混合电路的燃油喷射器

    公开(公告)号:US20130298562A1

    公开(公告)日:2013-11-14

    申请号:US13469217

    申请日:2012-05-11

    IPC分类号: F02C7/232

    CPC分类号: F23R3/286 F23R3/346

    摘要: A fuel injector having an injector body, a mixing circuit, and at least one injector is provided. The injector body has a plurality of manifolds, an inlet, and an outlet. The manifolds are configured for receiving fuel, and the inlet is configured for receiving air. The mixing circuit is positioned within the injector body. The mixing circuit is configured for receiving fuel from at least one of the manifolds, and air from the inlet to create an air-fuel mixture that exits the outlet. The least one fuel injector is positioned radially outwardly from the mixing circuit. The at least one injector receives fuel from at least one of the plurality of manifolds and injects fuel to the outlet.

    摘要翻译: 提供一种具有喷射器主体,混合回路和至少一个喷射器的燃料喷射器。 喷射器主体具有多个歧管,入口和出口。 歧管被配置为用于接收燃料,并且入口构造成用于接收空气。 混合电路位于注射器主体内。 混合回路构造成用于接收来自至少一个歧管的燃料和来自入口的空气以产生离开出口的空气 - 燃料混合物。 至少一个燃料喷射器从混合回路径向向外定位。 所述至少一个喷射器从所述多个歧管中的至少一个歧管接收燃料并将燃料喷射到所述出口。

    Electroerosion control system and a dual mode control system
    98.
    发明授权
    Electroerosion control system and a dual mode control system 有权
    电液控制系统和双模控制系统

    公开(公告)号:US08560110B2

    公开(公告)日:2013-10-15

    申请号:US12796899

    申请日:2010-06-09

    IPC分类号: G06F19/00

    摘要: An electroerosion control system includes a general CNC controller being configured for controlling a general CNC machine process, a power supply for energizing a tool electrode and a workpiece to be machined, an electroerosion controller electrically connecting with the power supply for controlling an output of the power supply, and adaptively and electrically connecting with the general CNC controller for communication thereof, and a sensor sensing real-time status information of a working gap between the tool electrode and the workpiece and for sending said real-time status information to said electroerosion controller. Said electroerosion controller automatically controls the electroerosion machining process through the general CNC controller according to the real-time status information of the working gap.

    摘要翻译: 电腐蚀控制系统包括通用CNC控制器,其被配置用于控制一般的CNC机器处理,用于激励工具电极和待加工的工件的电源,与电源电连接以控制功率输出的电腐蚀控制器 供给,并且与通用CNC控制器自适应地电连接以进行通信;以及传感器,其感测工具电极和工件之间的工作间隙的实时状态信息,并将所述实时状态信息发送到所述电极控制器。 所述电腐蚀控制器根据工作间隙的实时状态信息,通过一般CNC控制器自动控制电腐蚀加工过程。

    Two Low Complexity Decoding Algorithms for LDPC Codes
    100.
    发明申请
    Two Low Complexity Decoding Algorithms for LDPC Codes 审中-公开
    LDPC码的两个低复杂度解码算法

    公开(公告)号:US20130055043A1

    公开(公告)日:2013-02-28

    申请号:US13486077

    申请日:2012-06-01

    IPC分类号: H03M13/11 G06F11/10

    摘要: In the present invention, two improved variants of the reliability-based iterative majority-logic decoding algorithm for regular low-density parity-check (LDPC) codes are presented. The new algorithms are obtained by introducing a different reliability measure for each check-sum of the parity-check matrix, and taking it into account in the computation of the extrinsic information that is used to update the reliability measure of each received bit in each iteration. In contrast to the first algorithm, the second algorithm includes check reliability that changes at each iteration. For the tested random and structured LDPC codes, both algorithms, while requiring very little additional computational complexities, achieve a considerable error performance gain over the standard one. More importantly, for short and medium block length LDPC codes of relatively large column weight, both algorithms outperform or perform just as well as the iterative decoding based on belief propagation (IDBP) with less decoding complexity.

    摘要翻译: 在本发明中,提出了用于常规低密度奇偶校验(LDPC)码的基于可靠性的迭代多数逻辑解码算法的两个改进的变体。 通过对奇偶校验矩阵的每个校验和引入不同的可靠性度量来获得新算法,并且在用于更新每个迭代中每个接收比特的可靠性度量的外在信息的计算中考虑 。 与第一种算法相反,第二种算法包括在每次迭代时改变的校验可靠性。 对于测试的随机和结构化LDPC码,这两种算法在需要非常少的额外的计算复杂性的情况下实现了比标准算法更大的错误性能增益。 更重要的是,对于相对较大的列权重的短和中块长度的LDPC码,两种算法比基于具有较低解码复杂度的置信传播(IDBP)的迭代解码性能优于或执行。