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100 条记录 (耗时 0.032 秒)

    Automatic defect review and classification system
    91.
    发明授权
    Automatic defect review and classification system 有权
    自动缺陷审查和分类系统

    公开(公告)号：US07664562B2

    公开(公告)日：2010-02-16

    申请号：US11451330

    申请日：2006-06-13

    申请人： Takehiro Hirai ,  Kazuo Aoki ,  Kenji Obara

    发明人： Takehiro Hirai ,  Kazuo Aoki ,  Kenji Obara

    IPC分类号： G06F19/00

    CPC分类号： G05B19/41875 ,  G05B2219/32218 ,  Y02P90/22

    摘要： The invention proposes a system that interrupts a processing associated with an ADC having low priority when an ADC processing cannot catch up with ADR by an ADC alone that is not under execution but uses an ADC for an ADR having high priority. To preferentially execute ADR/ADC having high priority, the invention employs an algorithm for serially selecting ADR/ADC in the order of higher processing capacity (in the order of greater numerical values in the expression by a DPH unit) from among ADR/ADCs that have the lowest priority, no matter whether the ADR/DC is now under execution or not.

    摘要翻译： 本发明提出了一种系统，当ADC处理不能通过一个ADC不能跟踪ADR而不能执行但对具有高优先级的ADR使用ADC时，中断与具有低优先级的ADC相关联的处理的系统。 为了优先执行具有高优先级的ADR / ADC，本发明采用一种用于从ADR / ADC中的处理能力较高（按DPH单元的表达式中的较大数值的数量级）的顺序选择ADR / ADC的算法， 优先级最低，无论ADR / DC是否在执行中。

    Method and apparatus for reviewing defects by detecting images having voltage contrast
    93.
    发明授权
    Method and apparatus for reviewing defects by detecting images having voltage contrast 有权
    通过检测具有电压对比度的图像来检查缺陷的方法和装置

    公开(公告)号：US07449898B2

    公开(公告)日：2008-11-11

    申请号：US11704228

    申请日：2007-02-09

    申请人： Toshifumi Honda ,  Takehiro Hirai

    发明人： Toshifumi Honda ,  Takehiro Hirai

    IPC分类号： G01R31/00 ,  G01R31/305 ,  G01N23/00

    CPC分类号： G01R31/307 ,  G01R31/2884 ,  H01J37/265 ,  H01J37/28 ,  H01J37/304 ,  H01J2237/221 ,  H01J2237/24564 ,  H01J2237/2487 ,  H01J2237/2594 ,  H01J2237/2817 ,  H01J2237/30416

    摘要： In a traditional method for automatically obtaining high-magnification images of defects by using an electron microscope for defect-reviewing of a semiconductor wafer, high-magnification images of a voltage contrast changing part are obtained in the case of defects generating voltage contrast change, this made difficult to observe defects themselves generating voltage contrast change. In the present invention, based on energy of secondary electron to be detected, after obtaining two types of images, namely an image making voltage contrast conspicuous easily, and an image not making it easily, and acquiring a shape change area adjacent to a voltage contrast change area based on this area as a defect location, a high-magnification image can automatically be obtained.

    摘要翻译： 在通过使用电子显微镜自动获得高倍率图像的传统方法中，通过使用电子显微镜对半导体晶片进行缺陷检查，在产生电压对比度变化的缺陷的情况下，获得电压对比度变化部分的高倍率图像， 难以观察缺陷本身产生电压对比度变化。 在本发明中，基于被检测的二次电子的能量，在获得两种类型的图像之后，即容易形成明显的图像形成电压对比度，以及不容易进行图像的图像，并且获取与电压对比相邻的形状变化区域 基于该区域的变化区域作为缺陷位置，可以自动获得高倍率图像。

    ANTIBODY AGAINST TUMOR SPECIFIC ANTIGEN AS TARGET
    94.
    发明申请
    ANTIBODY AGAINST TUMOR SPECIFIC ANTIGEN AS TARGET 失效
    抗肿瘤抗体作为目标的抗体

    公开(公告)号：US20080146785A1

    公开(公告)日：2008-06-19

    申请号：US11872479

    申请日：2007-10-15

    申请人： Kimihasa Ichikawa ,  Shu Takahashi ,  Toshinori Agatsuma ,  Keisuke Fukuchi ,  Takehiro Hirai

    发明人： Kimihasa Ichikawa ,  Shu Takahashi ,  Toshinori Agatsuma ,  Keisuke Fukuchi ,  Takehiro Hirai

    IPC分类号： C07K16/00

    CPC分类号： C07K16/30 ,  C07K2317/732 ,  C12Q1/6886 ,  C12Q2600/136 ,  C12Q2600/158

    摘要： The present invention relates to a method of detecting cancer by use of an oncogene, a method of screening for an active compound useful to treat and/or prevent cancer, and a pharmaceutical composition for treatment and/or prevention of cancer. More specifically, the present invention provides a method of detecting cancer based on the expression of the human oculospanin gene as a marker and a pharmaceutical composition containing an antibody capable of specifically recognizing human oculospanin and having cytotoxic activity against cancer cells.

    摘要翻译： 本发明涉及通过使用癌基因检测癌症的方法，筛选用于治疗和/或预防癌症的活性化合物的方法和用于治疗和/或预防癌症的药物组合物。 更具体地，本发明提供了一种基于人oculospanin基因作为标记物的表达和含有能够特异性识别人oculospanin并对癌细胞具有细胞毒性活性的抗体的药物组合物来检测癌症的方法。

    Report format setting method and apparatus, and defect review system
    95.
    发明申请
    Report format setting method and apparatus, and defect review system 有权
    报告格式设定方法和设备，缺陷审查系统

    公开(公告)号：US20070226634A1

    公开(公告)日：2007-09-27

    申请号：US11699063

    申请日：2007-01-29

    申请人： Takehiro Hirai

    发明人： Takehiro Hirai

    IPC分类号： G06F3/00

    CPC分类号： G06F8/10

    摘要： Generated is a template edition screen on which to display components of a report as modules by OSD by use of icons. One of the icons is selected by use of a pointing device including a mouse. By a drag-and-drop operation, the icon is placed at a desired position in an output format setup area formed in the same screen. The icon is set in a desired size by another drag-and-drop operation. Details of a module shown by the icon thus placed can be set up in a detail setup area in the same screen. Information on a format thus set up is retained as a template through a retention function, and accordingly can be used easily by simply calling the information. Moreover, the retained template can be edited as well. This makes it possible not only to create a new template, but also to modify an existing template.

    摘要翻译： 生成的是一个模板编辑屏幕，通过使用图标，通过OSD显示报告的组件作为模块。 通过使用包括鼠标的指示设备来选择其中一个图标。 通过拖放操作，将图标放置在同一屏幕中形成的输出格式设置区域中的所需位置。 通过另一个拖放操作将图标设置为所需的大小。 由此放置的图标所示的模块的细节可以在同一屏幕的详细设置区域中设置。 关于通过保留功能将由此设置的格式的信息作为模板保留，因此可以通过简单地调用信息来容易地使用。 此外，还可以编辑保留的模板。 这样做不仅可以创建新的模板，还可以修改现有的模板。

    Semiconductor device
    97.
    发明授权
    Semiconductor device 失效
    制造半导体器件的方法

    公开(公告)号：US5851863A

    公开(公告)日：1998-12-22

    申请号：US629248

    申请日：1996-04-08

    申请人： Taizo Fujii ,  Takehiro Hirai ,  Sugao Fujinaga

    发明人： Taizo Fujii ,  Takehiro Hirai ,  Sugao Fujinaga

    IPC分类号： H01L21/8249 ,  H01L27/06 ,  H01L21/8238

    CPC分类号： H01L21/8249 ,  H01L27/0623

    摘要： An n-type buried layer and an n-type epitaxial layer that becomes a collector layer of a pnp transistor are formed on a semiconductor substrate. A well and the collector layer are formed. Ions of an n-type impurity are implanted through a photoresist mask, to form an intrinsic base layer of the pnp transistor and a PT-VT diffusion layer with punchthrough stopper and threshold control functions of a pMOSFET. Ions of a p-type impurity are implanted through a photoresist mask at a shallow implantation depth than the previous step, to form an intrinsic base layer of an npn transistor and a channel dope layer of the pMOSFET. A buried channel is formed under the gate of the pMOSFET. Therefore pMOSFETs with good characteristics can be obtained. In this way, the present invention achieves bipolar transistors and MOSFETs with good characteristics, without having to increase the number of fabrication steps and the number of photoresist masks.

    摘要翻译： 在半导体衬底上形成成为pnp晶体管的集电极层的n型掩埋层和n型外延层。 形成阱和集电极层。 通过光致抗蚀剂掩模注入n型杂质的离子，以形成pnp晶体管的本征基极层和具有穿通阻挡层的PT-VT扩散层和pMOSFET的阈值控制功能。 p型杂质的离子通过光致抗蚀剂掩模以比上一步骤浅的注入深度注入，以形成pMOSFET的npn晶体管和沟道掺杂层的本征基极层。 在pMOSFET的栅极下方形成掩埋沟道。 因此，可以获得具有良好特性的pMOSFET。 以这种方式，本发明实现了具有良好特性的双极晶体管和MOSFET，而不必增加制造步骤的数量和光致抗蚀剂掩模的数量。

    Method of manufacturing Bi-MOS device
    98.
    发明授权
    Method of manufacturing Bi-MOS device 失效
    制造Bi-MOS器件的方法

    公开(公告)号：US5696006A

    公开(公告)日：1997-12-09

    申请号：US691341

    申请日：1996-08-02

    申请人： Takehiro Hirai ,  Masahiro Nakatani ,  Mitsuo Tanaka ,  Akihiro Kanda

    发明人： Takehiro Hirai ,  Masahiro Nakatani ,  Mitsuo Tanaka ,  Akihiro Kanda

    IPC分类号： H01L21/8249 ,  H01L27/06 ,  H01L29/51 ,  H01L21/265

    CPC分类号： H01L29/513 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/518 ,  Y10S148/009

    摘要： A silicon oxide film and a polysilicon film are formed on a silicon substrate and are selectively etched to form a contact hole in a region where an emitter is to be formed. A polysilicon film is laid on the substrate and two polysilicon films are patterned to form an emitter electrode and a gate electrode made of the two polysilicon films which are doped with arsenic. The arsenic is diffused from the polysilicon films of the emitter electrode into the silicon substrate to form an N.sup.+ emitter layer which has a high concentration and is shallow. Consequently, the contamination of a gate insulator film can be prevented from occurring and a bipolar transistor having high performance, for example, a high current amplification factor or the like can be formed.

    摘要翻译： 在硅衬底上形成氧化硅膜和多晶硅膜，并且被选择性地蚀刻以在要形成发射极的区域中形成接触孔。 将多晶硅膜放置在衬底上，并且将两个多晶硅膜图案化以形成由掺杂有砷的两个多晶硅膜制成的发射极电极和栅极电极。 砷从发射电极的多晶硅膜扩散到硅衬底中以形成具有高浓度且浅的N +发射极层。 因此，可以防止栅极绝缘膜的污染，并且可以形成具有高性能的双极晶体管，例如高电流放大因子等。

    Method of fabricating semiconductor device
    99.
    发明授权
    Method of fabricating semiconductor device 失效
    制造半导体器件的方法

    公开(公告)号：US5204274A

    公开(公告)日：1993-04-20

    申请号：US750856

    申请日：1991-08-29

    申请人： Akihiro Kanda ,  Yoshiro Fujita ,  Takehiro Hirai ,  Mitsuo Tanaka ,  Hideya Esaki

    发明人： Akihiro Kanda ,  Yoshiro Fujita ,  Takehiro Hirai ,  Mitsuo Tanaka ,  Hideya Esaki

    IPC分类号： H01L21/285 ,  H01L21/331 ,  H01L29/417 ,  H01L29/423 ,  H01L29/732

    CPC分类号： H01L29/66272 ,  H01L21/28525 ,  H01L29/41708 ,  H01L29/42304 ,  H01L29/7325 ,  Y10S148/009

    摘要： A method of fabricating a semiconductor device includes the steps of forming a base diffusion layer in a predetermined region in a semiconductor substrate of a first conduction type, the base diffusion layer being of a second conduction type; forming first insulating films and simultaneously forming an emitter lead-out electrode and a collector lead-out electrode in regions above an emitter-contact-forming region and a collector-contact-forming region, the first insulating extending films on the emitter and collector lead-out electrodes, the emitter and collector lead-out electrodes including impurity corresponding to the first conduction type; forming second insulating films at sides of the emitter and collector lead-out electrodes; forming a base contact; forming a base lead-out electrode including impurity corresponding to the second conduction type; diffusing the impurity from the emitter lead-out electrode, the collector lead-out electrode, and the base lead-out electrode to form an emitter diffusion layer of the first conduction type, a collector contact diffusion layer of the first conduction type, and a base contact diffusion layer of the second conduction type; locating an end of the emitter diffusion layer and a first end of the base contact diffusion layer at positions directly below a portion of the second insulating films which extends at a side of the emitter lead-out electrode; and locating a second end of the base contact diffusion layer and an end of the collector contact diffusion layer at positions directly below a portion of the second insulating films which extends at a side of the collector lead-out electrode.

    摘要翻译： 一种制造半导体器件的方法包括以下步骤：在第一导电类型的半导体衬底中的预定区域中形成基极扩散层，所述基极扩散层是第二导电类型; 在发射极接触形成区域和集电极接触形成区域以上的区域中形成第一绝缘膜并同时形成发射极引出电极和集电极引出电极，发射极和集电极引线上的第一绝缘延伸膜 所述发射极和集电极引出电极包括对应于所述第一导电类型的杂质; 在发射极和集电极引出电极的侧面形成第二绝缘膜; 形成基部接触; 形成包括对应于第二导电类型的杂质的基极引出电极; 扩散来自发射极引出电极，集电极引出电极和基极引出电极的杂质，以形成第一导电类型的发射极扩散层，第一导电类型的集电极接触扩散层和 第二导电类型的基极接触扩散层; 将发射极扩散层的端部和基极接触扩散层的第一端定位在在发射极引出电极侧延伸的第二绝缘膜的正下方的位置; 以及将所述基极接触扩散层的第二端和所述集电极接触扩散层的端部定位在在所述集电体引出电极的一侧延伸的所述第二绝缘膜的正下方的位置。