Abstract:
The invention relates to controlling a semiconductor processing system. Among other things, the invention relates to a run-to-run controller to create virtual modules to control a multi-pass process performed by a multi-chamber tool during the processing of a semiconductor wafer.
Abstract:
This method includes a method for etch processing that allows the bias between isolated and nested structures/features to be adjusted, correcting for a process wherein the isolated structures/features need to be smaller than the nested structures/features and wherein the nested structures/features need to be reduced relative to the isolated structures/features, while allowing for the critical control of trimming.
Abstract:
A dual chamber apparatus including a first chamber and a second chamber which is configured to be coupled to the first chamber at an interface. Each of the first chamber and the second chamber has a transfer opening located at the interface. An insulating plate is located on one of the first chamber and the second chamber at the interface and is configured to have a low thermal conductivity such that the first chamber and the second chamber can be independently controlled at different temperatures when the first chamber and the second chamber are coupled together. Additionally, the apparatus may include an alignment device and/or a fastening device for fastening the first chamber to the second chamber. In embodiments, the insulating plate may be constructed of Teflon. Further, the first chamber may be a chemical oxide removal treatment chamber and the second chamber may be a heat treatment chamber.
Abstract:
A method for managing data in a semiconductor processing environment. Raw data is collected during a process. Also, trace file data and process log file data are received. The raw data is synchronized with the trace file data and process log file data to create wafer data summary data is calculated from the raw data and a file is created containing the wafer data and the summary data.
Abstract:
A GUI is presented for configuring and initializing a semiconductor processing system, which includes a number of processing tools, a number of processing modules, a number of sensors, a number of processing models, and an alarm management system. The graphical display is organized so that all significant parameters are clearly and logically displayed so that the user is able to perform the desired configuration, initialization, and troubleshooting tasks with as little input as possible. The GUI is web-based and is viewable by a user using a web browser.
Abstract:
A surface wave plasma (SWP) source couples pulsed microwave (MW) energy into a processing chamber through, for example, a radial line slot antenna, to result in a low mean electron energy (Te). To prevent impingement of the microwave energy onto the surface of a substrate when plasma density is low between pulses, an ICP source, such as a helical inductive source, a planar RF coil, or other inductively coupled source, is provided between the SWP source and the substrate to produce plasma that is opaque to microwave energy. The ICP source can also be pulsed in synchronism with the pulsing of the MW plasma in phase with the ramping up of the MW pulses. The ICP also adds an edge dense distribution of plasma to a generally chamber centric MW plasma to improve plasma uniformity.
Abstract:
A surface wave plasma (SWP) source couples pulsed microwave (MW) energy into a processing chamber through, for example, a radial line slot antenna, to result in a low mean electron energy (Te). To prevent impingement of the microwave energy onto the surface of a substrate when plasma density is low between pulses, an ICP source, such as a helical inductive source, a planar RF coil, or other inductively coupled source, is provided between the SWP source and the substrate to produce plasma that is opaque to microwave energy. The ICP source can also be pulsed in synchronism with the pulsing of the MW plasma in phase with the ramping up of the MW pulses. The ICP also adds an edge dense distribution of plasma to a generally chamber centric MW plasma to improve plasma uniformity.
Abstract:
A plasma processing system. The processing system comprises a process chamber having first and second ends arranged such that the first end opposes the second end. A substrate support is positioned at the first end of the process chamber and is configured to support a substrate. An exhaust system is positioned proximate the second end of the process chamber and draws a vacuum on the process chamber. Between the exhaust system and substrate support there is a plurality of super-Debye openings, and between the exhaust system and the plurality of super-Debye openings is a plurality of sub-Debye openings. The super-Debye openings are configured to limit diffusion of plasma while the sub-Debye openings are configured to quench plasma.
Abstract:
A replaceable chamber element for use in a plasma processing system, such as a plasma etching system, is described. The replaceable chamber element includes a chamber component configured to be exposed to plasma in a plasma processing system, wherein the chamber component is fabricated to include a semiconductor junction, and wherein a capacitance of the chamber component is varied when a voltage is applied across the semiconductor junction.
Abstract:
The invention provides a plurality of Surface Wave Antenna (SWA) plasma sources. The SWA plasma sources can comprise one or more non-circular slot antennas, each having a plurality of plasma-tuning rods extending therethrough. Some of the plasma tuning rods can be configured to couple the electromagnetic (EM) energy from one or more of the non-circular slot antennas to the process space within the process chamber. The invention also provides SWA plasma sources that can comprise a plurality of resonant cavities, each having one or more plasma-tuning rods extending therefrom. Some of the plasma tuning rods can be configured to couple the EM energy from one or more of the resonant cavities to the process space within the process chamber.