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188 条记录 (耗时 0.034 秒)

    Quantum wire gate device and method of making same
    91.
    发明授权
    Quantum wire gate device and method of making same 有权
    量子线栅极器件及其制造方法

    公开(公告)号：US07183597B2

    公开(公告)日：2007-02-27

    申请号：US11011327

    申请日：2004-12-13

    申请人： Brian Doyle

    发明人： Brian Doyle

    IPC分类号： H01L29/768

    CPC分类号： H01L29/785 ,  B82Y10/00 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/823412 ,  H01L21/823437 ,  H01L29/66439 ,  H01L29/66795 ,  H01L29/775 ,  Y10S438/962

    摘要： The present invention relates to a method of forming a quantum wire gate device. The method includes patterning a first oxide upon a substrate. Preferably the first oxide pattern is precisely and uniformly spaced to maximize quantum wire numbers per unit area. The method continues by forming a first nitride spacer mask upon the first oxide and by forming a first oxide spacer mask upon the first nitride spacer mask. Thereafter, the method continues by forming a second nitride spacer mask upon the first oxide spacer mask and by forming a plurality of channels in the substrate that are aligned to the second nitride spacer mask. A dielectric is formed upon the channel length and the method continues by forming a gate layer over the plurality of channels. Because of the inventive method and the starting scale, each of the plurality of channels is narrower than the mean free path of semiconductive electron flow therein.

    摘要翻译： 本发明涉及一种形成量子线栅极器件的方法。 该方法包括在基底上图案化第一氧化物。 优选地，第一氧化物图案被精确且均匀地间隔开以使每单位面积的量子线数量最大化。 该方法通过在第一氧化物上形成第一氮化物间隔物掩模并且在第一氮化物间隔物掩模上形成第一氧化物间隔物掩模来继续。 此后，该方法继续通过在第一氧化物间隔物掩模上形成第二氮化物间隔物掩模并且通过在衬底中形成与第二氮化物间隔物掩模对准的多个通道。 在沟道长度上形成电介质，并且该方法继续通过在多个通道上形成栅极层。 由于本发明的方法和起始标度，多个通道中的每个通道比其中的半导体电子流的平均自由程窄。

    Self-aligned contacts for transistors
    93.
    发明申请
    Self-aligned contacts for transistors 有权

    公开(公告)号：US20060223302A1

    公开(公告)日：2006-10-05

    申请号：US11097429

    申请日：2005-03-31

    申请人： Peter Chang ,  Brian Doyle

    发明人： Peter Chang ,  Brian Doyle

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76897 ,  H01L21/84 ,  H01L27/11 ,  H01L27/1108 ,  H01L27/1203

    摘要： Self-aligned contacts for transistors and methods for fabricating the contacts are described. An etch resistant material is patterned to create an opening that resides above a transistor gate structure. A selective etch is performed through the opening that does not etch the transistor gate structure but does etch material that resides laterally with respect to the transistor gate structure in order to expose tops, immediately adjacent to the transistor gate structure, of drain and source regions of a diffusion layer of the transistor. Conductive material is deposited that covers respective tops of the drain and source regions of the diffusion layer of the transistor to a depth that does not short the drain and source region of the diffusion layer of the transistor. A layer above the conductive material is formed. Contacts are formed through the layer above the conductive material to respective portions of the conductive material that cover respective tops of the drain and source regions of the diffusion layer of the transistor.

    Creation of high mobility channels in thin-body SOI devices
    94.
    发明申请
    Creation of high mobility channels in thin-body SOI devices 有权
    在薄体SOI器件中创建高迁移率通道

    公开(公告)号：US20060205178A1

    公开(公告)日：2006-09-14

    申请号：US11429903

    申请日：2006-05-08

    申请人： Brian Doyle ,  Brian Roberds

    发明人： Brian Doyle ,  Brian Roberds

    IPC分类号： H01L21/46

    CPC分类号： H01L21/76254 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/02664

    摘要： A method for fabricating a strained silicon film to a silicon on insulation (SOI) wafer. A layer of oxide is deposited onto a wafer that has a stack structure of a first base substrate, a layer of relaxed film=and a second layer of strained film. The SOI wafer has a stack structure of a second base substrate and a layer of oxidized film. The SOI wafer is attached to the wafer and is heated at a first temperature. This causes a silicon dioxide (SiO2) dangling bond to form on the second base substrate of the SOI wafer, transferring the strained film from one wafer to the other.

    摘要翻译： 一种将应变硅膜制造到绝缘硅（SOI）晶片上的方法。 一层氧化物沉积在具有第一基底，松弛膜层和第二层应变膜的堆叠结构的晶片上。 SOI晶片具有第二基底基板和氧化膜层的堆叠结构。 SOI晶片连接到晶片并在第一温度下被加热。 这导致在SOI晶片的第二基底衬底上形成二氧化硅（SiO 2/2）悬挂键，将应变膜从一个晶片转移到另一个晶片。

    Thermal conducting trench in a semiconductor structure
    97.
    发明申请
    Thermal conducting trench in a semiconductor structure 有权
    半导体结构中的导热沟槽

    公开(公告)号：US20060121710A1

    公开(公告)日：2006-06-08

    申请号：US11331321

    申请日：2006-01-11

    申请人： Chunlin Liang ,  Brian Doyle

    发明人： Chunlin Liang ,  Brian Doyle

    IPC分类号： H01L21/20 ,  H01L21/3205

    CPC分类号： H01L21/76801 ,  H01L21/76224 ,  H01L21/763 ,  H01L23/367 ,  H01L23/3677 ,  H01L29/1083 ,  H01L29/41766 ,  H01L29/78 ,  H01L2924/0002 ,  Y10S257/905 ,  H01L2924/00

    摘要： The invention relates to a trench filled with a thermally conducting material in a semiconductor substrate. In one embodiment, the semiconductor device has a trench defining a cell region, wherein a portion of the trench includes a thermally conducting material, and a contact to the thermally conducting material. The invention further relates to a semiconductor device and a method of forming a semiconductor device with an interlayer dielectric that is a thermally conducting material.

    摘要翻译： 本发明涉及在半导体衬底中填充有导热材料的沟槽。 在一个实施例中，半导体器件具有限定单元区域的沟槽，其中沟槽的一部分包括导热材料和与导热材料的接触。 本发明还涉及半导体器件和形成具有作为导热材料的层间电介质的半导体器件的方法。

    Method of patterning a film
    100.
    发明申请
    Method of patterning a film 有权
    图案化方法

    公开(公告)号：US20050266692A1

    公开(公告)日：2005-12-01

    申请号：US10859328

    申请日：2004-06-01

    申请人： Justin Brask ,  Brian Doyle ,  Uday Shah ,  Robert Chau

    发明人： Justin Brask ,  Brian Doyle ,  Uday Shah ,  Robert Chau

    IPC分类号： H01L21/302 ,  H01L21/308 ,  H01L21/311 ,  H01L21/461 ,  H01L21/4763 ,  H01L21/768

    CPC分类号： H01L21/31111 ,  H01L21/3081 ,  H01L21/76838 ,  H01L29/785

    摘要： A method of patterning a thin film. The method includes forming a mask on a film to be patterned. The film is then etched in alignment with the mask to form a patterned film having a pair of laterally opposite sidewalls. A protective layer is formed on the pair of laterally opposite sidewalls. Next, the mask is removed from above the patterned film. After removing the mask from the patterned film, the protective layer is removed from the sidewalls.

    摘要翻译： 图案化薄膜的方法。 该方法包括在待图案化的膜上形成掩模。 然后将膜与掩模对准地蚀刻以形成具有一对横向相对的侧壁的图案化膜。 在一对横向相对的侧壁上形成保护层。 接下来，从图案化膜的上方去除掩模。 在从图案化的膜去除掩模之后，从侧壁去除保护层。