公开(公告)号：US20170260042A1

公开(公告)日：2017-09-14

申请号：US15066799

申请日：2016-03-10

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Chun-Wen Cheng

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/0006 ,  B81B7/0051 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2201/0271 ,  B81C1/00246 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2201/0176 ,  B81C2201/0181 ,  B81C2201/112 ,  B81C2203/0714 ,  B81C2203/0735

Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.

公开(公告)号：US20160368763A1

公开(公告)日：2016-12-22

申请号：US15117854

申请日：2014-12-22

Applicant: ROBERT BOSCH GMBH

Inventor： Julian Gonska ,  Mawuli Ametowobla ,  Jochen Reinmuth

IPC: B81C1/00 ,  B81B1/00

CPC classification number: B81C1/00119 ,  B81B1/004 ,  B81B7/02 ,  B81B2203/0315 ,  B81C1/00293 ,  B81C2201/112 ,  B81C2201/115 ,  B81C2203/0109 ,  B81C2203/0145 ,  B81C2203/019

Abstract: A method for manufacturing a micromechanical component including forming an access opening in an MEMS element or in a cap element of the component; connecting the MEMS element to the cap element, at least one cavity being formed between the MEMS element and the cap element; and closing off the access opening with respect to the at least one cavity under a defined atmosphere, using a laser.

Abstract translation: 一种用于制造微机械部件的方法，包括在所述部件的MEMS元件或盖元件中形成进入开口; 将所述MEMS元件连接到所述盖元件，在所述MEMS元件和所述盖元件之间形成至少一个空腔; 并且使用激光在限定的气氛下关闭所述至少一个空腔的进入开口。

公开(公告)号：US20160207756A1

公开(公告)日：2016-07-21

申请号：US14599218

申请日：2015-01-16

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yi-Hsien CHANG ,  Tzu-Heng WU ,  Chun-Ren CHENG ,  Shih-Wei LIN ,  Jung-Kuo TU

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B81B3/0005 ,  B81B2207/015 ,  B81C2201/019 ,  B81C2201/112 ,  B81C2203/0785

Abstract: A substrate structure for a micro electro mechanical system (MEMS) device, a semiconductor structure and a method for fabricating the same are provided. In various embodiments, the substrate structure for the MEMS device includes a substrate, the MEMS device, and an anti-stiction layer. The MEMS device is over the substrate. The anti-stiction layer is on a surface of the MEMS device, and includes amorphous carbon, polytetrafluoroethene, hafnium oxide, tantalum oxide, zirconium oxide, or a combination thereof.

Abstract translation: 提供了一种用于微机电系统（MEMS）器件的衬底结构，半导体结构及其制造方法。 在各种实施例中，用于MEMS器件的衬底结构包括衬底，MEMS器件和抗静电层。 MEMS器件在衬底上。 抗静电层位于MEMS器件的表面上，并且包括无定形碳，聚四氟乙烯，氧化铪，氧化钽，氧化锆或其组合。

公开(公告)号：US20160083247A1

公开(公告)日：2016-03-24

申请号：US14957562

申请日：2015-12-02

Applicant: Invensense, Inc.

Inventor： Michael Julian Daneman ,  Mei-Lin Chan ,  Martin Lim ,  Fariboz Assaderaghi ,  Erhan Polatkan Ata

IPC: B81C1/00

CPC classification number: B81C1/00246 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2207/012 ,  B81C1/00158 ,  B81C2201/112 ,  B81C2203/0118 ,  B81C2203/0742 ,  B81C2203/0792 ,  H01L2224/83805

Abstract: A method for fabricating a MEMS device includes depositing and patterning a first sacrificial layer onto a silicon substrate, the first sacrificial layer being partially removed leaving a first remaining oxide. Further, the method includes depositing a conductive structure layer onto the silicon substrate, the conductive structure layer making physical contact with at least a portion of the silicon substrate. Further, a second sacrificial layer is formed on top of the conductive structure layer. Patterning and etching of the silicon substrate is performed stopping at the second sacrificial layer. Additionally, the MEMS substrate is bonded to a CMOS wafer, the CMOS wafer having formed thereupon a metal layer. An electrical connection is formed between the MEMS substrate and the metal layer.

Abstract translation: 一种用于制造MEMS器件的方法包括将第一牺牲层沉积并图案化到硅衬底上，第一牺牲层被部分去除留下第一剩余氧化物。 此外，该方法包括在硅衬底上沉积导电结构层，导电结构层与硅衬底的至少一部分进行物理接触。 此外，在导电结构层的顶部上形成第二牺牲层。 在第二牺牲层停止硅衬底的图案化和蚀刻。 此外，MEMS衬底被结合到CMOS晶片，其上形成有金属层的CMOS晶片。 在MEMS衬底和金属层之间形成电连接。

公开(公告)号：US20160016792A1

公开(公告)日：2016-01-21

申请号：US14873091

申请日：2015-10-01

Applicant: STMicroelectronics, Inc.

Inventor： Ming Fang

IPC: B81C1/00

CPC classification number: B81C1/00666 ,  B81B7/0029 ,  B81B2203/0181 ,  B81C1/0019 ,  B81C2201/0169 ,  B81C2201/112

Abstract: A method of manufacturing microstructures, such as MEMS or NEMS devices, including forming a protective layer on a surface of a moveable component of the microstructure. For example, a silicide layer may be formed on a portion of at least four different surfaces of a poly-silicon mass that is moveable with respect to a substrate of the microstructure. The process may be self-aligning.

Abstract translation: 一种制造微结构的方法，例如MEMS或NEMS器件，包括在微结构的可移动部件的表面上形成保护层。 例如，可以在可相对于微结构的基板移动的多晶硅块的至少四个不同表面的一部分上形成硅化物层。 该过程可以是自对准的。

公开(公告)号：US20150346391A1

公开(公告)日：2015-12-03

申请号：US14287736

申请日：2014-05-27

Applicant: Himax Display, Inc.

Inventor： Roland V. Gelder

IPC: G02B1/16 ,  G02B1/12 ,  B81C1/00 ,  G02B26/08

CPC classification number: B81C1/00968 ,  B81B3/0005 ,  B81B2201/042 ,  B81C1/00984 ,  B81C2201/112 ,  C09D1/00 ,  C09D4/00 ,  C10M109/02 ,  C10N2240/20 ,  G02B1/12 ,  G02B1/16 ,  G02B26/0833

Abstract: A method for forming an anti-stiction coating on a surface of a semiconductor device is provided. Using atomic layer deposition (ALD) processes to activate surface prior to anti-stiction coating deposition, anti-stiction coating having strong chemical bonding to the surface is obtained.

Abstract translation: 提供了在半导体器件的表面上形成抗静电涂层的方法。 使用原子层沉积（ALD）工艺在抗静电涂层沉积之前激活表面，获得与表面具有强化学键合的抗静电涂层。

公开(公告)号：US20140374856A1

公开(公告)日：2014-12-25

申请号：US13926257

申请日：2013-06-25

Applicant: ANALOG DEVICES, INC.

Inventor： Li Chen ,  Thomas Kieran Nunan ,  Kuang L. Yang

IPC: B81B3/00 ,  H01L23/00 ,  H01L25/07 ,  H01L21/311

CPC classification number: B81B3/0051 ,  B81B3/0005 ,  B81B3/0059 ,  B81B2207/012 ,  B81C1/00976 ,  B81C2201/112 ,  B81C2203/0118

Abstract: One or more stopper features (e.g., bump structures) are formed in a standard ASIC wafer top passivation layer for preventing MEMS device stiction vertically in integrated devices having a MEMS device capped directly by an ASIC wafer. A TiN coating may be used on the stopper feature(s) for anti-stiction. An electrical potential may be applied to the TiN anti-stiction coating of one or more stopper features.

Abstract translation: 在标准ASIC晶片顶部钝化层中形成一个或多个塞子特征（例如，凸起结构），用于在具有由ASIC晶片直接覆盖的MEMS器件的集成器件中垂直地防止MEMS器件静电。 TiN涂层可用于阻塞特征以用于抗静电。 可以将电势施加到一个或多个塞子特征的TiN抗静电涂层。

公开(公告)号：US20140334991A1

公开(公告)日：2014-11-13

申请号：US14340153

申请日：2014-07-24

Applicant: Sandia Corporation

Inventor： Ross Stefan Johnson ,  Shawn M. Dirk ,  Cody M. Washburn ,  Michael T. Dugger

IPC: B01J19/12

CPC classification number: B01J19/123 ,  B01J2219/1203 ,  B81B3/0005 ,  B81C2201/112

Abstract: Thermally or photochemically activated small molecule delivery polymers and platforms enable ‘on-demand’ delivery of a vapor-phase lubricant, such as pentanol or other alcohols, that enable scheduled or as-needed lubrication of MEMS devices, thereby greatly improving the reliability and lifespan of the devices.

Abstract translation: 热或光化学活化的小分子递送聚合物和平台能够“按需”传送气相润滑剂，如戊醇或其他醇类，可实现预定或必要的MEMS器件润滑，从而大大提高可靠性和寿命 的设备。

公开(公告)号：US20140239353A1

公开(公告)日：2014-08-28

申请号：US14084569

申请日：2013-11-19

Applicant: Invensense, Inc.

Inventor： Michael Julian Daneman ,  Mei-Lin Chan ,  Martin Lim ,  Fariboz Assaderaghi ,  Erhan Polatkan Ata

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00246 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2207/012 ,  B81C1/00158 ,  B81C2201/112 ,  B81C2203/0118 ,  B81C2203/0742 ,  B81C2203/0792 ,  H01L2224/83805

Abstract: A method for fabricating a MEMS device includes depositing and patterning a first sacrificial layer onto a silicon substrate, the first sacrificial layer being partially removed leaving a first remaining oxide. Further, the method includes depositing a conductive structure layer onto the silicon substrate, the conductive structure layer making physical contact with at least a portion of the silicon substrate. Further, a second sacrificial layer is formed on top of the conductive structure layer. Patterning and etching of the silicon substrate is performed stopping at the second sacrificial layer. Additionally, the MEMS substrate is bonded to a CMOS wafer, the CMOS wafer having formed thereupon a metal layer. An electrical connection is formed between the MEMS substrate and the metal layer.

Abstract translation: 一种用于制造MEMS器件的方法包括将第一牺牲层沉积并图案化到硅衬底上，第一牺牲层被部分去除留下第一剩余氧化物。 此外，该方法包括在硅衬底上沉积导电结构层，导电结构层与硅衬底的至少一部分进行物理接触。 此外，在导电结构层的顶部上形成第二牺牲层。 在第二牺牲层停止硅衬底的图案化和蚀刻。 此外，MEMS衬底被结合到CMOS晶片，其上形成有金属层的CMOS晶片。 在MEMS衬底和金属层之间形成电连接。

公开(公告)号：US08803296B2

公开(公告)日：2014-08-12

申请号：US13784423

申请日：2013-03-04

Applicant: Texas Instruments Incorporated

Inventor： William Robert Morrison ,  Mark Christopher Fisher ,  Murali Hanabe ,  Ganapathy Subramaniam Sivakumar ,  Simon Joshua Jacobs

IPC: H01L23/58 ,  B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00984 ,  B81B3/0005 ,  B81B7/0032 ,  B81C1/00261 ,  B81C1/0096 ,  B81C2201/112 ,  H01L21/02112 ,  H04W4/02 ,  Y10S257/914

Abstract: A device has a microelectromechanical system (MEMS) component with at least one surface and a coating disposed on at least a portion of the surface. The coating has a compound of the formula M(CnF2n+1Or), wherein M is a polar head group and wherein n≧2r. The value of n may range from 2 to about 20, and the value of r may range from 1 to about 10. The value of n plus r may range from 3 to about 30, and a ratio of n:r may have a value of about 2:1 to about 20:1.

Abstract translation: 器件具有微机电系统（MEMS）部件，其中至少一个表面和涂层设置在表面的至少一部分上。 该涂层具有式M（CnF2n + 10r）的化合物，其中M是极性头基，其中n≥2r。 n的值可以在2至约20的范围内，并且r的值可以在1至约10的范围内.n加r的值可以在3至约30的范围内，并且n：r的比可以具有值 为约2：1至约20：1。