公开(公告)号：US20090169839A1

公开(公告)日：2009-07-02

申请号：US12367283

申请日：2009-02-06

Applicant: Yasutaka Sugimoto ,  Sadaaki Sakamoto

Inventor： Yasutaka Sugimoto ,  Sadaaki Sakamoto

IPC: B32B3/00 ,  C03C3/066 ,  B32B17/06

CPC classification number: H01B3/12 ,  B32B18/00 ,  C03C3/066 ,  C04B35/48 ,  C04B2235/3203 ,  C04B2235/3206 ,  C04B2235/3208 ,  C04B2235/3213 ,  C04B2235/3215 ,  C04B2235/3217 ,  C04B2235/3236 ,  C04B2235/3248 ,  C04B2235/3284 ,  C04B2235/3409 ,  C04B2235/3418 ,  C04B2235/3445 ,  C04B2235/365 ,  C04B2235/6025 ,  C04B2235/652 ,  C04B2235/658 ,  H01G4/1236 ,  H01G4/129 ,  H01G4/30 ,  H05K1/0306 ,  H05K1/162 ,  H05K3/4611 ,  H05K3/4629 ,  Y10T428/24851 ,  Y10T428/24917

Abstract: A glass ceramic composition which is formed by firing into a sintered body having a relatively high relative dielectric constant and Q value is provided. It includes a CaZrO3-based ceramic and a Li2O—MgO—ZnO—B2O3—SiO2-based glass. The Li2O—MgO—ZnO—B2O3—SiO2-based glass is 1 to 12 percent by weight of the total composition, the content of Li2O is 3.5 to 15 percent by weight, the content of MgO is 20 to 50 percent by weight, the content of BaO is 0 to 25 percent by weight, the content of CaO is 0 to 10 percent by weight, the content of SrO is 0 to 25 percent by weight, the content of B2O3 is 16 to 29 percent by weight, the content of SiO2 is 11 to 35 percent by weight, the content of ZnO is 5 to 20 percent by weight, and the content of Al2O3 is 0 to 15 percent by weight. This glass ceramic composition is advantageously used for green glass ceramic layers to form a green laminate structure useful as a main component body of an LC filter or the like.

Abstract translation: 提供了通过烧成形成具有相对高的相对介电常数和Q值的烧结体形成的玻璃陶瓷组合物。 它包括CaZrO3基陶瓷和Li2O-MgO-ZnO-B2O3-SiO2基玻璃。 Li2O-MgO-ZnO-B2O3-SiO2系玻璃的总组成为1〜12重量％，Li 2 O的含量为3.5〜15重量％，MgO的含量为20〜50重量％ BaO的含量为0〜25重量％，CaO的含量为0〜10重量％，SrO含量为0〜25重量％，B 2 O 3的含量为16〜29重量％， SiO 2为11〜35重量％，ZnO的含量为5〜20重量％，Al 2 O 3的含量为0〜15重量％。 该玻璃陶瓷组合物有利地用于绿色玻璃陶瓷层，以形成可用作LC滤光器等的主要成分体的绿色层压结构。

公开(公告)号：US20090130473A1

公开(公告)日：2009-05-21

申请号：US12271378

申请日：2008-11-14

Applicant: Beom Joon CHO ,  Jong Myeon LEE ,  Soo Hyun LYOO ,  Ho Sung CHOO

Inventor： Beom Joon CHO ,  Jong Myeon LEE ,  Soo Hyun LYOO ,  Ho Sung CHOO

IPC: B32B27/00 ,  B05D3/00

CPC classification number: B28B1/30 ,  B28B5/027 ,  C04B35/62218 ,  C04B2235/96 ,  C04B2235/9615 ,  H01G4/129 ,  H01G4/308 ,  H01G13/00 ,  Y10T428/31786 ,  Y10T428/31971

Abstract: Provided is a carrier film for forming a ceramic green sheet. The carrier film includes a film-type base material for fabricating the ceramic green sheet, a binder layer disposed on the film-type base material, the binder layer being formed of a binder resin, and a delamination layer disposed on a bottom surface of the carrier film, the delamination layer being formed of a resin having a releasing property. Also, provided is a method for fabricating a ceramic green sheet. The method includes preparing a carrier film for forming the ceramic green sheet including a binder layer, coating a ceramic slurry onto the carrier film, and drying the coated ceramic slurry to form the ceramic green sheet.

Abstract translation: 提供一种用于形成陶瓷生片的载体膜。 载体膜包括用于制造陶瓷生片的膜型基材，设置在膜型基材上的粘合剂层，粘合剂层由粘合剂树脂形成，以及分层层，设置在所述粘合剂层的底表面上 载体膜，剥离层由具有剥离性的树脂形成。 另外，提供一种陶瓷生片的制造方法。 该方法包括制备用于形成包含粘合剂层的陶瓷生片的载体膜，在载体膜上涂覆陶瓷浆料，并干燥涂覆的陶瓷浆料以形成陶瓷生片。

公开(公告)号：US20080259524A1

公开(公告)日：2008-10-23

申请号：US12105334

申请日：2008-04-18

Applicant: Serge Blonkowski

Inventor： Serge Blonkowski

IPC: H01G4/20 ,  H01G7/00

CPC classification number: H01L21/02142 ,  H01G4/1236 ,  H01G4/129 ,  H01G4/33 ,  H01L21/02159 ,  H01L21/02205 ,  H01L21/02219 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/31641 ,  H01L28/40 ,  Y10T29/435

Abstract: A dielectric alloy is composed of two dielectric materials that respectively have second-order non-linear dielectric susceptibilities with opposite signs. The composition is adjusted so that the alloy has a second-order non-linear dielectric susceptibility below a chosen threshold. A dielectric layer within an integrated circuit is made using the alloy. More specifically, an integrated capacitor is produced with a single-layer dielectric formed by said alloy.

Abstract translation: 介电合金由两种介电材料构成，分别具有相反符号的二阶非线性介电磁化率。 调整组合物使得合金具有低于所选阈值的二阶非线性介电磁化率。 使用合金制成集成电路内的电介质层。 更具体地说，利用由所述合金形成的单层电介质制造集成电容器。

公开(公告)号：US20080196227A1

公开(公告)日：2008-08-21

申请号：US11961218

申请日：2007-12-20

Applicant: Kei Sato ,  Nobuyuki Kobayashi ,  Tsutomu Nanataki

Inventor： Kei Sato ,  Nobuyuki Kobayashi ,  Tsutomu Nanataki

IPC: H01L41/22

CPC classification number: C03C3/0745 ,  C03C8/10 ,  C03C8/14 ,  C03C17/04 ,  H01G4/1209 ,  H01G4/129 ,  H01G4/33 ,  H01L21/02175 ,  H01L21/02197 ,  H01L21/31691 ,  H01L28/40 ,  H01L41/43 ,  Y10T29/42

Abstract: A manufacturing method of a dielectric device includes steps described below. (1) Mixing step: Powders serving as a matrix and additive powders for sintering the matrix are mixed. (2) Mixture heat-treating step: The mixture of the matrix and the additive that has been subject to the mixing step is heat-treated. (3) Deposition layer formation step: The material powders obtained through the mixture heat-treating step are injected toward a substrate so as to form a deposition layer on the substrate. (4) Deposition layer heat-treating step: The deposition layer formed on the substrate through the deposition layer formation step is heat-treated so as to form the dielectric layer on the substrate.

Abstract translation: 电介质器件的制造方法包括下述步骤。 （1）混合工序：将作为基质的粉末和烧结基质的添加剂粉末混合。 （2）混合热处理工序：将经过混合工序的基质和添加剂的混合物进行热处理。 （3）沉积层形成步骤将通过混合物热处理步骤获得的材料粉末注入基板，以在基板上形成沉积层。 （4）沉积层热处理工序：通过沉积层形成工序在基板上形成的沉积层进行热处理，以在基板上形成电介质层。

公开(公告)号：US20070172652A1

公开(公告)日：2007-07-26

申请号：US10590779

申请日：2005-03-03

Applicant: Takafumi Kawano ,  Masataka Yamanaga ,  Koichi Fukuda

Inventor： Takafumi Kawano ,  Masataka Yamanaga ,  Koichi Fukuda

IPC: B32B15/02

CPC classification number: C04B35/462 ,  B32B2311/08 ,  B32B2311/12 ,  C01G23/002 ,  C01G23/003 ,  C01P2002/72 ,  C01P2002/85 ,  C01P2004/04 ,  C04B35/4682 ,  C04B35/47 ,  C04B35/62805 ,  C04B35/62821 ,  C04B35/62897 ,  C04B2235/3215 ,  C04B2235/3217 ,  C04B2235/3224 ,  C04B2235/3234 ,  C04B2235/3284 ,  C04B2235/3298 ,  C04B2235/365 ,  C04B2235/5436 ,  C04B2235/5445 ,  C04B2235/656 ,  C04B2235/80 ,  C04B2237/346 ,  C04B2237/407 ,  C04B2237/408 ,  H01B3/12 ,  H01G4/1218 ,  H01G4/1227 ,  H01G4/129 ,  H01G4/30 ,  Y10T428/12181 ,  Y10T428/2982 ,  Y10T428/2991 ,  Y10T428/2993

Abstract: A low temperature sinterable dielectric ceramic composition is obtained by bending 2.5-20 parts by weight of a glass component per 100 parts by weight of an aggregate of dielectric particles which are composed of Ti-containing dielectric material and contain an oxide including Ti and Zn in the surface portions. A low temperature sintered dielectric ceramic is produced by sintering this low temperature sinterable dielectric ceramic composition at 880 to 1000° C. With this low temperature sinterable dielectric ceramic composition, there can be obtained a multiplayer electronic component having an internal conductor composed of Ag, Cu or an alloy containing at least one of them.

Abstract translation: 低温可烧结介电陶瓷组合物是通过以每100重量份的由含Ti电介质材料构成并含有包含Ti和Zn的氧化物的电介质颗粒的聚集体的形式弯曲2.5-20重量份的玻璃组分 表面部分。 通过在880〜1000℃烧结该低温烧结性电介质陶瓷组合物来制造低温烧结介电陶瓷。使用该低温烧结性介电陶瓷组合物，可以获得具有由Ag，Cu构成的内部导体的多层电子元件 或含有其中至少一种的合金。

公开(公告)号：US20070036996A1

公开(公告)日：2007-02-15

申请号：US11583795

申请日：2006-10-20

Applicant: Yasutaka Sugimoto ,  Satoshi Ohga ,  Takaki Murata

Inventor： Yasutaka Sugimoto ,  Satoshi Ohga ,  Takaki Murata

IPC: C04B35/468

CPC classification number: C04B35/468 ,  C03C3/064 ,  C03C3/091 ,  C03C14/004 ,  C04B35/462 ,  C04B2235/3208 ,  C04B2235/3215 ,  C04B2235/3217 ,  C04B2235/3224 ,  C04B2235/3229 ,  C04B2235/3236 ,  C04B2235/36 ,  C04B2235/6025 ,  C04B2235/96 ,  H01G4/1218 ,  H01G4/129

Abstract: A ceramic material composition advantageously used as a material for a ceramic substrate containing for example a resistor such as an isolator disposed therein. includes about 10 to 45 percent by weight of a BaO—TiO2—ReO3/2 ceramic composition, the ceramic composition being represented by xBaO-yTiO2-zReO3/2 (wherein x, y, and z each represent mole percent, 8≦x≦18, 52.5≦y≦65, and 20≦z≦40, and x+y+z=100; and Re represents a rare-earth element); about 5 to 40 percent by weight of alumina; and about 40 to 65 percent by weight of a borosilicate glass composition containing about 4 to 17.5 percent by weight of B2O3, about 28 to 50 percent by weight of SiO2, 0 to about 20 percent by weight of Al2O3, and about 36 to 50 percent by weight of MO (wherein MO represents at least one compound selected from CaO, MgO, SrO and BaO), wherein the total content of the BaO—TiO2—ReO3/2 ceramic composition and alumina is about 35 percent by weight or more.

Abstract translation: 一种陶瓷材料组合物，有利地用作陶瓷衬底的材料，该陶瓷衬底包含例如设置在其中的隔离器等电阻器。 包括约10至45重量％的BaO-TiO 2 -ReO 3/2 / 2陶瓷组合物，该陶瓷组合物由xBaO-yTiO 2 3/2（其中x，y和z各自表示摩尔百分数，8≤x≤18,52.5≤y= 65和20 < = 40，x + y + z = 100; Re表示稀土元素）。 约5至40重量％的氧化铝; 和约40至65重量％的含有约4至17.5重量％的B 2 O 3 3的硼硅酸盐玻璃组合物，约28至50重量％的SiO 0〜20重量％的Al 2 O 3，和约36〜50重量％的MO（其中MO表示 至少一种选自CaO，MgO，SrO和BaO的化合物），其中BaO-TiO 2 -ReO 3/2 / 2陶瓷组合物和氧化铝的总含量约为 35重量％以上。

公开(公告)号：US20040053020A1

公开(公告)日：2004-03-18

申请号：US10466886

申请日：2003-07-22

Inventor： Yasuaki Mashiko ,  Hideshi Sekimori ,  Naotomi Takahashi

IPC: B05D005/12 ,  B05D001/36 ,  B32B003/00

CPC classification number: H01G4/1209 ,  C25D11/04 ,  C25D11/18 ,  H01G4/129 ,  H05K1/162 ,  H05K2201/0179 ,  H05K2201/0338 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2203/0315 ,  Y10T428/24917

Abstract: An object of the present invention is to provide a laminate for forming a capacitor layer for a printed wiring board which is capable of ensuring a higher capacitance and an inner layer core material using the laminate for example. In order to achieve this object, a material for forming a capacitor layer comprising a three-layered structure of an aluminum layer 2/a modified alumina barrier layer 3/an electrode copper layer 4 is used, such as a laminate 1a for forming a capacitor layer in which the above described modified alumina barrier layer 3 is obtained through subjecting one side of an aluminum plate or aluminum foil to an anodic treatment to form an alumina barrier layer as a uniform oxide layer and then subjecting the alumina material with the above described alumina barrier layer formed thereon to a boiling and modifying treatment in water and the above described modified aluminum barrier layer 3 is used as a dielectric layer.

Abstract translation: 本发明的目的是提供一种用于形成能够确保较高电容的印刷电路板的电容器层的层叠体，以及使用该层叠体的内层芯材。 为了实现这个目的，使用包括铝层2 /改性氧化铝阻挡层3 /电极铜层4的三层结构的电容器层形成材料，例如用于形成电容器 通过使铝板或铝箔的一面进行阳极处理而形成上述氧化铝阻隔层3，形成氧化铝阻隔层作为均匀的氧化物层，然后将氧化铝材料与上述氧化铝 形成在其上的阻挡层进行在水中的沸腾和改性处理，并且使用上述改性铝阻挡层3作为介电层。

公开(公告)号：US06211543B1

公开(公告)日：2001-04-03

申请号：US09543637

申请日：2000-04-06

Applicant: Robert Benjamin Laibowitz ,  Thomas McCarroll Shaw

Inventor： Robert Benjamin Laibowitz ,  Thomas McCarroll Shaw

IPC: H01L2976

CPC classification number: H01L28/55 ,  H01G4/10 ,  H01G4/129 ,  H01L21/31691

Abstract: A capacitor and method of making is described incorporating a semiconductor substrate, a bottom electrode formed on or in the substrate, a dielectric layer of barium or lead silicate, and a top electrode. A sandwich dielectric of a barium or lead silicate and a high dielectric constant material such as barium or lead titanate may form the dielectric. The silicate layer may be formed by evaporating and diffusing, ion implanting, or electroplating and diffusing barium or lead. The high epsilon dielectric constant material may be formed by sol gel deposition, metal organic chemical vapor deposition or sputtering. The invention overcomes the problem of a bottom electrode and dielectric layer which chemically interact to form a silicon oxide layer in series or below the desired dielectric layer.

Abstract translation: 描述了一种电容器和制造方法，其包括半导体衬底，形成在衬底上或衬底中的底部电极，钡或硅酸铅的电介质层和顶部电极。 钡或硅酸铅和高介电常数材料如钡或钛酸铅的三明治电介质可形成电介质。 硅酸盐层可以通过蒸发和扩散，离子注入或电镀和扩散钡或铅而形成。 高ε介电常数材料可以通过溶胶凝胶沉积，金属有机化学气相沉积或溅射形成。 本发明克服了底部电极和电介质层的问题，化学相互作用以形成串联或低于所需电介质层的氧化硅层。

公开(公告)号：US6090659A

公开(公告)日：2000-07-18

申请号：US314409

申请日：1999-05-19

Applicant: Robert Benjamin Laibowitz ,  Thomas McCarroll Shaw

Inventor： Robert Benjamin Laibowitz ,  Thomas McCarroll Shaw

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/316 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062

CPC classification number: H01L28/55 ,  H01G4/10 ,  H01G4/129 ,  H01L21/31691

Abstract: A capacitor and method of making is described incorporating a semiconductor substrate, a bottom electrode formed on or in the substrate, a dielectric layer of barium or lead silicate, and a top electrode. A sandwich dielectric of a barium or lead silicate and a high dielectric constant material such as barium or lead titanate may comprise the dielectric. The silicate layer may be formed by evaporating and diffusing, ion implanting, or electroplating and diffusing barium or lead. The high epsilon dielectric constant material may be formed by sol gel deposition, metal organic chemical vapor deposition or sputtering. The invention overcomes the problem of a bottom electrode and dielectric layer which chemically interact to form a silicon oxide layer in series or below the desired dielectric layer.

Abstract translation: 描述了一种电容器和制造方法，其包括半导体衬底，形成在衬底上或衬底中的底部电极，钡或硅酸铅的电介质层和顶部电极。 钡或硅酸铅和诸如钡或钛酸铅的高介电常数材料的夹层电介质可以包括电介质。 硅酸盐层可以通过蒸发和扩散，离子注入或电镀和扩散钡或铅而形成。 高ε介电常数材料可以通过溶胶凝胶沉积，金属有机化学气相沉积或溅射形成。 本发明克服了底部电极和电介质层的问题，化学相互作用以形成串联或低于所需电介质层的氧化硅层。

公开(公告)号：US4870539A

公开(公告)日：1989-09-26

申请号：US297907

申请日：1989-01-17

Applicant: Dudley A. Chance ,  Yung-Haw Hu

Inventor： Dudley A. Chance ,  Yung-Haw Hu

IPC: C03C10/02 ,  C04B35/468 ,  C04B35/47 ,  H01G4/12

CPC classification number: C04B35/47 ,  C04B35/4682 ,  H01G4/1281 ,  H01G4/129 ,  Y10T29/435

Abstract: A high dielectric constant glass-ceramic material comprising small conducting grains based on BaTiO.sub.3 and/or SrTiO.sub.3 on the order of about 0.5-10.0 .mu.m surrounded by a thin microcrystalline insulating barrier layer at the grain boundary about 0.01-0.10 .mu.m thick wherein the conductivity of the grains is enhanced by addition of about 0.1-4.0 mol % of a dopant selected from among Group V elements, Ge and Si substantially incorporated in the bulk lattice of the grains upon Ti sites. A novel process for forming the glass-ceramic material is also disclosed.