摘要:
A method of depositing a thin film on a substrate in a semiconductor device using Atomic Layer Deposition (ALD) process parameters exposes the substrate to at least one adherent material in a quantity sufficient for the material to adsorb onto the substrate and thereby form an initiation layer. The initiation layer presents at least one first reactive moiety which is then chemically reacted with at least one first reaction material using atomic layer deposition conditions to form a second reactive moiety. The second reactive moiety is then chemically reacted with at least one second reaction material under process conditions sufficient to form a reaction layer over the initiation layer. The process may be repeated to form successive reaction layers over the initiation layer. The adherent material constituting the initiation layer is preferably one which is not substantially degraded by the atomic layer deposition parameters. The initiation layer together with one or more reaction layer(s) constitutes the final film.
摘要:
An anti-reflective coating material layer is provided that has a relatively high etch rate such that it can be removed simultaneously with the cleaning of a defined opening in a relatively short period of time without affecting the critical dimensions of the opening. A method of forming such a layer includes providing a substrate assembly surface and using a gas mixture of at least a silicon containing precursor, a nitrogen containing precursor, and an oxygen containing precursor. The layer is formed at a temperature in the range of about 50° C. to about 600° C. Generally, the anti-reflective coating material layer deposited is SixOyNz:H, where x is in the range of about 0.39 to about 0.65, y is in the range of about 0.02 to about 0.56, z is in the range of about 0.05 to about 0.33, and where the atomic percentage of hydrogen in the inorganic anti-reflective coating material layer is in the range of about 10 atomic percent to about 40 atomic percent. The total SiH4 flow is generally in the range of about 80 sccm to about 400 sccm. The gas mixture may include SiH4 and N2O, where the ratio of SiH4:N2O is in the range of about 0.25 to 0.60. The inorganic anti-reflective coating material layer may be used for defining contact openings, openings for forming capacitor structures, or any other openings in oxide layers.
摘要:
A method for forming a metal/metal oxide structure that includes forming metal oxide regions, e.g., ruthenium oxide regions, at grain boundaries of a metal layer, e.g., platinum. Preferably, the metal oxide regions are formed by diffusion of oxygen through grain boundaries of the metal layer, e.g., platinum, to oxidize a metal layer thereon, e.g, ruthenium layer. The structure is particularly advantageous for use in capacitor structures and memory devices, such as dynamic random access memory (DRAM) devices.
摘要:
This invention pertains to a method of fabricating a MRAM structure and the resulting structure. The MRAM structure of the invention has the pinned layer recessed within a trench with the upper magnetic layer positioned over it. The method of MRAM fabrication utilizes a spacer processing technique, whereby the upper magnetic layer of the MRAM stack structure is formed between the region defined by the spacers, thereby allowing for self-alignment of the upper magnetic layer over the underlying pinned magnetic layer.
摘要:
Described herein is a method for producing a haze-free (Ba, Sr)TiO3 (BST) film, and devices incorporating the same. In one embodiment, the BST film is made haze-free by depositing the film with a substantially uniform desired crystal orientation, for example, (100), preferably by forming the film by metal-organic chemical vapor deposition at a temperature greater than about 580° C. at a rate of less than about 80 Å/min, to result in a film having about 50 to 53.5 atomic percent titanium. In another embodiment, where the BST film serves as a capacitor for a DRAM memory cell, a desired {100} orientation is induced by depositing the bottom electrode over a nucleation layer of NiO, which gives the bottom electrode a preferential {100} orientation. BST is then grown over the {100} oriented bottom electrode also with a {100} orientation. A nucleation layer of materials such as Ti, Nb and Mn can also be provided over the bottom electrode and beneath the BST film to induce smooth, haze-free BST growth. Haze-free BST film can also be favored by forming the bottom electrode at high temperatures close to those used for BST deposition, and without a vacuum break between the bottom electrode and BST deposition.
摘要:
An anti-reflective coating material layer is provided that has a relatively high etch rate such that it can be removed simultaneously with the cleaning of a defined opening in a relatively short period of time without affecting the critical dimensions of the opening. A method of forming such a layer includes providing a substrate assembly surface and using a gas mixture of at least a silicon containing precursor, a nitrogen containing precursor, and an oxygen containing precursor. The layer is formed at a temperature in the range of about 50° C. to about 600° C. Generally, the anti-reflective coating material layer deposited is SixOyNz:H, where x is in the range of about 0.39 to about 0.65, y is in the range of about 0.02 to about 0.56, z is in the range of about 0.05 to about 0.33, and where the atomic percentage of hydrogen in the inorganic anti-reflective coating material layer is in the range of about 10 atomic percent to about 40 atomic percent. The total SiH4 flow is generally in the range of about 80 sccm to about 400 sccm. The gas mixture may include SiH4 and N2O, where the ratio of SiH4:N2O is in the range of about 0.25 to 0.60. The inorganic anti-reflective coating material layer may be used for defining contact openings, openings for forming capacitor structures, or any other openings in oxide layers.
摘要:
This disclosure provides embodiments for the formation of vertical memory cell structures that may be implemented in RRAM devices. In one embodiment, memory cell area may be increased by varying word line height and/or word line interface surface characteristics to ensure the creation of a grain boundary that is suitable for formation of conductive pathways through an active layer of an RRAM memory cell. This may maintain continuum behavior while reducing random cell-to-cell variability that is often encountered at nanoscopic scales. In another embodiment, such vertical memory cell structures may be formed in multiple-tiers to define a three-dimensional RRAM memory array. Further embodiments also provide a spacer pitch-doubled RRAM memory array that integrates vertical memory cell structures.
摘要:
A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. The first conductive electrode has an elevationally outermost surface and opposing laterally outermost edges at the elevationally outermost surface in one planar cross section. Multi-resistive state metal oxide-comprising material is formed over the first conductive electrode. Conductive material is deposited over the multi-resistive state metal oxide-comprising material. A second conductive electrode of the memory cell which comprises the conductive material is received over the multi-resistive state metal oxide-comprising material. The forming thereof includes etching through the conductive material to form opposing laterally outermost conductive edges of said conductive material in the one planar cross section at the conclusion of said etching which are received laterally outward of the opposing laterally outermost edges of the first conductive electrode in the one planar cross section.
摘要:
Described embodiments include photonic integrated circuits and systems with photonic devices, including thermal isolation regions for the photonic devices. Methods of fabricating such circuits and systems are also described.
摘要:
Devices and systems to perform optical alignment by using one or more liquid crystal layers to actively steer a light beam from an optical fiber to an optical waveguide integrated on a chip. An on-chip feedback mechanism can steer the beam between the fiber and a grating based waveguide to minimize the insertion loss of the system.