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公开(公告)号：US09733685B2
公开(公告)日：2017-08-15
申请号：US14967929
申请日：2015-12-14
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Charles R. Lefurgy , Karthick Rajamani , Richard F. Rizzolo , Malcolm S. Allen-Ware
Abstract: A method, system, and computer program product for controlling power supplied to a processor is disclosed. A voltage regulator is set to a first voltage regulator set point, wherein the first voltage regulator set point provides a first load line for operation of the processor. A change in an operation of the processor from a first operating condition along the first load line to a second operating condition along the first load line is determined. The voltage regulator is the set to a second voltage regulator set point and the processor is operated at a third operating condition on a second load line corresponding to the second voltage regulator set point.
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公开(公告)号：US09568982B1
公开(公告)日：2017-02-14
申请号：US14814901
申请日：2015-07-31
Applicant: International Business Machines Corporation
Inventor： Malcolm S. Allen-Ware , Charles R. Lefurgy , Karthick Rajamani , Todd J. Rosedahl , Guillermo J. Silva , Gregory S. Still , Victor Zyuban
CPC classification number: G06F1/3243 , G06F1/3234 , G06F1/324 , G06F1/3287 , G06F1/3296 , Y02D10/126 , Y02D10/152 , Y02D10/171 , Y02D10/172
Abstract: A system for adjusting a frequency of a processor is disclosed herein. The system includes a processor and a memory. The memory stores program code, which, when executed on the processor, performs an operation for adjusting a frequency of a processor. The operation includes inhibiting one or more processor cores from exiting an idle state. The operation further includes determining a number of processor cores requesting exit from the idle state and a number of non-idle processor cores. The operation also includes selecting a maximum frequency for the inhibited and non-idle processor cores based on the number of inhibited processor cores requesting exit from the idle state and the number of non-idle processor cores. The operation includes setting the maximum frequency for both the inhibited and the non-idle processor cores, and then uninhibiting the processor cores requesting exit from the idle state.
Abstract translation: 本文公开了一种用于调整处理器频率的系统。 该系统包括处理器和存储器。 存储器存储程序代码，当在处理器上执行时，执行用于调整处理器频率的操作。 该操作包括禁止一个或多个处理器核离开空闲状态。 该操作还包括确定请求退出空闲状态的处理器核心数量以及多个非空闲处理器核心。 该操作还包括基于所请求退出空闲状态的禁止处理器核心数量和非空闲处理器核心数量来选择禁用和非空闲处理器核心的最大频率。 该操作包括设置禁止和非空闲处理器核心的最大频率，然后禁止要求退出空闲状态的处理器核心。
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公开(公告)号：US09547587B2
公开(公告)日：2017-01-17
申请号：US14286148
申请日：2014-05-23
Applicant: International Business Machines Corporation
Inventor： Malcolm S. Allen-Ware , Shawn P. Authement , Charles R. Lefurgy , Karthick Rajamani , Andrew D. Walls
CPC classification number: G06F12/0246 , G06F1/206 , G06F1/3206 , G06F1/3225 , G06F12/02 , G06F2212/7206
Abstract: A mechanism is provided for dynamic power and thermal capping in a flash storage system. A set of measurement values are received for the flash storage system, the set of measurement values comprising one or more of a set of current (I) measurement values, a set of voltage (V) measurement values, or a set of temperature (T) measurement values. An average current (Iavg) value from the set of current (I) measurements and, responsive to the average current (Iavg) value being greater than a predetermined maximum current (Imax) value, a determination is made as to whether a rate at which erase operations are performed for the flash storage system is greater than a predetermined minimum erase rate. Responsive to the rate at which erase operations are performed for the flash storage system being greater than the predetermined minimum erase rate, the rate at which erase operations are performed for the flash storage system are decreased by a predetermined value.
Abstract translation: 提供了一种用于闪存存储系统中的动态功率和热封的机制。 接收闪存存储系统的一组测量值，该组测量值包括一组当前（I）测量值，一组电压（V）测量值或一组温度（T ）测量值。 来自当前（I）测量集合的平均电流（Iavg）值，并且响应于平均电流（Iavg）值大于预定最大电流（Imax）值，确定是否 闪存存储系统的擦除操作大于预定的最小擦除率。 响应于对于闪存存储系统执行擦除操作的速率大于预定最小擦除速率的速率，对闪存存储系统执行擦除操作的速率减小预定值。
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104.发明授权公开(公告)号：US09459599B2
公开(公告)日：2016-10-04
申请号：US14046056
申请日：2013-10-04
Applicant: International Business Machines Corporation
Inventor： Malcolm S. Allen-Ware , Alan J. Drake , Michael S. Floyd , Tilman Gloekler , Charles R. Lefurgy , Karthick Rajamani
CPC classification number: G05B13/024 , G06F11/008
Abstract: A mechanism is provided for implementing an operational parameter change within the data processing system based on an identified degradation. One or more degradations existing in the data processing system are identified based on a set of degradation values obtained from a set of degradation sensors. A determination is made as to whether one or more operational parameters need to be modified based on the one or more identified degradations. Responsive to determining that the one or more operational parameters need to be modified based on the one or more identified degradations, an input change is implemented to a one or more control devices in order that the one or more operational parameters are modified.
Abstract translation: 提供了一种用于基于所识别的劣化在数据处理系统内实现操作参数变化的机制。 基于从一组劣化传感器获得的一组劣化值来识别数据处理系统中存在的一个或多个劣化。 确定是否需要基于一个或多个所识别的退化来修改一个或多个操作参数。 响应于基于所述一个或多个所识别的劣化来确定所述一个或多个操作参数需要被修改，对一个或多个控制设备实施输入改变，以便修改所述一个或多个操作参数。
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公开(公告)号：US09354943B2
公开(公告)日：2016-05-31
申请号：US14219550
申请日：2014-03-19
Applicant: International Business Machines Corporation
Inventor： Pradip Bose , Alper Buyuktosunoglu , Michael S. Floyd , Heather L. Hanson , Hans M. Jacobson , Karthick Rajamani , Srinivasan Ramani , Todd J. Rosedahl , Augusto J. Vega
CPC classification number: G06F9/5094 , G06F1/3243 , Y02D10/152
Abstract: According to an aspect, power management of a multi-core processing system includes determining workload characteristics in the multi-core processing system. A power adjustment scenario is identified based on the workload characteristics. A predetermined actuation order for at least two power adjustment actuators is identified based on the power adjustment scenario. Based on the predetermined actuation order, it is determined whether there is an adequate adjustment capacity for a power adjustment action associated with one of the at least two power adjustment actuators. The power adjustment action is initiated based on the predetermined actuation order and determining that the adequate adjustment capacity is available.
Abstract translation: 根据一个方面，多核处理系统的功率管理包括确定多核处理系统中的工作负载特性。 基于工作负载特征识别功率调整情景。 基于功率调节场景来识别用于至少两个功率调节致动器的预定的致动顺序。 基于预定的致动顺序，确定是否存在与至少两个功率调节致动器中的一个相关联的功率调节动作的适当调节能力。 功率调节动作基于预定的启动顺序开始，并确定适当的调整容量可用。
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Patent Agency Ranking
公开(公告)号：US20160132085A1
公开(公告)日：2016-05-12
申请号：US14987968
申请日：2016-01-05
Applicant: International Business Machines Corporation
Inventor： Irving G. Baysah , John S. Dodson , Karthick Rajamani , Eric E. Retter , Scot H. Rider , Todd Jon Rosedahl , Gregory Scott Still , Gary Van Huben , Malcolm S. Allen-Ware
CPC classification number: G06F1/26 , G06F1/206 , G06F1/32 , G06F1/3203 , G06F1/3206 , G06F11/3037 , G06F11/3409 , Y02D10/11 , Y02D10/16
Abstract: A system with a local data collector that collects power management data for a subsystem. The local data collector can determine whether a first formatting associated with a first channel between the local data collector and a system power management data collector is equivalent to a second formatting associated with a second channel between the local data collector and the system power management data collector, and in response to a determination that the first formatting and second formatting are not equivalent format the power management data according to the first formatting; store the power management data formatted according to the first formatting in a first location in a memory; format the power management data according to the second formatting; and store the power management data formatted according to the second formatting in a second location the memory.
Abstract translation: 具有本地数据收集器的系统，用于收集子系统的电源管理数据。 本地数据收集器可以确定与本地数据收集器和系统电源管理数据收集器之间的第一通道相关联的第一格式是否等于与本地数据收集器和系统电源管理数据收集器之间的第二通道相关联的第二格式化 并且响应于确定所述第一格式化和第二格式化不等效地根据所述第一格式格式化所述功率管理数据; 将根据第一格式格式化的电源管理数据存储在存储器中的第一位置; 根据第二格式格式化电源管理数据; 并将根据第二格式化格式化的电源管理数据存储在第二位置的存储器中。
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公开(公告)号：US20160124486A1
公开(公告)日：2016-05-05
申请号：US14994733
申请日：2016-01-13
Applicant: International Business Machines Corporation
Inventor： Alan Drake , Guillermo J. Silva , Timothy G. Hallett , Heather L. Hanson , Jordan Keuseman , Charles R. Lefurgy , Karthick Rajamani , Todd J. Rosedahl , Malcolm S. Allen-Ware
CPC classification number: G06F1/3234 , G06F1/3206 , G06F1/3225 , G06F9/5094 , Y02B60/142 , Y02D10/22
Abstract: A distributed power management system is configured determine a node power consumption of a node during a first time interval. The system can determine a node power cap. The system can determine a proportional component power budget for a component of the node based, at least in part, on the node power consumption and a component power consumption. The system can determine a power budget for the component for a second time interval based, at least in part on the proportional component power budget.
Abstract translation: 配置分布式电力管理系统在第一时间间隔期间确定节点的节点功率消耗。 系统可以确定节点功率上限。 该系统可以至少部分地基于节点功率消耗和组件功率消耗来确定节点的组件的比例分量功率预算。 该系统可以至少部分地基于比例分量功率预算来确定用于第二时间间隔的组件的功率预算。
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公开(公告)号：US09304886B2
公开(公告)日：2016-04-05
申请号：US13772673
申请日：2013-02-21
Applicant: International Business Machines Corporation
Inventor： Malcolm S. Allen-Ware , Bishop Brock , Tilman Gloekler , Charles R. Lefurgy , Karthick Rajamani , Gregory S. Still
CPC classification number: G06F9/5094 , G06F1/26 , G06F1/3206 , G06F9/45558 , G06F11/301 , G06F11/3013 , G06F11/3017 , G06F11/3051 , G06F11/3062 , G06F11/3476 , G06F2009/45583 , G06F2009/45591 , G06F2201/815 , G06F2201/86 , Y02D10/34
Abstract: Associating processor and processor core energy consumption with a task such as a virtual machine is disclosed. Various events cause a trace record to be written to a trace buffer for a processor. An identifier associated with a task using a processor core of the processor is read. In addition, one or more values associated with an energy consumption of the processor core are read. In response to the event, the one or more values associated with the energy consumption of the processor core and the identifier are written to the trace buffer memory.
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公开(公告)号：US09292074B2
公开(公告)日：2016-03-22
申请号：US13762532
申请日：2013-02-08
Applicant: International Business Machines Corporation
Inventor： Malcolm S. Allen-Ware , Alan Drake , Timothy G. Hallett , Heather L. Hanson , Jordan Keuseman , Charles R. Lefurgy , Karthick Rajamani , Todd J. Rosedahl , Guillermo J. Silva
CPC classification number: G06F1/3234 , G06F1/3206 , G06F1/3225 , G06F9/5094 , Y02B60/142 , Y02D10/22
Abstract: Embodiments include collecting, from each of a plurality of controllers of a node having a plurality of components, component power consumption. Each of the plurality of controllers is associated with one or more of the components. The component power consumptions are provided to the controllers. A node power consumption for the node is determined based, at least in part, on the component power consumption. The power cap is determined for the plurality of components. A power differential power is determined as a difference between the node power consumption and the power cap for the plurality of components. A proportion of the node power consumption consumed by the component is determined based on the component power consumption of the component. A local power budget is computed for the component based, at least in part, on the power differential and the proportion of the node power consumption consumed by the component.
Abstract translation: 实施例包括从具有多个组件的节点的多个控制器中的每一个收集组件功率消耗。 多个控制器中的每一个与一个或多个组件相关联。 组件功耗提供给控制器。 至少部分地基于组件功耗确定节点的节点功耗。 为多个组件确定功率帽。 功率差分功率被确定为节点功耗与多个组件的功率上限之间的差。 基于组件的组件功耗来确定组件消耗的节点功耗的一部分。 至少部分地基于功率差异以及组件消耗的节点功率消耗的比例来为部件计算局部功率预算。
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公开(公告)号：US09256273B2
公开(公告)日：2016-02-09
申请号：US13762532
申请日：2013-02-08
Applicant: International Business Machines Corporation
Inventor： Malcolm S. Allen-Ware , Alan Drake , Timothy G. Hallett , Heather L. Hanson , Jordan Keuseman , Charles R. Lefurgy , Karthick Rajamani , Todd J. Rosedahl , Guillermo J. Silva
Abstract: Embodiments include collecting, from each of a plurality of controllers of a node having a plurality of components, component power consumption. Each of the plurality of controllers is associated with one or more of the components. The component power consumptions are provided to the controllers. A node power consumption for the node is determined based, at least in part, on the component power consumption. The power cap is determined for the plurality of components. A power differential power is determined as a difference between the node power consumption and the power cap for the plurality of components. A proportion of the node power consumption consumed by the component is determined based on the component power consumption of the component. A local power budget is computed for the component based, at least in part, on the power differential and the proportion of the node power consumption consumed by the component.
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