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    Memory Arrays And Methods Of Forming An Array Of Memory Cell
    102.
    发明申请
    Memory Arrays And Methods Of Forming An Array Of Memory Cell 有权
    记忆阵列和形成记忆体阵列的方法

    公开(公告)号：US20160126290A1

    公开(公告)日：2016-05-05

    申请号：US14993306

    申请日：2016-01-12

    Applicant: Micron Technology, Inc.

    Inventor： Scott E. Sills ,  Durai Vishak Nirmal Ramaswamy

    IPC: H01L27/24 ,  H01L45/00

    CPC classification number: H01L27/2436 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/1253 ,  H01L45/141 ,  H01L45/145 ,  H01L45/16 ,  H01L45/1616 ,  H01L45/1666 ,  H01L45/1691

    Abstract: A method of forming an array of memory cells includes forming lines of covering material that are elevationally over and along lines of spaced sense line contacts. Longitudinal orientation of the lines of covering material is used in forming lines comprising programmable material and outer electrode material that are between and along the lines of covering material. The covering material is removed over the spaced sense line contacts and the spaced sense line contacts are exposed. Access lines are formed. Sense lines are formed that are electrically coupled to the spaced sense line contacts. The sense lines are angled relative to the lines of spaced sense line contacts and relative to the access lines. Other embodiments, including structure independent of method, are disclosed.

    Abstract translation: 形成存储单元阵列的方法包括形成沿着间隔的感测线接触线的上方并且沿其间的覆盖材料的线。 覆盖材料线的纵向定向用于形成包括可覆盖材料之间和沿着覆盖材料线的可编程材料和外部电极材料的管线。 覆盖材料在间隔开的感测线触点上被去除，并且间隔开的感测线触点被暴露。 形成访问线。 形成电感耦合到间隔开的感测线触点的感测线。 感测线相对于间隔开的感测线接触线并相对于接入线成角度。 公开了包括与方法无关的结构的其他实施例。

    MEMORY DEVICES AND METHODS OF OPERATING THE SAME
    107.
    发明申请
    MEMORY DEVICES AND METHODS OF OPERATING THE SAME 有权
    存储器件及其操作方法

    公开(公告)号：US20150103613A1

    公开(公告)日：2015-04-16

    申请号：US14055643

    申请日：2013-10-16

    Applicant: Micron Technology, Inc.

    Inventor： Martin F. Schubert ,  Scott E. Sills

    IPC: G11C8/12

    CPC classification number: G11C8/12 ,  G11C8/10 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0023 ,  G11C13/003 ,  G11C2213/71 ,  G11C2213/78 ,  G11C2213/79

    Abstract: The present disclosure includes memory devices and methods of operating the same. One such device includes an array of groups of memory cells, a group selector configured to select a particular group of memory cells from within the array, and a cell selector configured to select a particular memory cell from within the selected particular group of memory cells.

    Abstract translation: 本公开包括存储器件及其操作方法。 一个这样的设备包括存储器单元组的阵列，配置为从阵列内选择特定的存储器单元组的组选择器，以及被配置为从所选择的特定存储单元组内选择特定存储器单元的单元选择器。

    MEMORY CELL STRUCTURES
    109.
    发明申请
    MEMORY CELL STRUCTURES 有权
    存储单元结构

    公开(公告)号：US20140346428A1

    公开(公告)日：2014-11-27

    申请号：US13899919

    申请日：2013-05-22

    Applicant: Micron Technology, Inc.

    Inventor： Scott E. Sills ,  D.V. Nirmal Ramaswamy

    IPC: H01L45/00 ,  H01L27/24

    CPC classification number: H01L45/1683 ,  H01L27/2409 ,  H01L27/2418 ,  H01L27/2472 ,  H01L27/2481

    Abstract: The present disclosure includes memory cell structures and method of forming the same. One such method includes forming a memory cell includes forming, in a first direction, a select device stack including a select device formed between a first electrode and a second electrode; forming, in a second direction, a plurality of sacrificial material lines over the select device stack to form a via; forming a programmable material stack within the via; and removing the plurality of sacrificial material lines and etching through a portion of the select device stack to isolate the select device.

    Abstract translation: 本公开内容包括存储单元结构及其形成方法。 一种这样的方法包括形成存储单元，包括在第一方向上形成包括形成在第一电极和第二电极之间的选择装置的选择装置堆叠; 在第二方向上形成多个在所述选择装置叠层上的牺牲材料线以形成通孔; 在所述通孔内形成可编程材料堆叠; 以及去除所述多个牺牲材料线并蚀刻通过所述选择装置堆叠的一部分以隔离所述选择装置。

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