Abstract:
A display device is provided. The display device includes a substrate and a light emitting unit disposed on the substrate. The light emitting unit includes an electrode electrically connected to a semiconductor layer. The electrode has a first surface farthest from the semiconductor layer and the semiconductor layer has a second surface adjacent to the electrode. A roughness of the first surface is greater than a roughness of the second surface.
Abstract:
A display device is provided. The display device includes a supporting film and a flexible substrate disposed on the supporting film. The display device also includes a driving layer disposed on the flexible substrate, and a conductive pad disposed on the driving layer. The display device further includes a light-emitting diode disposed on the conductive pad and electrically connected to the conductive pad, wherein the supporting film has a first hardness, the flexible substrate has a second hardness, and the first hardness is greater than or equal to the second hardness.
Abstract:
A display device comprises a first LED coupled with an input node, and further comprises pixel driver circuitry. The pixel driver circuitry comprises a data input transistor configured to conduct, based on a first control signal, a data signal across a first channel having a first channel W/L ratio. The pixel driver circuitry further comprises a drive transistor configured to conduct, based on the data signal, current across a second channel into the input node. The second channel has a second channel W/L ratio. The pixel driver circuitry further comprises a reset transistor configured to conduct, based on a received second control signal, a first reference voltage signal across a third channel into the input node. The third channel has a third channel W/L ratio. At least one of the first channel W/L ratio, the second channel W/L ratio, and the third channel W/L ratio is different.
Abstract:
An array substrate structure is provided, which includes a substrate with a first surface and a second surface opposite to the first surface. A first TFT is on the first surface of the substrate, and a second TFT is on the second surface of the substrate. A through via passes through the substrate, and the first TFT is electrically connected to the second TFT through the through via.
Abstract:
A display device is provided. The display device includes a first substrate, a second substrate, a display layer, an active element layer, and a planar layer disposed on the active element layer. The planar layer includes a first contact hole. The display device further includes an electrode pad disposed on the planar layer. The display device further includes a passivation layer disposed on the electrode pad and the planar layer. The passivation layer includes a second contact hole. The first contact hole partially overlaps the second contact hole. The second contact hole has a projection on the planar layer and on the active element layer located at the bottom of the first contact hole, and the greatest width of the projection is at a first axis. The width of the electrode pad perpendicular to the first axis has a specific width change.
Abstract:
A display includes a substrate having a driver circuit with hybrid devices. The driver circuit includes first to fourth transistors. The first transistor includes a first control end connected to a clock signal, a first end connected to a high voltage, and a second end connected to a first node. The second transistor comprises metal oxide semiconductor, and includes a second control end connected to an input signal, a third end connected to a second node, and a fourth end connected to the first node. The third transistor comprises polysilicon semiconductor, and includes a third control end connected to the first node, and a fifth end connected to the high voltage, and a sixth end connected to an output voltage. The fourth transistor includes a fourth control end connected to the input signal, a seventh end connected to the third node, and an eighth end connected to the output voltage.
Abstract:
A display panel includes a first substrate, and the first substrate includes a base plate; a first conducive line disposed on the base plate and extending along the first direction; a second conducive line and a third conducive line disposed on the base plate and extending along the second direction; a contact pad positioned between the second and third conducive lines; a semi-conductive layer connecting the contact pad and the second conducive line, and the semi-conductive layer having a thickness d; and a pixel electrode connecting the contact pad. The semi-conductive layer has a channel width W (μm) and a channel length L (μm) between the contact pad and the second conducive line, and a pixel distance Px (μm) between the second and third conducive lines along the first direction, wherein the channel width W is conformed to the following equation: ( 3.035 - 1.5 ) ≤ W - 0.008 × ( P x × L d ) ≤ ( 3.035 + 1.5 ) .
Abstract:
A display panel is provided. The display panel includes a first substrate having a display area and a non-display area. A sealant is disposed on the first substrate and on the non-display area. A planarization layer is disposed on the first substrate. The planarization layer has a first trench formed therein on the non-display area. The first trench has a bottom and a side adjacent to the bottom. The bottom has a roughness that is greater than the roughness of the side.
Abstract:
An embodiment of the invention provides a manufacturing method of a thin film transistor including: providing a substrate; sequentially forming a gate electrode, a gate insulating layer covering the gate electrode, and an active layer on the substrate; forming a conductive layer on the active layer and including a source electrode, a drain electrode, and a separating portion connecting therebetween; forming a first photoresist layer on the conductive layer and covering the source electrode and the drain electrode and exposing the separating portion; oxidizing the separating portion into an insulating metal oxide layer so as to electrically insulate the source electrode from the drain electrode; and removing the first photoresist layer.
Abstract:
An embodiment of the invention provides a manufacturing method of a thin film transistor substrate including: sequentially forming a gate electrode, a gate insulating layer covering the gate electrode, an active material layer, and a photo-sensitive material layer on a first substrate; performing a photolithography process by using a half tone mask to form a photo-sensitive protective layer which is above the gate electrode and has a first recess and a second recess; etching the active material layer by using the photo-sensitive protective layer as a mask to form an active layer; removing a portion of the photo-sensitive protective layer at bottoms of the first recess and the second recess to expose a first portion and a second portion of the active layer respectively; forming a first electrode connecting to the first portion; and forming a second electrode connecting to the second portion.