PERFORMING SELECTIVE COPYBACK IN MEMORY DEVICES

    公开(公告)号:US20230268018A1

    公开(公告)日:2023-08-24

    申请号:US17675477

    申请日:2022-02-18

    摘要: Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations comprising determining a data validity metric value with respect to a source set of memory cells of the memory device; determining whether the data validity metric value satisfies a first threshold criterion; responsive to determining that the data validity metric value satisfies the first threshold criterion, performing a data integrity check on the source set of memory cells to obtain a data integrity metric value; determining whether the data integrity metric value satisfies a second threshold criterion; and responsive to determining that the data integrity metric value fails to satisfy the second threshold criterion, causing the memory device to copy data from the source set of memory cells to a destination set of memory cells of the memory device.

    DATA DISPERSION-BASED MEMORY MANAGEMENT
    115.
    发明公开

    公开(公告)号:US20230141181A1

    公开(公告)日:2023-05-11

    申请号:US18093069

    申请日:2023-01-04

    IPC分类号: G06F3/06

    摘要: A method includes determining a respective number of and respective locations of valid data portions of a plurality of blocks of NAND memory cells, based on the respective locations of the valid data portions, determining respective dispersions of the valid data portions within the plurality of blocks of NAND memory cells, based at least on the respective dispersions, selecting a block of NAND memory cells from the plurality of blocks of NAND memory cells, and performing a folding operation on the selected block.

    SLC cache management
    116.
    发明授权

    公开(公告)号:US11635899B2

    公开(公告)日:2023-04-25

    申请号:US17573224

    申请日:2022-01-11

    摘要: Disclosed in some examples are memory devices which feature customizable Single Level Cell (SLC) and Multiple Level Cell (MLC) configurations. The SLC memory cells serve as a high-speed cache providing SLC level performance with the storage capacity of a memory device with MLC memory cells. The proportion of cells configured as MLC vs the proportion that are configured as SLC storage may be configurable, and in some examples, the proportion may change during usage based upon configurable rules based upon memory device metrics. In some examples, when the device activity is below an activity threshold, the memory device may skip the SLC cache and place the data directly into the MLC storage to reduce power consumption.

    MEDIA MANAGEMENT OPERATIONS BASED ON A RATIO OF VALID DATA

    公开(公告)号:US20230057863A1

    公开(公告)日:2023-02-23

    申请号:US17981649

    申请日:2022-11-07

    IPC分类号: G06F3/06

    摘要: A method includes determining that a ratio of valid data portions of a block of memory cells is greater than or less than a valid data portion threshold and performing a first media management operation on the block of memory cells in response to determining that the ratio of valid data portions is greater than the valid data portion threshold. The method further includes performing a second media management operation on the block of memory cells in response to determining that the ratio of valid data portions is less than the valid data portion threshold.