Nanowire mesh FET with multiple threshold voltages
    111.
    发明授权
    Nanowire mesh FET with multiple threshold voltages 有权
    具有多个阈值电压的纳米线网状FET

    公开(公告)号:US08422273B2

    公开(公告)日:2013-04-16

    申请号:US12470159

    申请日:2009-05-21

    IPC分类号: G11C11/00

    摘要: Nanowire-based field-effect transistors (FETs) and techniques for the fabrication thereof are provided. In one aspect, a FET is provided having a plurality of device layers oriented vertically in a stack, each device layer having a source region, a drain region and a plurality of nanowire channels connecting the source region and the drain region, wherein one or more of the device layers are configured to have a different threshold voltage from one or more other of the device layers; and a gate common to each of the device layers surrounding the nanowire channels.

    摘要翻译: 提供了基于纳米线的场效应晶体管(FET)及其制造技术。 在一个方面,提供了一种FET,其具有在堆叠中垂直取向的多个器件层,每个器件层具有源极区,漏极区和连接源区和漏区的多个纳米线通道,其中一个或多个 的器件层被配置为具有来自一个或多个其它器件层的不同阈值电压; 以及围绕纳米线通道的每个器件层共用的栅极。

    Method to Transfer Lithographic Patterns Into Inorganic Substrates
    112.
    发明申请
    Method to Transfer Lithographic Patterns Into Inorganic Substrates 有权
    将光刻图案转移到无机基板中的方法

    公开(公告)号:US20130026133A1

    公开(公告)日:2013-01-31

    申请号:US13191985

    申请日:2011-07-27

    IPC分类号: C23F1/02

    摘要: Techniques for minimizing or eliminating pattern deformation during lithographic pattern transfer to inorganic substrates are provided. In one aspect, a method for pattern transfer into an inorganic substrate is provided. The method includes the following steps. The inorganic substrate is provided. An organic planarizing layer is spin-coated on the inorganic substrate. The organic planarizing layer is baked. A hardmask is deposited onto the organic planarizing layer. A photoresist layer is spin-coated onto the hardmask. The photoresist layer is patterned. The hardmask is etched through the patterned photoresist layer using reactive ion etching (RIE). The organic planarizing layer is etched through the etched hardmask using RIE. A high-temperature anneal is performed in the absence of oxygen. The inorganic substrate is etched through the etched organic planarizing layer using reactive ion etching.

    摘要翻译: 提供了在将光刻图案转移到无机基底期间最小化或消除图案变形的技术。 一方面,提供了图案转印到无机基板中的方法。 该方法包括以下步骤。 提供无机基材。 将有机平面化层旋涂在无机基材上。 烘烤有机平坦化层。 硬掩模沉积在有机平坦化层上。 将光致抗蚀剂层旋涂在硬掩模上。 对光刻胶层进行图案化。 使用反应离子蚀刻(RIE),通过图案化的光刻胶层蚀刻硬掩模。 使用RIE蚀刻通过蚀刻的硬掩模的有机平坦化层。 在不存在氧的情况下进行高温退火。 使用反应离子蚀刻通过蚀刻的有机平坦化层蚀刻无机衬底。

    Silicide Micromechanical Device and Methods to Fabricate Same
    113.
    发明申请
    Silicide Micromechanical Device and Methods to Fabricate Same 有权
    硅化物微机械装置及其制造方法

    公开(公告)号:US20120318649A1

    公开(公告)日:2012-12-20

    申请号:US13164126

    申请日:2011-06-20

    IPC分类号: H01H57/00 H01L21/285

    摘要: A method is disclosed to fabricate an electro-mechanical device such as a MEMS or NEMS switch. The method includes providing a silicon layer disposed over an insulating layer that is disposed on a silicon substrate; releasing a portion of the silicon layer from the insulating layer so that it is at least partially suspended over a cavity in the insulating layer; depositing a metal (e.g., Pt) on at least one surface of at least the released portion of the silicon layer and, using a thermal process, fully siliciding at least the released portion of the silicon layer using the deposited metal. The method eliminates silicide-induced stress to the released Si member, as the entire Si member is silicided. Furthermore no conventional wet chemical etch is used after forming the fully silicided material thereby reducing a possibility of causing corrosion of the silicide and an increase in stiction.

    摘要翻译: 公开了一种制造诸如MEMS或NEMS开关的机电装置的方法。 该方法包括提供设置在设置在硅衬底上的绝缘层上的硅层; 从所述绝缘层释放所述硅层的一部分,使得其至少部分地悬挂在所述绝缘层中的空腔上; 在至少所述硅层的释放部分的至少一个表面上沉积金属(例如Pt),并且使用热处理,使用沉积的金属至少完全硅化硅层的释放部分。 当整个Si元件被硅化时,该方法消除了对释放的Si元件的硅化物引起的应力。 此外,在形成完全硅化材料之后,也不使用常规的湿化学蚀刻,从而减少引起硅化物腐蚀和粘性增加的可能性。

    RESONANCE NANOELECTROMECHANICAL SYSTEMS
    114.
    发明申请
    RESONANCE NANOELECTROMECHANICAL SYSTEMS 有权
    谐振纳米电子系统

    公开(公告)号:US20120268985A1

    公开(公告)日:2012-10-25

    申请号:US13092247

    申请日:2011-04-22

    IPC分类号: G11C11/50 H03B5/30

    摘要: Systems and methods for operating a nanometer-scale cantilever beam with a gate electrode. An example system includes a drive circuit coupled to the gate electrode where a drive signal from the circuit may cause the beam to oscillate at or near the beam's resonance frequency. The drive signal includes an AC component, and may include a DC component as well. An alternative example system includes a nanometer-scale cantilever beam, where the beam oscillates to contact a plurality of drain regions.

    摘要翻译: 用栅电极操作纳米级悬臂梁的系统和方法。 示例性系统包括耦合到栅电极的驱动电路,其中来自电路的驱动信号可以使光束在光束的共振频率处或其附近振荡。 驱动信号包括AC分量,并且还可以包括DC分量。 替代示例系统包括纳米级悬臂梁,其中光束振荡以接触多个漏极区域。

    Single Gate Inverter Nanowire Mesh
    115.
    发明申请
    Single Gate Inverter Nanowire Mesh 失效
    单门逆变器纳米线网

    公开(公告)号:US20120138888A1

    公开(公告)日:2012-06-07

    申请号:US13316515

    申请日:2011-12-11

    摘要: A FET inverter is provided that includes a plurality of device layers oriented vertically in a stack, each device layer having a source region, a drain region and a plurality of nanowire channels, wherein the source and drain regions of one or more of the device layers are doped with an n-type dopant and the source and drain regions of one or more other of the device layers are doped with a p-type dopant; a gate common to each of the device layers surrounding the nanowire channels; a first contact to the source regions of the one or more device layers doped with an n-type dopant; a second contact to the source regions of the one or more device layers doped with a p-type dopant; and a third contact common to the drain regions of each of the device layers. Techniques for fabricating a FET inverter are also provided.

    摘要翻译: 提供一种FET逆变器,其包括在堆叠中垂直取向的多个器件层,每个器件层具有源极区,漏极区和多个纳米线通道,其中一个或多个器件层的源极和漏极区 掺杂有n型掺杂剂,并且一个或多个其它器件层的源极和漏极区掺杂有p型掺杂剂; 围绕纳米线通道的每个器件层共用的栅极; 与掺杂有n型掺杂剂的一个或多个器件层的源极区的第一接触; 与掺杂有p型掺杂剂的一个或多个器件层的源极区的第二接触; 以及每个器件层的漏极区域共同的第三接触。 还提供了用于制造FET逆变器的技术。

    Single Gate Inverter Nanowire Mesh
    117.
    发明申请
    Single Gate Inverter Nanowire Mesh 有权
    单门逆变器纳米线网

    公开(公告)号:US20100295021A1

    公开(公告)日:2010-11-25

    申请号:US12470128

    申请日:2009-05-21

    摘要: Nanowire-based devices are provided. In one aspect, a field-effect transistor (FET) inverter is provided. The FET inverter includes a plurality of device layers oriented vertically in a stack, each device layer having a source region, a drain region and a plurality of nanowire channels connecting the source region and the drain region, wherein the source and drain regions of one or more of the device layers are doped with an n-type dopant and the source and drain regions of one or more other of the device layers are doped with a p-type dopant; a gate common to each of the device layers surrounding the nanowire channels; a first contact to the source regions of the one or more device layers doped with an n-type dopant; a second contact to the source regions of the one or more device layers doped with a p-type dopant; and a third contact common to the drain regions of each of the device layers. Techniques for fabricating a FET inverter are also provided.

    摘要翻译: 提供基于纳米线的设备。 一方面,提供了场效应晶体管(FET)逆变器。 FET反相器包括在堆叠中垂直取向的多个器件层,每个器件层具有源极区,漏极区和连接源极区和漏极区的多个纳米线通道,其中一个或多个 更多的器件层掺杂有n型掺杂剂,并且器件层中的一个或多个其它器件层的源极和漏极区掺杂有p型掺杂剂; 围绕纳米线通道的每个器件层共用的栅极; 与掺杂有n型掺杂剂的一个或多个器件层的源极区的第一接触; 与掺杂有p型掺杂剂的一个或多个器件层的源极区的第二接触; 以及每个器件层的漏极区域共同的第三接触。 还提供了用于制造FET逆变器的技术。

    Controlled alignment catalytically grown nanostructures
    118.
    发明授权
    Controlled alignment catalytically grown nanostructures 失效
    受控比对催化生长的纳米结构

    公开(公告)号:US07408186B2

    公开(公告)日:2008-08-05

    申请号:US11089099

    申请日:2005-03-24

    IPC分类号: H01L21/00

    摘要: Systems and methods are described for controlled alignment of catalyticaly grown nanostructures in a large-scale synthesis process. A composition includes an elongated nanostructure including a first segment defining a first axis and a second segment coupled to the first segment, the second segment defining a second axis that is substantially nonparallel to the first axis. A method includes: generating an electric field proximate an edge of a protruding section of an electrode, the electric field defining a vector; and forming an elongated nanostructure located at a position on a surface of a substrate, the position on the surface of the substrate proximate the edge of the protruding section of the electrode, at least one tangent to the elongated nanostructure i) substantially parallel to the vector defined by the electric field and ii) substantially non-parallel to a normal defined by the surface of the substrate.

    摘要翻译: 描述了用于在大规模合成过程中催化生长的纳米结构的受控比对的系统和方法。 组合物包括细长纳米结构,其包括限定第一轴线的第一区段和联接到第一区段的第二段,第二区段限定基本上不平行于第一轴线的第二轴线。 一种方法包括:在电极的突出部分的边缘附近产生电场,所述电场限定矢量; 以及形成位于基底表面上的位置处的细长纳米结构,所述基底表面上靠近所述电极的突出部分的边缘的位置,至少一个细长纳米结构的切线i)基本上平行于所述载体 由电场限定,ii)基本上不平行于由衬底的表面限定的法线。