公开(公告)号：US10020733B2

公开(公告)日：2018-07-10

申请号：US15492884

申请日：2017-04-20

申请人： Texas Instruments Incorporated

发明人： Jianzhang Xie

IPC分类号： H02M3/156 ,  H02M3/158 ,  H02M1/00 ,  H02M1/08

CPC分类号： H02M3/158 ,  H02M1/08 ,  H02M3/1588 ,  H02M2001/0054 ,  H03K17/04206 ,  H03K17/145 ,  H03K17/166 ,  Y02B70/1466 ,  Y02B70/1491

摘要： A DC-to-DC converter includes an input voltage node, an inductor, and a switch coupled to the inductor and the input voltage node. More specifically, the switch has an on state and off state, wherein during the on state, current flowing through the inductor increases and the off state results in a decrease of the current flowing through the inductor via a driver coupled to the switch. The driver comprises a plurality of transistors and an adaptive voltage node, wherein a voltage level at the adaptive voltage node is to vary in accordance with the current flowing through the inductor so as to decrease a variation of the amount of time to turn off the switch.

公开(公告)号：US10008932B2

公开(公告)日：2018-06-26

申请号：US15357324

申请日：2016-11-21

申请人： ROHM CO., LTD.

发明人： Kiyotaka Umemoto

IPC分类号： H02M3/158 ,  H02M1/08 ,  H03K17/042 ,  H03K17/16 ,  H02M1/00

CPC分类号： H02M3/158 ,  H02M1/08 ,  H02M3/1588 ,  H02M2001/0032 ,  H03K17/04206 ,  H03K17/165 ,  Y02B70/1466 ,  Y02B70/16

摘要： A synchronous rectification DC/DC converter includes a first transistor and a second transistor including respective main electrodes connected to a common connection point, the first transistor and the second transistor being NMOS transistors, a control circuit configured to control switching of the first transistor and the second transistor in a complementary manner, a bootstrap circuit that includes a first capacitor charged with a current supplied from a high voltage potential terminal and is configured to raise a voltage potential of a control electrode of the first transistor to turn on the first transistor, and a charging stop circuit configured to stop the first capacitor from being charged from the high voltage potential terminal in a time period in which the first transistor and the second transistor are turned off simultaneously.

公开(公告)号：US09793824B2

公开(公告)日：2017-10-17

申请号：US14797329

申请日：2015-07-13

申请人： Kabushiki Kaisha Toshiba

发明人： Kazuto Takao ,  Tatsuo Shimizu ,  Takashi Shinohe

IPC分类号： H02M3/315 ,  H02M7/537 ,  H03K17/04 ,  H03K17/0412 ,  H03K17/042 ,  H03K17/16

CPC分类号： H02M7/537 ,  H03K17/0406 ,  H03K17/04123 ,  H03K17/04206 ,  H03K17/164 ,  H03K17/166 ,  H03K17/168 ,  H03K2217/0036

摘要： A gate driving circuit of embodiments is provided with a first transistor which controls a gate-on voltage applied to a gate electrode of a switching device, a second transistor which controls a gate-off voltage applied to the gate electrode of the switching device, a driving logic circuit which controls turn-on/turn-off of the first and second transistors, a first power source which supplies the gate-on voltage to the gate electrode when the first transistor is turned on, a second power source which supplies the gate-off voltage to the gate electrode when the second transistor is turned on, a first gate resistance variable circuit in which a plurality of field effect transistors is connected in parallel, a second gate resistance variable circuit in which a plurality of field effect transistors is connected in parallel, and a gate resistance control circuit which controls gate voltages of a plurality of field effect transistors.

公开(公告)号：US09760102B2

公开(公告)日：2017-09-12

申请号：US15253152

申请日：2016-08-31

申请人： Sharp Kabushiki Kaisha

发明人： Kohei Tanaka ,  Hidefumi Yoshida ,  Takeshi Noma ,  Ryo Yonebayashi ,  Takayuki Nishiyama ,  Mitsuhiro Murata ,  Yosuke Iwata

IPC分类号： G09G5/00 ,  G05F1/46 ,  G02F1/1368 ,  G02F1/1362 ,  H03K17/042 ,  H03K17/16 ,  H03K17/687 ,  G09G3/36 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1345 ,  H01L27/12 ,  H01L27/32

CPC分类号： G05F1/467 ,  G02F1/133308 ,  G02F1/133514 ,  G02F1/13454 ,  G02F1/136213 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2201/123 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2310/0251 ,  G09G2310/0281 ,  G09G2310/0286 ,  G09G2320/0223 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/3272 ,  H03K17/04206 ,  H03K17/165 ,  H03K17/687

摘要： A technique is provided that reduces dullness of a potential provided to a line such as gate line on an active-matrix substrate to enable driving the line at high speed and, at the same time, reduces the size of the picture frame region. On an active-matrix substrate (20a) are provided gate lines (13G) and source lines. On the active-matrix substrate (20a) are further provided: gate drivers (11) each including a plurality of switching elements, at least one of which is located in a pixel region, for supplying a scan signal to a gate line (13G); and lines (15L1) each for supplying a control signal to the associated gate driver (11). A control signal is supplied by a display control circuit (4) located outside the display region to the gate drivers (11) via the lines (15L1). In response to a control signal supplied, each gate driver (11) drives the gate line (13G) to which it is connected.

公开(公告)号：US09755628B2

公开(公告)日：2017-09-05

申请号：US14989810

申请日：2016-01-07

申请人： DELTA ELECTRONICS, INC.

发明人： Chih-I Hu

IPC分类号： G05F1/56 ,  G05F5/00 ,  H03K17/042 ,  H03K5/24 ,  H02M3/156

CPC分类号： H03K17/04206 ,  H02M3/156 ,  H03K5/24 ,  H03K17/04123 ,  H03K17/163 ,  H03K17/164

摘要： A driving circuit includes a main output terminal electrically coupled to a switch element, a first voltage generating circuit and a second voltage generating circuit. The first voltage generating circuit is electrically coupled with the main output terminal. The first voltage generating circuit comprises a first comparator and a voltage divider circuit. The first voltage generating circuit is configured to generate a first voltage at the main output terminal during a predetermined time interval of a turn-on duration of a switching period. The second voltage generating circuit is electrically coupled with the main output terminal. The second voltage generating circuit is configured to generate a second voltage at the main output terminal during a remaining time interval of the turn-on duration of the switching period. The predetermined time interval is ahead of the remaining time interval, and the first voltage is higher than the second voltage.

公开(公告)号：US20170222638A1

公开(公告)日：2017-08-03

申请号：US15195122

申请日：2016-06-28

申请人： STMicroelectronics S.R.L.

发明人： Aldo Davide Gariboldi

IPC分类号： H03K17/14 ,  G05F3/16

CPC分类号： H03K17/145 ,  G05F3/16 ,  H03K17/04206 ,  H03K17/164 ,  H03K17/167

摘要： A driver for a power field-effect transistor includes a first and second circuits that apply respective charge currents to a gate of the power field-effect transistor when a control signal has a first logic value and the voltage between the gate and the source is smaller than a first threshold voltage and greater than a second threshold voltage. Third and fourth circuits apply respective discharge currents to the gate when the control signal has a second logic value and the voltage between the gate and the source is greater than a third threshold voltage and smaller than a fourth threshold voltage. The driver may include at least one field-effect transistor configured to generate at least one of the first, second, third or fourth threshold voltage.

公开(公告)号：US09685940B2

公开(公告)日：2017-06-20

申请号：US14818114

申请日：2015-08-04

申请人： QUALCOMM Incorporated

发明人： Ramaprasath Vilangudipitchai ,  Dorav Kumar ,  Steven James Dillen ,  Ohsang Kwon ,  Javid Jaffari

IPC分类号： H03K17/04 ,  H03K17/042 ,  H03K5/24 ,  H03K19/00 ,  H03K5/26

CPC分类号： H03K17/04206 ,  H03K5/24 ,  H03K5/26 ,  H03K19/0016

摘要： Systems and methods for powering up circuits are described herein. In one embodiment, a method for power up comprises comparing a voltage of a first supply rail with a voltage of a second supply rail, and determining whether the voltage of the first supply rail is within a predetermined amount of the voltage of the second supply rail for at least a predetermined period of time based on the comparison. The method also comprises initiating switching of a plurality of switches coupled between the first and second supply rails upon a determination that the voltage of the first supply rail is within the predetermined amount of the voltage of the second supply rail for at least the predetermined period of time.

公开(公告)号：US20160218627A1

公开(公告)日：2016-07-28

申请号：US14984734

申请日：2015-12-30

申请人： NXP B.V.

发明人： Jan Dikken ,  Jeroen Kleinpenning

IPC分类号： H02M3/335

CPC分类号： H02M3/33507 ,  H02M3/33592 ,  H03K17/04206 ,  H03K17/166 ,  H03K17/302 ,  H03K2017/307 ,  Y02B70/1475

摘要： There is disclosed a controller configured to control a synchronous rectification MOSFET having a drain, a source and a gate; the controller comprising a regulator configured to regulate a voltage between the drain and the source to a first regulation voltage, and a gate charger operable during a turn-on phase of the synchronous rectification MOSFET operation and configured to regulate a voltage between the drain and the source to a second regulation voltage having a larger absolute value than the absolute value of the first regulation voltage, wherein the gate charger is further configured to, when in operation, disable the regulator. Also disclosed is a switched mode power converter comprising such a synchronous rectification MOSFET, and a method for controlling such a synchronous rectification MOSFET.

摘要翻译： 公开了一种控制器，其被配置为控制具有漏极，源极和栅极的同步整流MOSFET; 所述控制器包括调节器，其被配置为将所述漏极和源极之间的电压调节到第一调节电压;以及栅极充电器，其在所述同步整流MOSFET操作的导通阶段期间可操作并且被配置为调节所述漏极和所述源极之间的电压 源极具有比第一调节电压的绝对值更大的绝对值的第二调节电压，其中栅极充电器还被配置为在使用时禁用调节器。 还公开了一种包括这种同步整流MOSFET的开关模式功率转换器，以及用于控制这种同步整流MOSFET的方法。

公开(公告)号：US20160094218A1

公开(公告)日：2016-03-31

申请号：US14835403

申请日：2015-08-25

申请人： NXP B.V.

发明人： Ralf van Otten ,  Franciscus Schoofs ,  Matthias Rose ,  Hendrik Bergveld

IPC分类号： H03K17/687

CPC分类号： H03K17/687 ,  H03K17/04206 ,  H03K17/102 ,  H03K17/163 ,  H03K17/6871 ,  H03K2017/6875 ,  H03K2217/0081

摘要： A cascode transistor circuit comprising a depletion-mode switch in series with a normally-off switch between a drain output terminal and a source output terminal. The circuit also includes a controller comprising a controller output terminal configured to provide a normally-on control signal for a normally-on control terminal of the depletion-mode switch, wherein the normally-on control signal is independent of the normally-off control signal; a negative voltage source configured to provide a negative voltage to the normally-on control terminal of the depletion-mode switch; and a feedback capacitance between the drain output terminal and a control node in a circuit path between the controller output terminal and the normally-on control terminal of the depletion-mode switch.

摘要翻译： 一种共源共栅晶体管电路，包括与漏极输出端子和源极输出端子之间的常关断开串联的耗尽型开关。 该电路还包括控制器，该控制器包括控制器输出端子，该控制器输出端子被配置为为耗尽型开关的常开控制端提供常开控制信号，其中常开控制信号独立于常关控制信号 ; 负电压源，被配置为向所述耗尽型开关的常开控制端子提供负电压; 以及在所述控制器输出端子与所述耗尽型开关的常开控制端子之间的电路路径中的所述漏极输出端子与所述控制节点之间的反馈电容。

公开(公告)号：US20160087518A1

公开(公告)日：2016-03-24

申请号：US14492569

申请日：2014-09-22

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Nitin Agarwal ,  Sachin Sudhir Turkewadikar

IPC分类号： H02M1/00 ,  H02M3/158

CPC分类号： H02M1/00 ,  H02M3/158 ,  H02M3/1588 ,  H02M2001/0003 ,  H02M2001/0029 ,  H03K17/04206 ,  H03K17/165 ,  Y02B70/1466

摘要： Several circuits and methods for driver control of a switching circuit are disclosed. In an embodiment, a circuit for driver control of a switching circuit includes a driver circuit and a control circuit. The driver circuit is capable of being coupled to the switching circuit. The switching circuit includes a first switch and a second switch. The driver circuit is configured to control a conductive state of the switching circuit by facilitating an alternate state change of the first switch and the second switch. The control circuit is coupled to the driver circuit and is configured to detect a noise signal during a state change of the first switch. The control circuit is further configured to control the driver circuit to thereby slow down the state change of the first switch.

摘要翻译： 公开了用于开关电路的驱动器控制的几种电路和方法。 在一个实施例中，用于开关电路的驱动器控制的电路包括驱动器电路和控制电路。 驱动电路能够耦合到开关电路。 开关电路包括第一开关和第二开关。 驱动电路被配置为通过促进第一开关和第二开关的替代状态改变来控制开关电路的导通状态。 控制电路耦合到驱动电路，并被配置为在第一开关的状态改变期间检测噪声信号。 控制电路还被配置为控制驱动器电路，从而减慢第一开关的状态变化。