Packages for microwave integrated circuits
    112.
    发明授权
    Packages for microwave integrated circuits 失效
    微波集成电路封装

    公开(公告)号:US4259684A

    公开(公告)日:1981-03-31

    申请号:US951219

    申请日:1978-10-13

    摘要: This disclosure relates to the packaging of microwave integrated circuits (MICs) whereby an MIC is hermetically sealed within an enclosure comprising a first plate of dielectric material which carries the circuit to be enclosed, a wall of dielectric material sealed to the surface of the first plate surrounding the circuit, and a second plate of dielectric material providing a lid sealed over the wall to complete the enclosure. The first plate carries planar conductors which define at least one microwave transmission line, e.g. microstrip, extending across the wall into the enclosure from outside to provide direct microwave coupling to the enclosed circuit and thereby obviating the usual need for transitions to and from coaxial cable.Part or all of the enclosed circuit may be contained within a recess provided by forming an aperture in the first plate and sealing a third plate of dielectric material across the aperture from below.The disclosure describes various techniques for reducing losses where the transmission line propagation paths traverse the wall on the surface of the first plate. The entire package may be fabricated using materials and techniques compatible with those used in fabricating MIC's, for example thick film.

    摘要翻译: 本发明涉及微波集成电路(MIC)的封装,其中MIC密封在外壳内,该外壳包括承载要封闭的电路的第一介电材料板,密封到第一板的表面的电介质材料壁 围绕电路,以及第二介电材料板,提供密封在壁上以完成外壳的盖子。 第一板承载限定至少一个微波传输线的平面导体,例如。 微带,从外部延伸穿过壁进入外壳,以提供直接的微波耦合到封闭的电路,从而避免了对同轴电缆的转换的通常需要。 封闭电路的一部分或全部可以包含在通过在第一板中形成孔并且从下方密封第三介电材料板穿过该孔而提供的凹槽内。 本公开描述了用于在传输线传播路径穿过第一板的表面上的壁的情况下减少损耗的各种技术。 可以使用与用于制造MIC的材料和技术相兼容的材料和技术来制造整个封装,例如厚膜。

    Semiconductor lead structure and assembly and method for fabricating same
    114.
    发明授权
    Semiconductor lead structure and assembly and method for fabricating same 失效
    半导体引线结构及其组装及其制造方法

    公开(公告)号:US4026008A

    公开(公告)日:1977-05-31

    申请号:US578668

    申请日:1975-05-19

    摘要: A lead structure formed from a sheet of electrically conducting material having a plurality of spaced integral lead arrays formed therein with each of the arrays comprising a plurality of first leads formed from the sheet material in one region thereof and being integral with the sheet with each of the leads being cantilevered and having inner extremities which are free and positioned in a predetermined pattern. Portions of the first leads adjacent the free ends are convoluted. A semiconductor body having at least portions of an electrical circuit formed therein and with contacts in a predetermined pattern carried by the body and lying in a common plane is secured to each of the arrays with the contact pads being bonded to the inner extemities of the first leads. A first encapsulating means is provided for encapsulating the semiconductor body and the inner extremities of the first leads with the outer extremities of the first leads being free of the first encapsulating means. After the first encapsulation, the outer extremities of the first lead are separated from the sheet of material. A plurality of spaced second leads are then secured to the outer extremities of the first leads. A second encapsulating means is then provided for encapsulating the first encapsulating means, the outer extremities of the first leads and the inner extremities of the second leads with the outer extremities of the second leads being free.

    摘要翻译: 由一片导电材料形成的引线结构,其具有形成在其中的多个间隔开的整体引线阵列,其中每个阵列包括由片材在其一个区域中形成的多个第一引线, 引线是悬臂的并且具有自由并且以预定图案定位的内端。 邻近自由端的第一引线的部分被卷绕。 半导体本体至少具有形成在其中的电路的一部分,并且具有由本体承载并且位于公共平面中的预定图案中的触点的每个阵列被固定到每个阵列上,其中触点焊盘与第一 领导。 提供了第一封装装置,用于封装半导体本体和第一引线的内端,第一引线的外端没有第一封装装置。 在第一次封装之后,第一引线的外端与材料片分离。 然后将多个间隔开的第二引线固定到第一引线的外端。 然后提供第二封装装置,用于封装第一封装装置,第一引线的外端和第二引线的内端与第二引线的外端自由。

    Integrated circuit device employing metal frame means with preformed
conductor means
    115.
    发明授权
    Integrated circuit device employing metal frame means with preformed conductor means 失效
    集成电路装置采用具有预制导体装置的金属框架装置

    公开(公告)号:US4003073A

    公开(公告)日:1977-01-11

    申请号:US296186

    申请日:1972-10-10

    摘要: Wire bonding is eliminated in the assembly of microelectronic devices, by a process involving the direct bonding of circuit electrodes to an unsupported metallic sheet-frame member having a plurality of inwardly extending leads. A single-step vibratory pressure welding technique is employed for the simultaneous bonding of all leads to a semiconductor integrated circuit chip. Lateral confinement of the leads during the bonding steps causes a buckling action to introduce a small but critical loop in each lead to ensure clearance between the lead fingers and the perimeter of the semiconductor chip, whereby electrical shorting is avoided. The loop also provides a structural flexibility in the leads, which tends to protect the bonding sites from excessive stresses. Subsequently, the first frame member including the bonded circuit is attached, preferably by resistance welding, to a second lead frame member of heavier gage and increased dimensions, suitable for connection with external circuitry. Excess portions of the first frame member are then removed, providing a completed assembly for packaging; e.g., plastic encapsulation or hermetic sealing, as in a ceramic-glass flat package.

    摘要翻译: 通过涉及将电路电极直接接合到具有多个向内延伸的引线的未支撑的金属片框架构件的工艺,在微电子器件的组装中消除引线接合。 采用单步振动压焊技术将所有引线同时连接到半导体集成电路芯片。 在接合步骤期间引线的横向限制导致弯曲作用,以在每个引线中引入小但关键的环,以确保引线指与半导体芯片的周边之间的间隙,从而避免电短路。 该回路还在引线中提供了结构灵活性,这倾向于保护结合部位免受过大的应力。 随后,包括接合电路的第一框架构件优选地通过电阻焊接被附接到较重的规格的第二引线框架构件并且具有适于与外部电路连接的尺寸。 然后移除第一框架构件的多余部分,提供用于包装的完整组件; 例如塑料封装或气密密封,如陶瓷 - 玻璃扁平封装。

    R.F. transistor package having an isolated common lead
    117.
    发明授权
    R.F. transistor package having an isolated common lead 失效
    R.F. 具有隔离通用引线的晶体管封装

    公开(公告)号:US3958195A

    公开(公告)日:1976-05-18

    申请号:US560674

    申请日:1975-03-21

    申请人: Joseph H. Johnson

    发明人: Joseph H. Johnson

    摘要: In a radio frequency transistor package, a layer of metallization is deposited on an electrically insulative thermally conductive ceramic substrate member serving as a heat sink. An insular region of the metallization serves as a pad for receiving a transistor die with the collector region of the transistor bonded to the insular region of metallization. The region of the metallization surrounding the pad comprises a ground plane. An apertured ceramic insulative spacer is bonded over the ground plane metallization with the aperture in registration over the transistor. Input, output and a pair of common lead metal strips are bonded to the upper surface of the spacer in generally coplanar configuration. The two common leads extend across the spacer adjacent opposite sides of the aperture in generally tangential relation thereto. The input and output leads are disposed in between the common leads and are interrupted by the central aperture in the spacer. The common leads are electrically interconnected to the ground plane metallization layer via conductive means extending through the aperture in the spacer. The input lead is connected to one of the base or emitter regions of the transistor die via wire bonding leads extending through the aperture in the spacer. The other base or emitter region of the transistor die is connected via parallel wire bonding leads to the surrounding ground plane metallization. The output lead is connected via a set of parallel wire bond leads through the central aperture to the transistor pad.

    Hermetically sealed encapsulation of semiconductor devices
    119.
    发明授权
    Hermetically sealed encapsulation of semiconductor devices 失效
    密封封装半导体器件

    公开(公告)号:US3916434A

    公开(公告)日:1975-10-28

    申请号:US42315773

    申请日:1973-12-10

    申请人: POWER HYBRIDS INC

    发明人: GARBOUSHIAN VAHAN

    摘要: Semi-conductor devices and other miniature circuit elements are hermetically sealed by mounting them on a peripherally metallized ceramic carrier, brazing a metal ring to carrier and brazing a ceramic cover onto the ring; the cover has also peripheral metallization, so that the hermetic seal results from metal-tometal bond. The carrier is provided with metallized apertures as electrical feed through into the space as defined by carrier, ring and cover. Metal leads are soldered to the metallization of the apertures on the outside of the carrier, while connections are made from the circuit elements to the metallization of and around the apertures in the said inside mounting space.

    摘要翻译: 半导体器件和其他微型电路元件通过将其安装在外围金属化的陶瓷载​​体上而密封,将金属环钎焊到载体上并将陶瓷盖钎焊到环上; 该盖也具有外围金属化,使得气密密封由金属 - 金属键结合。 载体具有金属化孔,作为电馈送通过载体,环和盖所限定的空间。 金属引线被焊接到载体外部的孔的金属化,同时从电路元件到所述内部安装空间中的孔的金属化和连接。