公开(公告)号：US10128378B2

公开(公告)日：2018-11-13

申请号：US15822648

申请日：2017-11-27

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Junichi Koezuka ,  Masami Jintyou ,  Yukinori Shima ,  Takashi Hamochi ,  Yasutaka Nakazawa

IPC: H01L29/10 ,  H01L29/786 ,  H01L27/12 ,  H01L29/45 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1339 ,  G02F1/1368 ,  H01L27/32

Abstract: A semiconductor device comprising a first transistor, a second insulating film, a conductive film, and a capacitor is provided. The first transistor comprises a first oxide semiconductor film, a gate insulating film over the first oxide semiconductor film, and a gate electrode over the gate insulating film. The second insulating film is provided over the gate electrode. The conductive film is electrically connected to the first oxide semiconductor film. The capacitor comprises a second oxide semiconductor film, the second insulating film over the second oxide semiconductor film, and the conductive film over the second insulating film. The first oxide semiconductor film comprises a first region and a second region. Each of a carrier density of the second region and a carrier density of the second oxide semiconductor film is higher than a carrier density of the first region.

公开(公告)号：US10002971B2

公开(公告)日：2018-06-19

申请号：US14755886

申请日：2015-06-30

Applicant: Semiconductor Energy Laboratory Co., LTD.

Inventor： Masami Jintyou ,  Takahiro Iguchi

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/24 ,  H01L29/04 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/24 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78621 ,  H01L29/78696

Abstract: A change in electrical characteristics can be suppressed and reliability can be improved in a semiconductor device including a transistor having an oxide semiconductor. A semiconductor device includes a transistor, and the transistor includes an oxide semiconductor film over a first insulating film, a gate insulating film over the oxide semiconductor film, a gate electrode over the gate insulating film, a conductive film in contact with a side surface of the gate electrode in a channel length direction, and a second insulating film over the oxide semiconductor film. The oxide semiconductor film includes a first region overlapping with the gate electrode, a second region overlapping with the conductive film, and a third region in contact with the second insulating film. The third region includes a region having higher impurity element concentration than the second region.

公开(公告)号：US09997637B2

公开(公告)日：2018-06-12

申请号：US15226051

申请日：2016-08-02

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Junichi Koezuka ,  Masami Jintyou ,  Yukinori Shima ,  Daisuke Kurosaki ,  Masataka Nakada ,  Shunpei Yamazaki

IPC: H01L29/10 ,  H01L29/786 ,  H01L27/12

CPC classification number: H01L29/78693 ,  H01L27/1225 ,  H01L27/1251 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: The semiconductor device includes a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion; the first transistor and the second transistor have different structures. In an oxide semiconductor film of each of the transistors, an impurity element is contained in regions which do not overlap with a gate electrode. The regions of the oxide semiconductor film which contain the impurity element function as low-resistance regions. Furthermore, the regions of the oxide semiconductor film which contain the impurity element are in contact with a film containing hydrogen. Furthermore, the first transistor provided in the driver circuit portion may include the oxide semiconductor film in which a first film and a second film are stacked, and the second transistor provided in the pixel portion may include the oxide semiconductor film which differs from the first film in the atomic ratio of metal elements.

公开(公告)号：US09991392B2

公开(公告)日：2018-06-05

申请号：US14550091

申请日：2014-11-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Junichi Koezuka ,  Yukinori Shima ,  Masami Jintyou ,  Takashi Hamochi ,  Satoshi Higano ,  Shunpei Yamazaki

IPC: H01L29/786 ,  H01L29/417 ,  H01L29/423 ,  H01L29/45 ,  H01L29/49 ,  G02F1/1368 ,  H01L23/532 ,  G02F1/1362 ,  H01L27/12

CPC classification number: H01L29/7869 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/13629 ,  G02F2001/136295 ,  H01L23/53233 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/4966 ,  H01L29/786 ,  H01L2924/0002 ,  H01L2924/00

Abstract: To provide a novel semiconductor device which includes a transistor and a metal film containing Cu for a wiring, a signal line, or the like. The semiconductor device includes a first wiring, a second wiring, a first transistor, and a second transistor. The first wiring is electrically connected to a source or a drain of the first transistor, and the second wiring is electrically connected to a gate of the second transistor. The first wiring and the second wiring each include a Cu—X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti). The Cu—X alloy film in the first wiring is connected to the Cu—X alloy film in the second wiring.

公开(公告)号：US09905579B2

公开(公告)日：2018-02-27

申请号：US15451540

申请日：2017-03-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Kenichi Okazaki ,  Hiroyuki Miyake ,  Kengo Akimoto ,  Masami Jintyou ,  Takahiro Iguchi

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/04 ,  H01L29/24 ,  H01L27/32

CPC classification number: H01L27/1229 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/1251 ,  H01L27/3262 ,  H01L29/045 ,  H01L29/24 ,  H01L29/786 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device with a reduced layout area of transistors is provided. The semiconductor device includes a first transistor including a first oxide semiconductor film and a second transistor including a second oxide semiconductor film over a substrate. When the oxide semiconductor films are subjected to electron diffraction, the ratio of the integrated intensity of luminance of a diffraction spot derived from c-axis alignment to the integrated intensity of luminance of a diffraction spot derived from alignment in any direction in the first oxide semiconductor film is higher than that in the second oxide semiconductor film. In addition, part of the first transistor is located between the second transistor and the substrate.

公开(公告)号：US09837547B2

公开(公告)日：2017-12-05

申请号：US15150755

申请日：2016-05-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi Koezuka ,  Masami Jintyou ,  Yukinori Shima

IPC: H01L29/10 ,  H01L29/786 ,  H01L29/49 ,  H01L29/417 ,  H01L29/24 ,  H01L29/04 ,  H01L27/12 ,  H01L29/66 ,  H01L21/02 ,  H01L21/477 ,  H01L21/465 ,  H01L21/4757 ,  H01L27/32

CPC classification number: H01L29/7869 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/0262 ,  H01L21/02631 ,  H01L21/465 ,  H01L21/47573 ,  H01L21/477 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/3262 ,  H01L29/045 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/4966 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/78696 ,  H01L2227/323

Abstract: The reliability of a transistor including an oxide semiconductor can be improved by suppressing a change in electrical characteristics. A transistor included in a semiconductor device includes a first oxide semiconductor film over a first insulating film, a gate insulating film over the first oxide semiconductor film, a second oxide semiconductor film over the gate insulating film, and a second insulating film over the first oxide semiconductor film and the second oxide semiconductor film. The first oxide semiconductor film includes a channel region in contact with the gate insulating film, a source region in contact with the second insulating film, and a drain region in contact with the second insulating film. The second oxide semiconductor film has a higher carrier density than the first oxide semiconductor film.

公开(公告)号：US09812583B2

公开(公告)日：2017-11-07

申请号：US15187106

申请日：2016-06-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takahiro Sato ,  Yasutaka Nakazawa ,  Takayuki Cho ,  Shunsuke Koshioka ,  Hajime Tokunaga ,  Masami Jintyou

IPC: H01L29/786 ,  H01L29/10 ,  H01L21/02 ,  G02F1/1362 ,  G02F1/1368 ,  H01L27/12 ,  H01L27/32 ,  H01L29/04 ,  H01L29/06 ,  H01L29/24 ,  H01L29/423 ,  H01L21/306 ,  H01L29/66 ,  H01L21/465

CPC classification number: H01L29/7869 ,  G02F1/136277 ,  G02F1/1368 ,  H01L21/02365 ,  H01L21/02403 ,  H01L21/02422 ,  H01L21/02551 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/30604 ,  H01L21/465 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/3248 ,  H01L29/045 ,  H01L29/0657 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78693 ,  H01L29/78696

Abstract: A transistor includes a multilayer film in which an oxide semiconductor film and an oxide film are stacked, a gate electrode, and a gate insulating film. The multilayer film overlaps with the gate electrode with the gate insulating film interposed therebetween. The multilayer film has a shape having a first angle between a bottom surface of the oxide semiconductor film and a side surface of the oxide semiconductor film and a second angle between a bottom surface of the oxide film and a side surface of the oxide film. The first angle is acute and smaller than the second angle. Further, a semiconductor device including such a transistor is manufactured.

公开(公告)号：US09577110B2

公开(公告)日：2017-02-21

申请号：US14582273

申请日：2014-12-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi Koezuka ,  Masami Jintyou ,  Yukinori Shima ,  Takashi Hamochi ,  Yasutaka Nakazawa ,  Shunpei Yamazaki

IPC: H01L29/10 ,  H01L29/12 ,  H01L29/786 ,  H01L27/12 ,  H01L29/417 ,  H01L29/45 ,  H01L29/49 ,  H01L29/66

CPC classification number: H01L29/78696 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/7869 ,  H01L2029/7863

Abstract: A novel semiconductor device including an oxide semiconductor is provided. In particular, a planar semiconductor device including an oxide semiconductor is provided. A semiconductor device including an oxide semiconductor and having large on-state current is provided. The semiconductor device includes an oxide insulating film, an oxide semiconductor film over the oxide insulating film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a gate insulating film between the source electrode and the drain electrode, and a gate electrode overlapping the oxide semiconductor film with the gate insulating film. The oxide semiconductor film includes a first region overlapped with the gate electrode and a second region not overlapped with the gate electrode, the source electrode, and the drain electrode. The first region and the second region have different impurity element concentrations. The gate electrode, the source electrode, and the drain electrode contain the same metal element.

Abstract translation: 提供了包括氧化物半导体的新型半导体器件。 特别地，提供了包括氧化物半导体的平面半导体器件。 提供包括氧化物半导体并具有大导通电流的半导体器件。 半导体器件包括氧化物绝缘膜，氧化物绝缘膜上的氧化物半导体膜，与氧化物半导体膜接触的源极和漏电极，源极和漏极之间的栅极绝缘膜，以及栅极 电极与氧化物半导体膜与栅极绝缘膜重叠。 氧化物半导体膜包括与栅电极重叠的第一区域和不与栅电极，源电极和漏电极重叠的第二区域。 第一区和第二区具有不同的杂质元素浓度。 栅电极，源电极和漏电极含有相同的金属元素。

公开(公告)号：US09564535B2

公开(公告)日：2017-02-07

申请号：US14632381

申请日：2015-02-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Junichi Koezuka ,  Masami Jintyou ,  Daisuke Kurosaki

IPC: H01L29/12 ,  H01L29/786 ,  H01L27/12 ,  H01L29/24 ,  H01L29/49 ,  H01L29/51 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/1237 ,  H01L29/24 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78648 ,  H01L29/78696

Abstract: A change in electrical characteristics is inhibited and reliability is improved in a semiconductor device using a transistor including an oxide semiconductor. One embodiment of a semiconductor device including a transistor includes a gate electrode, first and second insulating films over the gate electrode, an oxide semiconductor film over the second insulating film, and source and drain electrodes electrically connected to the oxide semiconductor film. A third insulating film is provided over the transistor and a fourth insulating film is provided over the third insulating film. The third insulating film includes oxygen. The fourth insulating film includes nitrogen. The amount of oxygen released from the third insulating film is 1×1019/cm3 or more by thermal desorption spectroscopy, which is estimated as oxygen molecules. The amount of oxygen molecules released from the fourth insulating film is less than 1×1019/cm3.

Abstract translation: 在使用包括氧化物半导体的晶体管的半导体器件中，电特性的变化被抑制，并且提高了可靠性。 包括晶体管的半导体器件的一个实施例包括栅电极，栅极上的第一和第二绝缘膜，第二绝缘膜上的氧化物半导体膜，以及与氧化物半导体膜电连接的源极和漏极。 第三绝缘膜设置在晶体管上方，第四绝缘膜设置在第三绝缘膜上。 第三绝缘膜包括氧。 第四绝缘膜包括氮。 从第三绝缘膜释放的氧的量通过热解吸光谱法为1×1019 / cm3以上，其被估计为氧分子。 从第四绝缘膜释放的氧分子的量小于1×1019 / cm3。

公开(公告)号：US09508592B2

公开(公告)日：2016-11-29

申请号：US14922556

申请日：2015-10-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi Koezuka ,  Masami Jintyou ,  Yukinori Shima ,  Takahiro Iguchi

IPC: H01L21/336 ,  H01L21/768 ,  H01L23/532 ,  H01L29/786 ,  H01L51/00 ,  H01L29/45 ,  H01L27/12 ,  H01L27/32 ,  G02F1/1333 ,  G02F1/1362

CPC classification number: H01L21/76829 ,  G02F1/133345 ,  G02F1/136204 ,  G02F2001/136295 ,  G02F2201/50 ,  H01L21/7685 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L27/1225 ,  H01L27/1262 ,  H01L27/3272 ,  H01L29/458 ,  H01L29/786 ,  H01L29/7869 ,  H01L51/00 ,  H01L2924/0002 ,  H01L2924/00

Abstract: To improve the reliability of a semiconductor device including a low-resistance material such as copper, aluminum, gold, or silver as a wiring. Provided is a semiconductor device including a pair of electrodes electrically connected to a semiconductor layer which has a stacked-layer structure including a first protective layer in contact with the semiconductor layer and a conductive layer containing the low-resistance material and being over and in contact with the first protective layer. The top surface of the conductive layer is covered with a second protective layer functioning as a mask for processing the conductive layer. The side surface of the conductive layer is covered with a third protective layer. With this structure, entry or diffusion of the constituent element of the pair of conductive layers containing the low-resistance material into the semiconductor layer is suppressed.