Power dimmer
    122.
    发明授权
    Power dimmer 有权
    电源调光

    公开(公告)号:US09362842B2

    公开(公告)日:2016-06-07

    申请号:US14364857

    申请日:2012-11-06

    摘要: A control circuit varies the power of a load powered by an alternating voltage, comprising: a first thyristor and a first diode connected in antiparallel between first and second nodes, the cathode of the first diode being on the side of the first node; a second thyristor and a second diode connected in antiparallel between the second node and a third node, the cathode of the second diode being on the side of the third node; third and fourth diodes connected in antiseries between the first and third nodes, the cathodes of the third and fourth diodes being connected to a fourth node; a transistor between the second and fourth nodes; and a control unit for controlling the first and second thyristors and the transistor.

    摘要翻译: 控制电路改变由交流电压供电的负载的功率,包括:第一晶闸管和连接在第一和第二节点之间的反平行的第一二极管,第一二极管的阴极位于第一节点的侧面; 在第二节点和第三节点之间反并联连接的第二晶闸管和第二二极管,第二二极管的阴极位于第三节点的一侧; 连接在第一和第三节点之间的反电容中的第三和第四二极管,第三和第四二极管的阴极连接到第四节点; 第二和第四节点之间的晶体管; 以及用于控制第一和第二晶闸管和晶体管的控制单元。

    CONTROLLED RECTIFYING CIRCUIT
    123.
    发明申请
    CONTROLLED RECTIFYING CIRCUIT 有权
    控制整流电路

    公开(公告)号:US20160111969A1

    公开(公告)日:2016-04-21

    申请号:US14826627

    申请日:2015-08-14

    发明人: Laurent Gonthier

    IPC分类号: H02M7/06 H02M7/155

    摘要: A rectifying circuit includes a first diode coupled between a first terminal configured to receive application of an A.C. voltage and a first terminal configured to deliver a rectified voltage; and an anode-gate thyristor coupled between a second terminal configured to receive application of the A.C. voltage and a second terminal configured to deliver the rectified voltage, wherein an anode of the anode-gate thyristor is connected to the second terminal configured to deliver the rectified voltage.

    摘要翻译: 整流电路包括耦合在被配置为接收交流电压的施加的第一端子和被配置为传送整流电压的第一端子之间的第一二极管; 以及耦合在被配置为接收所述AC电压的施加的第二端子和被配置为传送整流电压的第二端子之间的阳极栅极晶闸管,其中所述阳极栅极晶闸管的阳极连接到所述第二端子,所述第二端子被配置为传送整流的 电压。

    INCREASE OF EPITAXY RESISTIVITY AND DECREASE OF JUNCTION CAPACITANCE BY ADDITION OF PBURIED LAYER
    125.
    发明申请
    INCREASE OF EPITAXY RESISTIVITY AND DECREASE OF JUNCTION CAPACITANCE BY ADDITION OF PBURIED LAYER 有权
    外延电阻的增加和通过添加层的接合电容的降低

    公开(公告)号:US20150221628A1

    公开(公告)日:2015-08-06

    申请号:US14171931

    申请日:2014-02-04

    发明人: Aurelie Arnaud

    IPC分类号: H01L27/02 H01L27/08

    摘要: An overvoltage protection device including: a doped substrate of a first conductivity type having a first doping level, coated with a doped epitaxial layer of the second conductivity type having a second doping level; a first doped buried region of the second conductivity type having a third doping level greater than the second level, located at the interface between the substrate and the epitaxial layer in a first portion of the device; and a second doped buried region of the first conductivity type having a fourth doping level greater than the first level, located at the interface between the substrate and the epitaxial layer in a second portion of the device.

    摘要翻译: 一种过电压保护装置,包括:具有第一掺杂水平的第一导电类型的掺杂衬底,涂覆有具有第二掺杂水平的第二导电类型的掺杂外延层; 所述第二导电类型的第一掺杂掩埋区具有大于所述第二电平的第三掺杂水平,位于所述器件的第一部分中的所述衬底和所述外延层之间的界面处; 以及第一导电类型的第二掺杂掩埋区,其具有大于所述第一电平的第四掺杂水平,位于所述器件的第二部分中的所述衬底和所述外延层之间的界面处。

    Device for protecting an integrated circuit against overvoltages
    128.
    发明授权
    Device for protecting an integrated circuit against overvoltages 有权
    用于保护集成电路免受过电压的装置

    公开(公告)号:US08953290B2

    公开(公告)日:2015-02-10

    申请号:US13955112

    申请日:2013-07-31

    IPC分类号: H02H9/00 H01L23/62 H01L27/02

    摘要: A device for protecting an integrated circuit against overvoltages, the device being formed inside and on top of a semiconductor substrate of a first conductivity type and including: a capacitor including a well of the second conductivity type penetrating into the substrate and trenches with insulated walls formed in the well and filled with a conductive material; and a zener diode formed by the junction between the substrate and the well.

    摘要翻译: 一种用于保护集成电路免受过电压的装置,该装置形成在第一导电类型的半导体衬底的内部和顶部,并且包括:电容器,包括穿透到衬底中的第二导电类型的阱和形成有绝缘壁的沟槽 在井中充满导电材料; 以及由衬底和阱之间的接合部形成的齐纳二极管。

    METHOD OF ENCAPSULATING AN ELECTRICAL ENERGY ACCUMULATION COMPONENT AND BATTERY
    129.
    发明申请
    METHOD OF ENCAPSULATING AN ELECTRICAL ENERGY ACCUMULATION COMPONENT AND BATTERY 审中-公开
    封装电力能量积累组件和电池的方法

    公开(公告)号:US20140370373A1

    公开(公告)日:2014-12-18

    申请号:US14475018

    申请日:2014-09-02

    发明人: Patrick Hougron

    IPC分类号: B29C45/14 B29D99/00 H01M2/02

    摘要: A method for encapsulating a device, such as an battery, having two opposite and parallel main faces and a peripheral edge, wherein one main face includes an electrical contact zone, includes the steps of retaining the device within an injection chamber of a mold and injecting encapsulation material into the injection chamber to overmold an encapsulation block on the device. The injection chamber is configured to hold a portion of the device, adjacent its peripheral edge, so as to center the device within the injection chamber. The mold includes centering structures that at least partially cover the electrical contact zone. Opposite positioning studs protrude into the injection chamber and bear on the opposite main faces of the device. The resulting packaged device includes an overmolded encapsulation block enveloping the device except for portions covered by the centering structure.

    摘要翻译: 一种用于封装诸如电池的装置的方法,其具有两个相对并且平行的主面和周边边缘,其中一个主面包括电接触区,包括以下步骤:将所述装置保持在模具的注射室内并注射 封装材料进入注射室以覆盖设备上的封装块。 注射室被构造成保持装置的一部分邻近其周边边缘,以使装置在注射室内居中。 模具包括至少部分地覆盖电接触区域的定心结构。 相对的定位柱突出到注射室中,并承载在装置的相对的主面上。 所得到的封装装置包括包覆成型的封装块,其包围该装置,除了由对中结构覆盖的部分。

    Gate amplification triac
    130.
    发明授权
    Gate amplification triac 有权
    门放大三端双向可控硅

    公开(公告)号:US08912566B2

    公开(公告)日:2014-12-16

    申请号:US13658670

    申请日:2012-10-23

    申请人: Yannick Hague

    发明人: Yannick Hague

    摘要: A gate amplification triac including in a semiconductor substrate of a first conductivity type a vertical triac and a lateral bipolar transistor having its emitter connected to the triac gate, its base connected to a control terminal, and its collector connected to a terminal intended to be connected to a first reference voltage, the main terminal of the triac on the side of the transistor being intended to be connected to a second reference voltage, the transistor being formed in a first well of the second conductivity type and the triac comprising on the transistor side a second well of the second conductivity type, the first and second wells being formed so that the substrate-well breakdown voltage of the transistor is greater than the substrate-well breakdown voltage of the triac by at least the difference between the first and second reference voltages.

    摘要翻译: 一种栅极放大三端双向可控硅开关元件,包括在第一导电类型的半导体衬底中的垂直三端双向可控硅开关元件和横向双极晶体管,其发射极连接到三端双向可控硅开关栅极,其基极连接到控制端子,并且其集电极连接到要连接的端子 在第一参考电压下,晶体管侧面上的三端双向可控硅开关的主端子将被连接到第二参考电压,晶体管形成在第二导电类型的第一阱中,并且三端双向可控硅开关元件包括在晶体管侧 第二导电类型的第二阱,第一阱和第二阱形成为使得晶体管的衬底井击穿电压大于三端双向可控硅开关元件的衬底 - 阱击穿电压至少第一和第二参考点之间的差值 电压。