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公开(公告)号：US09998000B2
公开(公告)日：2018-06-12
申请号：US15465339
申请日：2017-03-21
Applicant: Linear Technology Corporation
Inventor： Xu Zhang , Jian Li , San Hwa Chee
CPC classification number: H02M3/07 , H02M1/08 , H02M1/36 , H02M3/073 , H02M2003/072
Abstract: Methods and systems of controlling a switched capacitor converter are provided. Upon determining that a voltage across a flying capacitor is above a first threshold, a first current is drawn from a first terminal of the flying capacitor by a first current source, and a second current is provided to a second terminal of the flying capacitor by a second current source. Upon determining that the voltage across the flying capacitor is below a second threshold, the first current is provided to the first terminal of the flying capacitor by the first current source, and the second current is drawn from the second terminal of the flying capacitor by the second current source. Upon determining that the voltage across the flying capacitor is above the second threshold and below the first threshold from the reference voltage, the first and second current sources are turned OFF.
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公开(公告)号：US20180102800A1
公开(公告)日：2018-04-12
申请号：US15834047
申请日：2017-12-06
Applicant: LINEAR TECHNOLOGY CORPORATION
Inventor： Michael Thomas Engelhardt
IPC: H04B1/04
CPC classification number: H04B1/0475 , H03H11/53 , H04B15/04
Abstract: A method and system of providing an active differential resistor. The active differential resistor includes a diode having a first node and a second node. There is a capacitor coupled in series between the first node of the diode and an input of the active differential resistor. There is a current source coupled across the first node and the second node of the diode and configured to forward bias the diode such that a Johnson-Nyquist noise of the active differential resistor is replaced by a shot noise.
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公开(公告)号：US09899921B1
公开(公告)日：2018-02-20
申请号：US15422373
申请日：2017-02-01
Applicant: Linear Technology Corporation
Inventor： Vikas V. Paduvalli
CPC classification number: H02M3/158 , G05F1/00 , H02J3/12 , H02M1/00 , H02M1/08 , H02M3/156 , H02M3/157 , H02M2001/0009 , H02M2001/0025
Abstract: A current mode switching converter includes a transistor switch, an inductor configured to conduct a ramping inductor current as the transistor switch is turned on and off at a particular duty cycle, and an inductor current sensor generating a current sense signal. The current sense signal has an up-slope portion and a down-slope portion. A separate ramp generator generates a ramp voltage for each switching cycle. A slope compensation circuit compensates the ramp voltage, depending on the duty cycle and other factors, to create a compensated ramp voltage. The compensated ramp voltage is then summed with the current sense signal to create a compensated current sense signal for a comparator. The slope compensation circuit forces the compensated current sense signal to have an up-slope greater than an absolute value of its down-slope at least for duty cycles greater than 50% to rapidly dampen perturbations in the duty cycle.
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公开(公告)号：US20180040384A1
公开(公告)日：2018-02-08
申请号：US15672171
申请日：2017-08-08
Applicant: LINEAR TECHNOLOGY CORPORATION
Inventor： Kalin V. LAZAROV , Timothy D. ROHRER , Michael D. Petersen
CPC classification number: G11C29/50016 , G06F11/22 , G06F11/3037 , G06F11/3058 , G11C7/04 , G11C16/3418 , G11C16/3495 , G11C29/06 , G11C29/50004
Abstract: The data retention time of a non-volatile memory array containing multiple non-volatile memory cells, each cell having a floating gate, may be tested. The method may include: baking the non-volatile memory array at a first temperature for a first duration and at a second temperature that is materially different than the first temperature for a second duration; testing the non-volatile memory array before and after each baking; and deciding whether to use or sell the tested non-volatile memory array based on results of the testing before and after each baking.
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公开(公告)号：US09859909B1
公开(公告)日：2018-01-02
申请号：US15446702
申请日：2017-03-01
Applicant: Linear Technology Corporation
Inventor： Joshua Cowan
CPC classification number: H03M1/1235 , G06F7/556 , H03K7/08 , H03M1/58 , H05B33/0845
Abstract: A method and system of an analog to digital conversion having an exponential result are provided. An analog input signal is received by the ramp ADC. The analog input signal is converted into an N-bit digital signal having a linear relationship with the analog input signal. An internal gated clock signal is generated based on the received first clock signal. The gated clock signal is used as an input to an M-bit register. An output of the M-bit register is multiplied by a predetermined factor. The product of the multiplication is provided as an input to the M-bit register. The output of the M-bit register provides an M-bit output having an exponential relationship with the analog input signal.
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Patent Agency Ranking
公开(公告)号：US09853838B2
公开(公告)日：2017-12-26
申请号：US14712855
申请日：2015-05-14
Applicant: Linear Technology Corporation
Inventor： Andrew J. Gardner , David Dwelley , Jeffrey L. Heath
CPC classification number: H04L25/0266 , H02M3/156 , H02M3/158 , H02M2001/0029 , H04L12/10 , H04L25/0272
Abstract: A Power Over Data Lines (PoDL) system includes Power Sourcing Equipment (PSE) supplying DC power and differential Ethernet data over a single twisted wire pair to a Powered Device (PD). Due to start-up perturbations, PD load current variations, and other causes, dV/dt noise is introduced in the power signal. Such noise may be misinterpreted as data unless mitigated somehow. Rather than increasing the values of the passive filtering components conventionally used for decoupling/coupling the power and data from/to the wire pair, active circuitry is provided in the PSE, PD, or both to limit dV/dt in the power signal. Such circuitry may be implemented on the same chip as the PSE controller or PD controller. Therefore, the sizes of the passive components in the decoupling/coupling networks may be reduced.
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137.发明申请公开(公告)号：US20170311447A1
公开(公告)日：2017-10-26
申请号：US15495405
申请日：2017-04-24
Applicant: LINEAR TECHNOLOGY CORPORATION
Inventor： John David BRAZZLE , Frederick E. BEVILLE , David A. PRUITT
CPC classification number: H05K1/181 , H01L23/49811 , H01L23/50 , H05K1/0203 , H05K3/284 , H05K3/3426 , H05K2201/1003 , H05K2201/10515 , H05K2201/10522 , H05K2201/10553 , H05K2201/10757 , H05K2203/1316
Abstract: A component-on-package circuit may include a component for an electrical circuit and a circuit module attached to the component. The circuit module may have circuitry and at least one leadframe which connects the circuitry to the component both electrically and thermally. The leadframe may have a high degree of both electrical and thermal conductivity and a non-planar shape that provides spring-like cushioning of force applied to the component in the direction of the circuit module.A method of making a component-on-package circuit may include attaching a component for an electrical circuit to a circuit module. The circuit module may have circuitry and at least one leadframe which connects the circuitry to the component after the attachment both electrically and thermally. The leadframe may have a high degree of both electrical and thermal conductivity and a non-planar shape that provides a spring-like cushioning of force applied to the component in the direction of the circuit module. The circuit module may be encapsulated in molding material after the circuit module has been attached to the component, without encapsulation the component at the same time.
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138.发明申请公开(公告)号：US20170237575A1
公开(公告)日：2017-08-17
申请号：US15587324
申请日：2017-05-04
Applicant: Linear Technology Corporation
Inventor： Jeffrey Heath , David Dwelley
CPC classification number: H04B3/56 , H02J3/12 , H04L12/10 , H04L12/40045
Abstract: A PoDL system includes a PSE connected via a wire pair to a PD, where differential data and DC power are transmitted over the same wire pair. Typically, low voltage/current detection and classification routines are required upon every powering up of the system to allow the PD to convey its PoDL requirements to the PSE. Various techniques are described that simplify or obviate such start-up routines or enable increased flexibility for the PoDL system. Such techniques include: ways to specify a particular PD operating voltage; ways to disable the PD's UVLO circuit during such routines; using opposite polarity voltages for the two routines; using voltage limiters or surge protectors to convey the PoDL information; detecting loop resistance; using a PSE memory to store previous results of the routines; and powering the PD communication circuit using the wire pair while the PD load is powered by an alternate power source.
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公开(公告)号：US09660856B2
公开(公告)日：2017-05-23
申请号：US14806492
申请日：2015-07-22
Applicant: Linear Technology Corporation
Inventor： John Perry Myers
CPC classification number: H04L27/364 , H03C2200/0083 , H03D3/009 , H03D2200/0088 , H03F1/3211 , H03F1/3247 , H03F3/4508 , H03F3/45475 , H04B1/1036 , H04B3/32 , H04L25/03343 , H04L27/368
Abstract: A method and system of compensating for distortion in a baseband in-phase (I) and a corresponding baseband quadrature (Q) signal. The circuit includes an in-phase I attenuator configured to attenuate the baseband in-phase I signal and an in-phase Q attenuator configured to attenuate the baseband Q signal. There are one or more circuits that are configured to receive the attenuated in-phase I signal and the attenuated baseband Q signal. Each circuit performs a different calculation based on predetermined equations configured to determine the IM2, HD2@0°, HD2@90°, IM3@0°, IM3@90°, HD3@0°, and HD3@90°. The distortion compensation circuit is configured to use the result of at least one of the calculation circuits to generate I and Q distortion compensation signals.
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公开(公告)号：US09595991B2
公开(公告)日：2017-03-14
申请号：US14981755
申请日：2015-12-28
Applicant: LINEAR TECHNOLOGY CORPORATION
Inventor： Mark Alan Lemkin , Thor Nelson Juneau
CPC classification number: H04B1/18 , H03D7/1441 , H03D7/1466 , H04B1/10 , H04B1/30
Abstract: A frequency converting element includes a mixer and a charge pump. The mixer has first and second input nodes and an output node, and an input code of the charge pump is coupled to the output node of the mixer. The charge pump receives a mixer output signal at the input node of the charge pump, and outputs an amplified version of the mixer output signal.
Abstract translation: 变频元件包括混频器和电荷泵。 混频器具有第一和第二输入节点和输出节点，并且电荷泵的输入码耦合到混频器的输出节点。 电荷泵在电荷泵的输入节点处接收混频器输出信号，并输出混频器输出信号的放大版本。
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