公开(公告)号：US20180347039A1

公开(公告)日：2018-12-06

申请号：US15976050

申请日：2018-05-10

Applicant: Applied Materials, Inc.

Inventor： Ranga Rao Arnepalli ,  Robert Jan Visser ,  Geetika Bajaj ,  Prerna Goradia

IPC: C23C16/448 ,  C23C16/34

Abstract: Embodiments of the disclosure relate to methods of depositing industrial coating on a substrate or process parts. More particularly, embodiments of the disclosure are directed to methods of depositing metals, metal oxides, metal nitrides and/or metal fluorides on surfaces comprised of metals, ceramics, or organic materials. In some embodiments, a metal-containing precursor can be aerosolized with an organic solvent and exposed to a substrate processing chamber where the organic solvent can be evaporated to adsorb the metal-containing precursor. The adsorbed precursor can be decomposed or reacted to form the metal-containing film.

公开(公告)号：US20180342388A1

公开(公告)日：2018-11-29

申请号：US15986178

申请日：2018-05-22

Applicant: Applied Materials, Inc.

Inventor： Tapash Chakraborty ,  Robert Jan Visser ,  Prerna Goradia

IPC: H01L21/02 ,  B05D1/00

Abstract: Embodiments of the disclosure relate to methods of selectively depositing organic and hybrid organic/inorganic layers. More particularly, embodiments of the disclosure are directed to methods of modifying hydroxyl terminated surfaces for selective deposition of molecular layer organic and hybrid organic/inorganic films. Additional embodiments of the disclosure relate to cyclic compounds for use in molecular layer deposition processes.

公开(公告)号：US20180236633A1

公开(公告)日：2018-08-23

申请号：US15477943

申请日：2017-04-03

Applicant: Applied Materials, Inc.

Inventor： Ranga Rao Arnepalli ,  Sudhanshu Singh ,  Darshan Thakare ,  Prerna Goradia ,  Robert Jan Visser

IPC: B24B37/22 ,  B24B57/02 ,  C09G1/02 ,  C09K3/14

CPC classification number: B24B37/22 ,  B24B37/044 ,  B24B57/02 ,  C09G1/02 ,  C09K3/1463

Abstract: A method of polishing includes bringing a metal layer of a substrate into contact with a polishing pad, generating relative motion between the substrate and the polishing pad, and while the metal layer is in contact with the polishing pad and the substrate is moving relative to the polishing pad, alternating between supplying a first polishing liquid and a second polishing liquid to an interface between the metal layer. The first polishing liquid is abrasive-free and includes an oxidizer, and the second polishing liquid includes abrasive particles and a complexing compound to complex with ions of the metal of the metal layer.

公开(公告)号：US20170148640A1

公开(公告)日：2017-05-25

申请号：US15235048

申请日：2016-08-11

Applicant: APPLIED MATERIALS, INC.

Inventor： Fei Wang ,  Mikhail Korolik ,  Nitin K. Ingle ,  Anchuan Wang ,  Robert Jan Visser

IPC: H01L21/311 ,  H01L21/02

CPC classification number: H01L21/31116 ,  H01J37/3244 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/0337 ,  H01L21/3105 ,  H01L21/31144

Abstract: Methods of etching silicon nitride faster than silicon oxide are described. Exposed portions of silicon nitride and silicon oxide may both be present on a patterned substrate. A self-assembled monolayer (SAM) is selectively deposited over the silicon oxide but not on the exposed silicon nitride. Molecules of the self-assembled monolayer include a head moiety and a tail moiety, the head moiety forming a bond with the OH group on the exposed silicon oxide portion and the tail moiety extending away from the patterned substrate. A subsequent gas-phase etch using anhydrous vapor-phase HF may then be used to selectively remove silicon nitride much faster than silicon oxide because the SAM has been found to delay the etch and reduce the etch rate.

公开(公告)号：US20170092533A1

公开(公告)日：2017-03-30

申请号：US14957380

申请日：2015-12-02

Applicant: APPLIED MATERIALS, INC.

Inventor： Tapash Chakraborty ,  Mark Saly ,  Rana Howlader ,  Eswaranand Venkatasubramanian ,  Prerna Sonthalia Goradia ,  Robert Jan Visser ,  David Thompson

IPC: H01L21/768 ,  H01L21/321 ,  H01L21/02

CPC classification number: H01L21/76802 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/0226 ,  H01L21/0228 ,  H01L21/02307 ,  H01L21/32 ,  H01L21/321 ,  H01L21/3212 ,  H01L21/76829 ,  H01L21/7684 ,  H01L21/76877 ,  H01L21/76883

Abstract: Methods of selectively depositing a patterned layer on exposed dielectric material but not on exposed metal surfaces are described. A self-assembled monolayer (SAM) is deposited using phosphonic acids. Molecules of the self-assembled monolayer include a head moiety and a tail moiety, the head moiety forming a bond with the exposed metal portion and the tail moiety extending away from the patterned substrate and reducing the deposition rate of the patterned layer above the exposed metal portion relative to the deposition rate of the patterned layer above the exposed dielectric portion. A dielectric layer is subsequently deposited by atomic layer deposition (ALD) which cannot initiate in regions covered with the SAM in embodiments.

公开(公告)号：US20160172238A1

公开(公告)日：2016-06-16

申请号：US14569301

申请日：2014-12-12

Applicant: Applied Materials, Inc.

Inventor： Bhaskar Kumar ,  Deenesh Padhi ,  Alexandros T. Demos ,  Tapash Chakraborty ,  Geetika Bajaj ,  Robert Jan Visser

IPC: H01L21/768

CPC classification number: H01L21/76831

Abstract: A method of forming features in a low-k dielectric layer is described. A via, trench or a dual damascene structure may be present in the low-k dielectric layer prior to depositing a conformal hermetic layer. The conformal hermetic layer is configured to keep water and contaminants out. Some of the same conformal hermetic layer may deposit on the underlying copper. The portion of the conformal hermetic layer on the underlying copper is preferentially removed but the beneficial portion on the low-k dielectric layer remains. The selective removal of the conformal hermetic layer may be accomplished using a dry etch or a wet etch using a weak organic acid.

Abstract translation: 描述了在低k电介质层中形成特征的方法。 在沉积保形密封层之前，可以在低k电介质层中存在通孔，沟槽或双镶嵌结构。 保形密封层被配置成保持水和污染物排出。 一些相同的保形密封层可能沉积在下面的铜上。 优先除去底层铜上的共形密封层的部分，但是在低k电介质层上的有益部分保留。 选择性去除保形密封层可以使用干蚀刻或使用弱有机酸的湿蚀刻来实现。