公开(公告)号：US20150041801A1

公开(公告)日：2015-02-12

申请号：US14447875

申请日：2014-07-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Takuya HIROHASHI ,  Masahiro TAKAHASHI ,  Motoki NAKASHIMA ,  Ryosuke WATANABE ,  Masashi TSUBUKU

IPC: H01L29/792 ,  H01L29/24

CPC classification number: H01L29/792 ,  H01L29/24 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/66969 ,  H01L29/7869

Abstract: A semiconductor device includes a semiconductor layer, a gate electrode overlapping with the semiconductor layer, a first gate insulating layer between the semiconductor layer and the gate electrode, and a second gate insulating layer between the first gate insulating layer and the gate electrode. The first gate insulating layer includes an oxide in which the nitrogen content is lower than or equal to 5 at. %, and the second gate insulating layer includes charge trap states.

Abstract translation: 半导体器件包括半导体层，与半导体层重叠的栅极电极，在半导体层和栅电极之间的第一栅极绝缘层，以及位于第一栅极绝缘层和栅电极之间的第二栅极绝缘层。 第一栅极绝缘层包括其中氮含量低于或等于5at的氧化物。 ％，第二栅极绝缘层包括电荷陷阱状态。

公开(公告)号：US20140374745A1

公开(公告)日：2014-12-25

申请号：US14303629

申请日：2014-06-13

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Hironobu TAKAHASHI ,  Yukinori SHIMA ,  Yasuharu HOSAKA ,  Toshimitsu OBONAI ,  Masashi TSUBUKU

IPC: H01L27/146 ,  H01L29/786

CPC classification number: H01L27/14663 ,  H01L27/14616 ,  H01L27/14625 ,  H01L27/14692 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/7869 ,  H04N5/3745

Abstract: An imaging device that is highly stable to irradiation with radial rays such as X-rays and can inhibit a decrease in electrical characteristics is provided. The imaging device takes an image with radial rays such as X-rays and includes pixel circuits arranged in a matrix and a scintillator overlapping the pixel circuits. The pixel circuits each includes a switching transistor with an extremely small off-state current and a light-receiving element which is configured to convert the radial rays to electrical charges. A gate insulating film of the switching transistor has a stacked structure including a silicon nitride film with a thickness of 100 nm to 400 nm and a silicon oxide film or a silicon oxynitride film with a thickness of 5 nm to 20 nm.

Abstract translation: 提供了对X射线等径向射线照射高度稳定的成像装置，能够抑制电特性的降低。 成像装置拍摄具有诸如X射线的径向射线的图像，并且包括以矩阵布置的像素电路和与像素电路重叠的闪烁体。 像素电路各自包括非常小的截止电流的开关晶体管和被配置为将径向射线转换成电荷的光接收元件。 开关晶体管的栅极绝缘膜具有包括厚度为100nm至400nm的氮化硅膜和厚度为5nm至20nm的氧化硅膜或氮氧化硅膜的叠层结构。

公开(公告)号：US20140327007A1

公开(公告)日：2014-11-06

申请号：US14334012

申请日：2014-07-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shinya SASAGAWA ,  Hitoshi NAKAYAMA ,  Masashi TSUBUKU ,  Daigo SHIMADA

IPC: H01L27/12 ,  H01L27/088

CPC classification number: H01L29/66969 ,  H01L22/14 ,  H01L27/088 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/7869

Abstract: When a transistor having bottom gate bottom contact structure is manufactured, for example, a conductive layer constituting a source and a drain has a three-layer structure and two-step etching is performed. In the first etching process, an etching method in which the etching rates for at least the second film and the third film are high is employed, and the first etching process is performed until at least the first film is exposed. In the second etching process, an etching method in which the etching rate for the first film is higher than that in the first etching process and the etching rate for a “layer provided below and in contact with the first film” is lower than that in the first etching process is employed. The side wall of the second film is slightly etched when a resist mask is removed after the second etching process.

Abstract translation: 当制造具有底栅底接触结构的晶体管时，例如，构成源极和漏极的导电层具有三层结构，并且执行两步蚀刻。 在第一蚀刻工艺中，采用其中至少第二膜和第三膜的蚀刻速率高的蚀刻方法，并且进行第一蚀刻处理直到至少第一膜暴露。 在第二蚀刻工艺中，第一膜的蚀刻速率高于第一蚀刻工艺中的蚀刻速率和“下面提供并与第一膜接触的”层的蚀刻速率的蚀刻方法低于 采用第一蚀刻工艺。 当在第二蚀刻工艺之后去除抗蚀剂掩模时，第二膜的侧壁被稍微蚀刻。

公开(公告)号：US20140197406A1

公开(公告)日：2014-07-17

申请号：US14217887

申请日：2014-03-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Toshinari SASAKI ,  Junichiro SAKATA ,  Masashi TSUBUKU

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L27/1225 ,  H01L27/1214 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/3248 ,  H01L27/3262 ,  H01L27/3265 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/45 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78693

Abstract: It is an object to manufacture a highly reliable display device using a thin film transistor having favorable electric characteristics and high reliability as a switching element. In a bottom gate thin film transistor including an amorphous oxide semiconductor, an oxide conductive layer having a crystal region is formed between an oxide semiconductor layer which has been dehydrated or dehydrogenated by heat treatment and each of a source electrode layer and a drain electrode layer which are formed using a metal material. Accordingly, contact resistance between the oxide semiconductor layer and each of the source electrode layer and the drain electrode layer can be reduced; thus, a thin film transistor having favorable electric characteristics and a highly reliable display device using the thin film transistor can be provided.

Abstract translation: 本发明的目的是制造使用具有良好的电特性和高可靠性的薄膜晶体管作为开关元件的高度可靠的显示装置。 在包括非晶氧化物半导体的底栅薄膜晶体管中，在已经通过热处理脱水或脱氢的氧化物半导体层与源电极层和漏电极层中的每一个之间形成具有晶体区的氧化物导电层， 使用金属材料形成。 因此，可以减小氧化物半导体层与源极电极层和漏极电极层中的每一个之间的接触电阻; 因此，可以提供具有良好电特性的薄膜晶体管和使用该薄膜晶体管的高度可靠的显示装置。

公开(公告)号：US20130292675A1

公开(公告)日：2013-11-07

申请号：US13870399

申请日：2013-04-25

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Masashi TSUBUKU ,  Yusuke NONAKA ,  Noritaka ISHIHARA ,  Masashi OOTA ,  Hideyuki KISHIDA

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L21/02565 ,  H01L21/477 ,  H01L29/045 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78603 ,  H01L29/78606 ,  H01L29/78696

Abstract: Reducing hydrogen concentration in a channel formation region of an oxide semiconductor is important in stabilizing threshold voltage of a transistor including an oxide semiconductor and improving reliability. Hence, hydrogen is attracted from the oxide semiconductor and trapped in a region of an insulating film which overlaps with a source region and a drain region of the oxide semiconductor. Impurities such as argon, nitrogen, carbon, phosphorus, or boron are added to the region of the insulating film which overlaps with the source region and the drain region of the oxide semiconductor, thereby generating a defect. Hydrogen in the oxide semiconductor is attracted to the defect in the insulating film. The defect in the insulating film is stabilized by the presence of hydrogen.

公开(公告)号：US20130214273A1

公开(公告)日：2013-08-22

申请号：US13832479

申请日：2013-03-15

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Hiroki OHARA ,  Tatsuya HONDA ,  Takatsugu OMATA ,  Yusuke NONAKA ,  Masahiro TAKAHASHI ,  Akiharu MIYANAGA

IPC: H01L29/04

CPC classification number: H01L29/78696 ,  H01L29/045 ,  H01L29/1033 ,  H01L29/247 ,  H01L29/7869 ,  H01L29/78693

Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. Further, a semiconductor device which has stable electric characteristics and high reliability is provided by using the oxide semiconductor film. An oxide semiconductor film includes a crystalline region, and the crystalline region includes a crystal in which an a-b plane is substantially parallel with a surface of the film and a c-axis is substantially perpendicular to the surface of the film; the oxide semiconductor film has stable electric conductivity and is more electrically stable with respect to irradiation with visible light, ultraviolet light, and the like. By using such an oxide semiconductor film for a transistor, a highly reliable semiconductor device having stable electric characteristics can be provided.

Abstract translation: 提供了具有更稳定的导电性的氧化物半导体膜。 此外，通过使用氧化物半导体膜提供具有稳定的电特性和高可靠性的半导体器件。 氧化物半导体膜包括结晶区域，并且结晶区域包括其中a-b平面基本上平行于膜的表面并且c轴基本上垂直于膜的表面的晶体; 氧化物半导体膜具有稳定的导电性，并且相对于可见光，紫外线等的照射而言更加电稳定。 通过使用这种用于晶体管的氧化物半导体膜，可以提供具有稳定电特性的高可靠性半导体器件。

公开(公告)号：US20130153910A1

公开(公告)日：2013-06-20

申请号：US13770120

申请日：2013-02-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Toshinari SASAKI ,  Junichiro SAKATA ,  Masashi TSUBUKU

IPC: H01L29/786

CPC classification number: H01L27/1225 ,  H01L27/1214 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/3248 ,  H01L27/3262 ,  H01L27/3265 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/45 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78693

Abstract: It is an object to manufacture a highly reliable display device using a thin film transistor having favorable electric characteristics and high reliability as a switching element. In a bottom gate thin film transistor including an amorphous oxide semiconductor, an oxide conductive layer having a crystal region is formed between an oxide semiconductor layer which has been dehydrated or dehydrogenated by heat treatment and each of a source electrode layer and a drain electrode layer which are formed using a metal material. Accordingly, contact resistance between the oxide semiconductor layer and each of the source electrode layer and the drain electrode layer can be reduced; thus, a thin film transistor having favorable electric characteristics and a highly reliable display device using the thin film transistor can be provided.

Abstract translation: 本发明的目的是制造使用具有良好的电特性和高可靠性的薄膜晶体管作为开关元件的高度可靠的显示装置。 在包括非晶氧化物半导体的底栅薄膜晶体管中，在已经通过热处理脱水或脱氢的氧化物半导体层与源电极层和漏电极层中的每一个之间形成具有晶体区的氧化物导电层， 使用金属材料形成。 因此，可以减小氧化物半导体层与源极电极层和漏极电极层中的每一个之间的接触电阻; 因此，可以提供具有良好电特性的薄膜晶体管和使用该薄膜晶体管的高度可靠的显示装置。

公开(公告)号：US20130092944A1

公开(公告)日：2013-04-18

申请号：US13649486

申请日：2012-10-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tatsuya HONDA ,  Masashi TSUBUKU ,  Yusuke NONAKA ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L21/20

CPC classification number: H01L21/02631 ,  H01L21/02554 ,  H01L21/02565 ,  H01L29/7869

Abstract: To suppress a decrease in on-state current in a semiconductor device including an oxide semiconductor. Provided is a semiconductor device including the following: an oxide semiconductor film which serves as a semiconductor layer; a gate insulating film including an oxide containing silicon, over the oxide semiconductor film; a gate electrode which overlaps with at least the oxide semiconductor film, over the gate insulating film; and a source electrode and a drain electrode which are electrically connected to the oxide semiconductor film. In the semiconductor device, the oxide semiconductor film overlapping with at least the gate electrode includes a region in which a concentration of silicon distributed from the interface with the gate insulating film toward the inside of the oxide semiconductor film is lower than or equal to 1.1 at. %.

Abstract translation: 抑制包括氧化物半导体的半导体器件中的导通电流的降低。 提供了一种半导体器件，包括：用作半导体层的氧化物半导体膜; 包含氧化物半导体膜的包含硅的氧化物的栅极绝缘膜; 在所述栅极绝缘膜上的至少与所述氧化物半导体膜重叠的栅电极; 以及与氧化物半导体膜电连接的源电极和漏电极。 在半导体装置中，与至少栅电极重叠的氧化物半导体膜包括从与栅极绝缘膜的界面朝向氧化物半导体膜的内部分布的硅的浓度低于或等于1.1的区域 。 ％。

公开(公告)号：US20250169184A1

公开(公告)日：2025-05-22

申请号：US19029162

申请日：2025-01-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Masashi TSUBUKU ,  Kosei NODA

IPC: H10D86/60 ,  G09G3/20 ,  G09G3/3233 ,  G09G3/3291 ,  G09G3/36 ,  G11C19/18 ,  G11C19/28 ,  H03K17/16 ,  H03K19/003 ,  H03K19/096 ,  H10D30/67 ,  H10D86/40

Abstract: To reduce a leakage current of a transistor so that malfunction of a logic circuit can be suppressed. The logic circuit includes a transistor which includes an oxide semiconductor layer having a function of a channel formation layer and in which an off current is 1×10−13 A or less per micrometer in channel width. A first signal, a second signal, and a third signal that is a clock signal are input as input signals. A fourth signal and a fifth signal whose voltage states are set in accordance with the first to third signals which have been input are output as output signals.

公开(公告)号：US20250140572A1

公开(公告)日：2025-05-01

申请号：US19007727

申请日：2025-01-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA ,  Masayuki SAKAKURA ,  Yoshiaki OIKAWA

IPC: H01L21/477 ,  G02F1/1333 ,  G02F1/1368 ,  H01L21/02 ,  H10D30/67 ,  H10D86/01 ,  H10D86/40 ,  H10D86/60 ,  H10D99/00

Abstract: An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.