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    Electric discharge machining of a probe array
    171.
    发明授权
    Electric discharge machining of a probe array 有权
    探头阵列的放电加工

    公开(公告)号：US07488917B2

    公开(公告)日：2009-02-10

    申请号：US11550340

    申请日：2006-10-17

    Applicant: Gaetan L. Mathieu ,  Benjamin N. Eldridge ,  Gary W. Grube

    Inventor： Gaetan L. Mathieu ,  Benjamin N. Eldridge ,  Gary W. Grube

    IPC: B23H9/00

    CPC classification number: B23H9/00 ,  G01R1/07314

    Abstract: A method of forming a probe away includes forming a layer of tip material over a block of probe material. A first electric discharge machine (EDM) electrode is positioned over the layer of tip material, the EDM electrode having a plurality of openings corresponding to a plurality of probes to be formed. Excess material from the layer of tip material and the block of probe material is removed to form the plurality of probes. A substrate having a plurality of through holes corresponding to the plurality of probes is positioned so that the probes penetrate the plurality of through holes. The substrate is bonded to the plurality of probes. Excess probe material is removed so as to planarize the substrate.

    Abstract translation: 形成探头的方法包括在探针材料块上形成尖端材料层。 第一放电机（EDM）电极位于尖端材料层上方，EDM电极具有对应于要形成的多个探针的多个开口。 去除从尖端材料层和探针材料块的多余材料以形成多个探针。 具有对应于多个探针的多个通孔的基板被定位成使得探针穿透多个通孔。 衬底被结合到多个探针。 去除过量的探针材料以使基底平坦化。

    METHOD OF DESIGNING A PROBE CARD APPARATUS WITH DESIRED COMPLIANCE CHARACTERISTICS
    173.
    发明申请
    METHOD OF DESIGNING A PROBE CARD APPARATUS WITH DESIRED COMPLIANCE CHARACTERISTICS 有权
    设计具有所需符合性特征的探针卡设备的方法

    公开(公告)号：US20080238458A1

    公开(公告)日：2008-10-02

    申请号：US12134993

    申请日：2008-06-06

    Applicant: Benjamin N. Eldridge

    Inventor： Benjamin N. Eldridge

    IPC: G01R31/28 ,  H01R43/00

    CPC classification number: G01R1/07364 ,  G01R1/07378 ,  G01R3/00 ,  Y10T29/49117

    Abstract: A probe card apparatus is configured to have a desired overall amount of compliance. The compliance of the probes of the probe card apparatus is determined, and an additional, predetermined amount of compliance is designed into the probe card apparatus so that the sum of the additional compliance and the compliance of the probes total the overall desired compliance of the probe card apparatus.

    Abstract translation: 探针卡装置被配置为具有期望的总体顺应性。 确定探针卡装置的探针的符合性，并且将另外的预定量的顺应性设计到探针卡装置中，使得附加顺应性和探针的顺应性的总和达到探针的总体期望顺应性 卡装置。

    HIGH DENSITY PLANAR ELECTRICAL INTERFACE
    174.
    发明申请
    HIGH DENSITY PLANAR ELECTRICAL INTERFACE 失效
    高密度平面电气接口

    公开(公告)号：US20080150571A1

    公开(公告)日：2008-06-26

    申请号：US12034110

    申请日：2008-02-20

    Applicant: Charles A. Miller ,  Benjamin N. Eldridge

    Inventor： Charles A. Miller ,  Benjamin N. Eldridge

    IPC: G01R1/06

    CPC classification number: G01R1/0466 ,  H01R13/025 ,  H01R13/40 ,  H01R2201/20

    Abstract: An apparatus including a substrate having a plurality of through holes and a plurality of cables, including wires and/or coaxial cables, extending through respective ones of the plurality of through holes of the substrate. Each of the cables comprises a conductor and terminates about a surface of the substrate such that the conductors of respective ones of plurality of cables are planarly aligned and available for electrical contact. A system including a cable interface extending through respective ones of a plurality of through holes of a body of the interface; an interconnection component comprising a first plurality of contact points aligned with respective ones of conductors of the plurality of cables and a second plurality of contact points aligned to corresponding contact points of a device to be tested. Also, a method of routing signals through the conductors of the plurality of cables between electronic components.

    Abstract translation: 一种包括具有多个通孔的基板和包括电线和/或同轴电缆的多根电缆的设备，其延伸穿过基板的多个通孔中的相应的通孔。 每个电缆包括导体并围绕基板的表面终止，使得多个电缆中的相应电缆的导体平面对准并且可用于电接触。 一种系统，包括延伸穿过所述界面的主体的多个通孔中的相应一个的电缆接口; 互连部件，其包括与所述多根电缆中的相应导体对准的第一多个接触点以及与要测试的设备的相应接触点对准的第二多个接触点。 而且，一种通过电子部件之间的多根电缆的导线路由信号的方法。

    SHARING RESOURCES IN A SYSTEM FOR TESTING SEMICONDUCTOR DEVICES
    175.
    发明申请
    SHARING RESOURCES IN A SYSTEM FOR TESTING SEMICONDUCTOR DEVICES 有权
    用于测试半导体器件的系统中的共享资源

    公开(公告)号：US20080136432A1

    公开(公告)日：2008-06-12

    申请号：US11567705

    申请日：2006-12-06

    Applicant: Matthew E. Chraft ,  Benjamin N. Eldridge ,  Roy J. Henson ,  A. Nicholas Sporck

    Inventor： Matthew E. Chraft ,  Benjamin N. Eldridge ,  Roy J. Henson ,  A. Nicholas Sporck

    IPC: G01R31/02

    CPC classification number: G01R31/31926 ,  G01R31/318511

    Abstract: Probes in a plurality of DUT probe groups can be connected in parallel to a single tester channel. In one aspect, digital potentiometers can be used to effectively switch the tester channel from a probe in one DUT probe group to a probe in another DUT probe group. In another aspect, switches in parallel with a resistor can accomplish such switching. In yet another aspect, a chip select terminal on each DUT can be used to effectively connect and disconnect internal DUT circuitry to the tester channel. Multiple DUT probe groups so connected can be used to create different patterns of DUT probe groups for testing different patterns of DUTs and thus facilitate sharing tester channels.

    Abstract translation: 多个DUT探针组中的探针可以并联连接到单个测试仪通道。 在一个方面，数字电位器可用于有效地将测试仪通道从一个DUT探针组中的探头切换到另一个DUT探针组中的探针。 另一方面，与电阻并联的开关可以实现这种切换。 在另一方面，每个DUT上的芯片选择端可用于有效地连接和断开内部DUT电路到测试器通道。 如此连接的多个DUT探针组可用于创建不同的DUT探针组，以测试DUT的不同图案，从而便于共享测试仪通道。

    AC coupled parameteric test probe
    177.
    发明申请
    AC coupled parameteric test probe 有权
    交流耦合参数测试探头

    公开(公告)号：US20070296435A1

    公开(公告)日：2007-12-27

    申请号：US11447371

    申请日：2006-06-06

    Applicant: Benjamin N. Eldridge ,  A. Nicholas Sporck ,  Charles A. Miller

    Inventor： Benjamin N. Eldridge ,  A. Nicholas Sporck ,  Charles A. Miller

    IPC: G01R31/02

    CPC classification number: G01R1/06711 ,  G01R1/06727 ,  G01R1/07 ,  G01R31/3025

    Abstract: A probe for contacting and testing ICs on a semiconductor device includes a dielectric insulating material tip. The dielectric tip does not contaminate the surface being probed unlike metal probe tips. A contact scrub is further not required with signals being capacitively or inductively coupled from the probe tip to the IC. Testing can be performed during early fabrication steps of the wafer without the need for applying a metalization layer to the wafer to form bond pads. Testing can be performed by inductively coupling an AC signal to the probe tip, with coupling enhanced by including a magnetic material in the dielectric probe tip. Using an AC test signal enables testing of ICs without requiring separate power and ground connections.

    Abstract translation: 用于在半导体器件上接触和测试IC的探针包括介电绝缘材料尖端。 与金属探针尖端不同，电介质尖端不会污染被探测的表面。 进一步不需要接触擦洗，信号从探头尖端到IC电容或电感耦合。 可以在晶片的早期制造步骤期间进行测试，而不需要将金属化层施加到晶片以形成接合焊盘。 可以通过将AC信号电感耦合到探针尖端来进行测试，通过在介电探针尖端中包括磁性材料来增强耦合。 使用AC测试信号可以测试IC，而不需要单独的电源和接地连接。

    Sawing tile corners on probe card substrates
    178.
    发明申请
    Sawing tile corners on probe card substrates 失效
    在探针卡片基板上锯切瓦角

    公开(公告)号：US20070290705A1

    公开(公告)日：2007-12-20

    申请号：US11455110

    申请日：2006-06-16

    Applicant: Benjamin N. Eldridge ,  Roy J. Henson ,  Eric D. Hobbs ,  Peter B. Mathews ,  Makarand S. Shinde

    Inventor： Benjamin N. Eldridge ,  Roy J. Henson ,  Eric D. Hobbs ,  Peter B. Mathews ,  Makarand S. Shinde

    IPC: G01R31/26

    CPC classification number: G01R1/07342

    Abstract: A composite substrate for testing semiconductor devices is formed by selecting a plurality of substantially identical individual substrates, cutting a corner from at least some of the individual substrates in accordance with their position in a final array configuration, and then assembling the individual substrates into the final array configuration. The final array configuration of substrates with corners cut or sawed away conforms more closely to the surface area of a wafer being tested, and can easily fit within space limits of a test environment.

    Abstract translation: 用于测试半导体器件的复合衬底通过选择多个基本上相同的单独衬底形成，根据它们在最终阵列构型中的位置从至少一些单个衬底切割拐角，然后将各个衬底组装成最终 阵列配置。 具有切割或锯切的角落的基底的最终阵列配置更接近于正被测试的晶片的表面积，并且可以容易地配合在测试环境的空间极限内。

    Apparatuses and methods for planarizing a semiconductor contactor
    179.
    发明授权
    Apparatuses and methods for planarizing a semiconductor contactor 有权
    用于平坦化半导体接触器的装置和方法

    公开(公告)号：US07262611B2

    公开(公告)日：2007-08-28

    申请号：US10852370

    申请日：2004-05-24

    Applicant: Gaetan L. Mathieu ,  Benjamin N. Eldridge ,  Gary W. Grube

    Inventor： Gaetan L. Mathieu ,  Benjamin N. Eldridge ,  Gary W. Grube

    IPC: G01R31/02

    CPC classification number: G01R1/07307 ,  G01R3/00

    Abstract: A wiring substrate can include a substrate material, which can have a first surface and a second surface. A plurality of first electrically conductive elements can be disposed on the first surface, and a plurality of second electrically conductive elements can be disposed on the second surface. Ones of the first conductive elements can be electrically connected through the substrate material to ones of the second conductive elements. A mechanism can be located in a first region, which can be a center region, of the second surface of the substrate material. The mechanism can be configured to engage a control member. First activation of the control member can apply an adjustable pulling force to the first region, and second activation of the control member can apply an adjustable pushing force to the first region. The mechanism can be or can include a threaded stud, and the control member can be or can include a threaded nut configured to engage the threaded stud.

    Abstract translation: 布线基板可以包括可以具有第一表面和第二表面的基板材料。 多个第一导电元件可以设置在第一表面上，并且多个第二导电元件可以设置在第二表面上。 第一导电元件的一部分可以通过衬底材料电连接到第二导电元件中的一个。 机构可以位于基板材料的第二表面的可以是中心区域的第一区域中。 该机构可以被配置为接合控制构件。 控制构件的第一启动可以对第一区域施加可调节的拉力，并且控制构件的第二启动可以向第一区域施加可调节的推力。 机构可以是或可以包括螺柱，并且控制构件可以是或可以包括构造成接合螺柱的螺纹螺母。

    Systems and methods for wireless semiconductor device testing
    180.
    发明授权
    Systems and methods for wireless semiconductor device testing 有权
    无线半导体器件测试的系统和方法

    公开(公告)号：US07202687B2

    公开(公告)日：2007-04-10

    申请号：US10820319

    申请日：2004-04-08

    Applicant: Igor Y. Khandros ,  Benjamin N. Eldridge ,  Charles A. Miller ,  A. Nicholas Sporck

    Inventor： Igor Y. Khandros ,  Benjamin N. Eldridge ,  Charles A. Miller ,  A. Nicholas Sporck

    IPC: G01R31/26

    CPC classification number: G01R1/0491 ,  G01R1/073 ,  G01R31/3025

    Abstract: A base controller disposed in a test cassette receives test data for testing a plurality of electronic devices. The base controller wirelessly transmits the test data to a plurality of wireless test control chips, which write the test data to each of the electronic devices. The wireless test control chips then read response data generated by the electronic devices, and the wireless test control chips wirelessly transmit the response data to the base controller.

    Abstract translation: 设置在测试盒中的基本控制器接收用于测试多个电子设备的测试数据。 基站控制器将测试数据无线传输到多个无线测试控制芯片，其将测试数据写入每个电子设备。 然后，无线测试控制芯片读取由电子设备产生的响应数据，无线测试控制芯片将响应数据无线发送到基本控制器。

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