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公开(公告)号:US12094844B2
公开(公告)日:2024-09-17
申请号:US18340832
申请日:2023-06-24
发明人: Jen-Yuan Chang
IPC分类号: H01L23/58 , H01L21/66 , H01L23/00 , H01L25/065 , H01L29/10
CPC分类号: H01L24/06 , H01L22/32 , H01L24/03 , H01L24/08 , H01L24/80 , H01L25/0657 , H01L2224/031 , H01L2224/0557 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/06505 , H01L2224/06515 , H01L2224/08146 , H01L2224/80001
摘要: A semiconductor package structure includes a first die, a second die disposed on the first die, and a bonding pad structure. The first die includes a semiconductor substrate, an interconnect structure disposed on the first semiconductor substrate, a passivation layer disposed on the interconnect structure, and a test pad disposed on the passivation layer. The test pad includes a contact region that extends through the passivation layer and electrically contacts the interconnect structure, and a bonding recess that overlaps with the contact region in a vertical direction perpendicular to a plane of the first semiconductor substrate. The bonding pad structure electrically connects the first die and the second die and directly contacts at least a portion of the bonding recess.
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12.
公开(公告)号:US12089368B2
公开(公告)日:2024-09-10
申请号:US18244681
申请日:2023-09-11
发明人: John Bean, Jr. , Paul Dierkes , Shiraz Gulraiz
IPC分类号: H05K7/20
CPC分类号: H05K7/20272 , H05K7/20236 , H05K7/20263 , H05K7/20781
摘要: An immersion cooling system is configured for uniform fluid distribution across computing devices and includes a tank defining an open interior volume, a distribution pipe having a plurality of ports, a distribution plate having a pattern of holes is positioned over the distribution pipe. A siphon wall divides the open interior volume into a first chamber and a second chamber, and the distribution plate and the distribution pipe are in the first chamber. The dielectric cooling fluid enters the first chamber of the tank through the plurality of ports in the distribution pipe, and flows through the pattern of holes in the distribution plate to contact the at least one computing device. The heat dissipates from the at least one computing device into the dielectric cooling fluid, which flows through the siphon wall into the second chamber via a transfer port that is located below a dielectric cooling fluid surface.
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公开(公告)号:US12087756B2
公开(公告)日:2024-09-10
申请号:US18087819
申请日:2022-12-23
发明人: Kuo-Ming Wu , Ming-Che Lee , Hau-Yi Hsiao , Cheng-Hsien Chou , Sheng-Chau Chen , Cheng-Yuan Tsai
IPC分类号: H01L21/30 , H01L21/268 , H01L21/46 , H01L23/00 , H01L23/31 , H01L23/532 , H01L25/00 , H01L21/304 , H01L21/306 , H01L21/3065 , H01L21/308
CPC分类号: H01L25/50 , H01L21/268 , H01L23/3171 , H01L23/3185 , H01L23/5329 , H01L24/94 , H01L21/304 , H01L21/30604 , H01L21/30625 , H01L21/3065 , H01L21/3083 , H01L24/05 , H01L24/08 , H01L2224/0557 , H01L2224/08145 , H01L2224/94
摘要: A bonded assembly of a first wafer including a first semiconductor substrate and a second wafer including a second semiconductor substrate may be formed. The second semiconductor substrate may be thinned to a first thickness, and an inter-wafer moat trench may be formed at a periphery of the bonded assembly. A protective material layer may be formed in the inter-wafer moat trench and over the backside surface of the second semiconductor substrate. A peripheral portion of the second semiconductor substrate located outside the inter-wafer moat trench may be removed, and a cylindrical portion of the protective material layer laterally surrounds a remaining portion of the bonded assembly. The second semiconductor substrate may be thinned to a second thickness by performing at least one thinning process while the cylindrical portion of the protective material layer protects the remaining portion of the bonded assembly.
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公开(公告)号:USD1040773S1
公开(公告)日:2024-09-03
申请号:US29835461
申请日:2022-04-19
设计人: Ethan Miller , Ian Ruppert , Chelsea Young
摘要: FIG. 1 is a top left perspective view of the video delivery device.
FIG. 2 is a front view of the video delivery device.
FIG. 3 is a back view of the video delivery device.
FIG. 4 is a right side view of the video delivery device.
FIG. 5 is a left side view of the video delivery device.
FIG. 6 is a top view of the video delivery device.
FIG. 7 is a bottom view of the video delivery device.
FIG. 8 is a top right perspective view of the video delivery device; and,
FIG. 9 is a bottom left perspective view of the video delivery device.
The broken lines shown in FIGS. 1-9 represent portions of the video delivery device that form no part of the claim.-
公开(公告)号:US12080837B2
公开(公告)日:2024-09-03
申请号:US18155147
申请日:2023-01-17
发明人: Ehsan Raoufat , Ali Zargari , Julio Luna , Alireza Saeedmanesh
IPC分类号: H01M8/12 , C25B1/04 , C25B15/021 , C25B15/027 , G05D23/19 , G05D23/30 , H01M8/04701
CPC分类号: H01M8/12 , C25B1/04 , C25B15/021 , C25B15/027 , G05D23/19 , G05D23/1951 , G05D23/30 , H01M8/04701 , H01M2008/1293
摘要: A controller for a solid oxide electrolyzer cell (SOEC) system, the controller being configured to receive a target operating temperature, receive a readback temperature value, and output a temperature setpoint command to each of a plurality of heaters.
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公开(公告)号:US12078607B2
公开(公告)日:2024-09-03
申请号:US17569680
申请日:2022-01-06
发明人: Chih-Yu Chang , Ken-Ichi Goto , Yen-Chieh Huang , Min-Kun Dai , Han-Ting Tsai , Sai-Hooi Yeong , Yu-Ming Lin , Chung-Te Lin
CPC分类号: G01N27/221 , G01R31/24 , G01R31/2648 , H01L22/14 , H01L27/14
摘要: A method of characterizing a wide-bandgap semiconductor material is provided. A substrate is provided, which includes a layer stack of a conductive material layer, a dielectric material layer, and a wide-bandgap semiconductor material layer. A mercury probe is disposed on a top surface of the wide-bandgap semiconductor material layer. Alternating-current (AC) capacitance of the layer stack is determined as a function of a variable direct-current (DC) bias voltage across the conductive material layer and the wide-bandgap semiconductor material layer. A material property of the wide-bandgap semiconductor material layer is extracted from a profile of the AC capacitance as a function of the DC bias voltage.
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公开(公告)号:US12068376B2
公开(公告)日:2024-08-20
申请号:US17394476
申请日:2021-08-05
发明人: Chien-Hung Lin , Tsai-Hao Hung
IPC分类号: H01L29/40 , H01L21/8249 , H01L27/06
CPC分类号: H01L29/402 , H01L21/8249 , H01L27/0623 , H01L29/401
摘要: Integrated semiconductor devices and method of making the integrated semiconductor are disclosed. The integrated semiconductor device may include a first transistor comprising a first gate and at least one first active region, a second transistor comprising a second gate and at least one second active region, wherein the second transistor is spaced a first distance from the first transistor, a dielectric sidewall spacer formed on a gate sidewall of the first transistor and a gate sidewall of the second transistor, a first dielectric layer formed over the first transistor and the second transistor, wherein a thickness of the first dielectric layer is greater than half the first distance, and a patterned metal layer formed on the first dielectric layer and partially covering the second gate.
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18.
公开(公告)号:US12068249B2
公开(公告)日:2024-08-20
申请号:US17516588
申请日:2021-11-01
发明人: Yoshiyuki Kuroko , Yoshitaka Otsu
IPC分类号: H01L23/52 , H01L21/768 , H01L23/522 , H01L23/528 , H10B41/27 , H10B43/27
CPC分类号: H01L23/5283 , H01L21/76816 , H01L21/76877 , H01L23/5226 , H10B41/27 , H10B43/27
摘要: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, memory stack structures vertically extending through the alternating stack, a perforated dielectric moat structure including a dielectric fill material and vertically extending through the alternating stack. The perforated dielectric moat structure includes, at each level of the insulating layers, two rows of lengthwise dielectric pillar portions laterally extending along a first horizontal direction and two columns of widthwise dielectric pillar portions extending along a second horizontal directions that is perpendicular to the first horizontal direction. Each row of lengthwise dielectric pillar portions has a first center-to-center pitch. Each column of widthwise dielectric pillar portions has a second center-to-center pitch. A ratio of the second center-to-center pitch to the first center-to-center pitch is in a range from 1.50 to 2.0.
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公开(公告)号:US12059769B2
公开(公告)日:2024-08-13
申请号:US17206183
申请日:2021-03-19
发明人: Chun-Hsi Huang
IPC分类号: B24B37/013 , H01L21/306 , H01L21/66
CPC分类号: B24B37/013 , H01L21/30625 , H01L22/26
摘要: A substrate may be loaded onto a chemical mechanical polishing (CMP) apparatus, which includes a polishing pad and a wafer carrier that holds the substrate. The wafer carrier includes a backside plate, a wafer carrier frame, and at least one optical vertical displacement measurement unit that includes a respective laser source and a respective pixelated image sensor. A total reflection geometry is used to reflect a laser beam off a top surface of the backside plate. A polish rate or a polish thickness of a polished portion of the substrate may be measured at each location underneath at least one reflection point during the CMP process.
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20.
公开(公告)号:US12058189B2
公开(公告)日:2024-08-06
申请号:US17318830
申请日:2021-05-12
发明人: Toby Miller
IPC分类号: H04L65/611 , H04L65/1096 , H04L65/401 , H04L65/75
CPC分类号: H04L65/611 , H04L65/1096 , H04L65/4015 , H04L65/75
摘要: Systems, methods, and devices for establishing a context-centric shared-viewing party. A processor in a network server may determine content for shared viewing based on inputs received from a user via a user device, and select a context participant group. Each of the user and participants in the selected group may share a commonality with the other participants in that group. The processor may receive complementary context from at least one or more of the user device or user devices of participants in the selected group. The processor may generate a context stream based on the received contextualized content, and send the context stream to the user device.
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