Switching method for electronic device
    11.
    发明授权
    Switching method for electronic device 有权
    电子设备切换方法

    公开(公告)号:US09304678B2

    公开(公告)日:2016-04-05

    申请号:US13536645

    申请日:2012-06-28

    CPC classification number: G06F3/04883

    Abstract: A switching method for an electronic device having sensing regions is mentioned. The switching method is configured to detect signals received by the electronic device, so as to switch the states of the electronic device. The switching method comprises receiving a first signal at a first moment and receiving a second signal at a second moment, wherein the first signal is generated by touching a first sensing region and the second signal is generated by touching a second sensing region; measuring a triggering duration and determining whether the triggering duration is consistent with a predetermined duration, when the first signal and the second signal are inputted simultaneously; switching the electronic device from a first state to a second state, if the triggering duration is consistent with the predetermined duration; and maintaining the electronic device in the first state, if the triggering duration is not consistent with the predetermined duration.

    Abstract translation: 提及具有感测区域的电子设备的切换方法。 切换方法被配置为检测由电子设备接收的信号,以便切换电子设备的状态。 切换方法包括在第一时刻接收第一信号并在第二时刻接收第二信号,其中通过触摸第一感测区域产生第一信号,并且通过触摸第二感测区域产生第二信号; 当同时输入第一信号和第二信号时,测量触发持续时间并确定触发持续时间是否与预定持续时间一致; 如果触发持续时间与预定持续时间一致,则将电子设备从第一状态切换到第二状态; 并且如果触发持续时间与预定持续时间不一致,则将电子设备维持在第一状态。

    DECISION FEEDBACK EQUALIZER SUMMATION CIRCUIT
    12.
    发明申请
    DECISION FEEDBACK EQUALIZER SUMMATION CIRCUIT 审中-公开
    决策反馈均衡器建立电路

    公开(公告)号:US20160087817A1

    公开(公告)日:2016-03-24

    申请号:US14492237

    申请日:2014-09-22

    CPC classification number: H04L25/03057 H04L25/06 H04L25/08

    Abstract: A circuit includes a summation circuit for receiving an input data signal and a feedback signal including a previous data bit. The summation circuit is configured to output a conditioned input data signal to a clock and data recovery circuit. A first flip-flop is coupled to an output of the summation circuit and is configured to receive a first set of bits of the conditioned input data signal and a first clock signal having a frequency that is less than a frequency at which the input data signal is received by the first summation circuit. A second flip-flop is coupled to the output of the summation circuit and is configured to receive a second set of bits of the conditioned input data signal and a second clock signal having a frequency that is less than the frequency at which the input data signal is received by the first summation circuit.

    Abstract translation: 电路包括用于接收输入数据信号和包括先前数据位的反馈信号的求和电路。 求和电路被配置为将调节的输入数据信号输出到时钟和数据恢复电路。 第一触发器耦合到求和电路的输出,并且被配置为接收经调节的输入数据信号的第一比特组和具有小于输入数据信号的频率的频率的第一时钟信号 由第一求和电路接收。 第二触发器耦合到求和电路的输出,并且被配置为接收经调节的输入数据信号的第二组比特和具有小于输入数据信号的频率的频率的第二时钟信号 由第一求和电路接收。

    Code optimization based on information of readably converted executed instruction groups represented in address file
    13.
    发明授权
    Code optimization based on information of readably converted executed instruction groups represented in address file 有权
    基于在地址文件中表示的可读转换执行指令组的信息进行代码优化

    公开(公告)号:US09292296B2

    公开(公告)日:2016-03-22

    申请号:US13456335

    申请日:2012-04-26

    Abstract: Processing instruction grouping information is provided that includes: reading addresses of machine instructions grouped by a processor at runtime from a buffer to form an address file; analyzing the address file to obtain grouping information of the machine instructions; converting the machine instructions in the address file into readable instructions; and obtaining grouping information of the readable instructions based on the grouping information of the machine instructions and the readable instructions resulted from conversion. Status of grouping and processing performed on instructions by a processor at runtime can be acquired dynamically, such that processing capability of the processor can be better utilized.

    Abstract translation: 提供处理指令分组信息,其包括:从缓冲器读取处理器在缓冲器处分组的机器指令的地址,以形成地址文件; 分析地址文件以获得机器指令的分组信息; 将地址文件中的机器指令转换为可读指令; 并且基于机器指令的分组信息和由转换产生的可读指令,获得可读指令的分组信息。 可以动态地获取由运行时处理器在指令上执行的分组和处理的状态,使得可以更好地利用处理器的处理能力。

    Heat Dissipation Device
    15.
    发明申请
    Heat Dissipation Device 有权
    散热装置

    公开(公告)号:US20150152859A1

    公开(公告)日:2015-06-04

    申请号:US14509661

    申请日:2014-10-08

    Inventor: Chang-Lin Tsai

    Abstract: A heat dissipation device includes an air current producing unit and an electromagnet unit separately disposed on a substrate. The air current producing unit includes a resilient fan body mounted to the substrate and having an unrestrained end, and a magnetic component disposed on the fan body. The electromagnet unit is configured to generate a varying magnetic field that acts on the magnetic component so as to cause the fan body to sway, thereby producing air current.

    Abstract translation: 散热装置包括气流产生单元和分开设置在基板上的电磁体单元。 气流产生单元包括安装到基板上并具有无限制端的弹性风扇体和设置在风扇主体上的磁性部件。 电磁体单元被配置为产生作用在磁性部件上的变化的磁场,从而使风扇主体摇摆,从而产生气流。

    System for display images and fabrication method thereof
    17.
    发明授权
    System for display images and fabrication method thereof 有权
    显示图像系统及其制造方法

    公开(公告)号:US08922534B2

    公开(公告)日:2014-12-30

    申请号:US13542940

    申请日:2012-07-06

    CPC classification number: G02F1/136227 G02F1/136286

    Abstract: A system for displaying images including a display panel and a fabrication method thereof are provided. The method includes forming a first gate line and a second gate line at each row of pixels of the display panel, wherein the first gate lines and the second gate lines are separated and electrically isolated from each other. A first insulating layer is formed to cover the first gate lines and the second gate lines, and a plurality of via holes are formed in the first insulating layer to expose the first gate lines and the second gate lines. Then, a first conductive pattern is formed on the first insulating layer, such that the first gate line at each row of the pixels is electrically connected to the second gate line at an adjacent row of the pixels, by the first conductive pattern, through the via holes.

    Abstract translation: 提供了一种用于显示包括显示面板及其制造方法的图像的系统。 该方法包括在显示面板的每行像素处形成第一栅极线和第二栅极线,其中第一栅极线和第二栅极线彼此分离并电隔离。 形成第一绝缘层以覆盖第一栅极线和第二栅极线,并且在第一绝缘层中形成多个通孔以暴露第一栅极线和第二栅极线。 然后,在第一绝缘层上形成第一导电图案,使得每行像素的第一栅极线通过第一导电图案通过第一导电图案与相邻的像素行的第二栅极线电连接, 通孔。

    Voltage level shifter
    18.
    发明授权
    Voltage level shifter 有权
    电压电平转换器

    公开(公告)号:US08854104B2

    公开(公告)日:2014-10-07

    申请号:US13793681

    申请日:2013-03-11

    CPC classification number: H03L5/00 H03K3/356182 H03K17/102 H03K19/018521

    Abstract: A circuit includes a first capacitive device and a first latch. The first capacitive device includes a first end configured to receive a first input signal and a second end coupled with the first latch. The first latch includes a first transistor and a second transistor that are of a first type. A first terminal of the first transistor and a first terminal of the second transistor are each configured to receive a first voltage value. A second terminal of the first transistor is coupled with a third terminal of the second transistor. A third terminal of the first transistor is coupled with a second terminal of the second transistor and with the second end of the capacitive device, and is configured to provide an output voltage for the first latch.

    Abstract translation: 电路包括第一电容性装置和第一锁存器。 第一电容性装置包括被配置为接收第一输入信号的第一端和与第一锁存器耦合的第二端。 第一锁存器包括第一类型的第一晶体管和第二晶体管。 第一晶体管的第一端子和第二晶体管的第一端子都被配置为接收第一电压值。 第一晶体管的第二端与第二晶体管的第三端耦合。 第一晶体管的第三端子与第二晶体管的第二端子和电容器件的第二端耦合,并且被配置为提供用于第一锁存器的输出电压。

    ALARM DETECTOR
    19.
    发明申请
    ALARM DETECTOR 有权
    报警器

    公开(公告)号:US20140240107A1

    公开(公告)日:2014-08-28

    申请号:US14093283

    申请日:2013-11-29

    Applicant: Chang Lin SUN

    Inventor: Chang Lin SUN

    CPC classification number: G08B3/10 G08B17/00 G08B17/113

    Abstract: An alarm sounder and at least one sound amplification component having at least one horn shaped channel form an alarm detector. The at least one horn shaped channel has a throat end and an outlet end, the throat end being disposed corresponding to a sound-making end of the alarm sounder. The sound intensity of the alarm detector can meet the regulations of the industry standards.

    Abstract translation: 具有至少一个喇叭形通道的报警发声器和至少一个声音放大部件形成报警检测器。 所述至少一个喇叭状通道具有喉部端部和出口端部,所述喉部端部对应于所述警报器的声音制造端设置。 报警探测器的声强可以达到行业标准的规定。

    Method of operating voltage regulator
    20.
    发明授权
    Method of operating voltage regulator 有权
    操作电压调节器的方法

    公开(公告)号:US08766613B2

    公开(公告)日:2014-07-01

    申请号:US13744037

    申请日:2013-01-17

    CPC classification number: H02M3/158 G05F1/44 G05F1/56

    Abstract: A method of operating a voltage regulator circuit includes generating a control signal by an amplifier of the voltage regulator circuit. The control signal is generated based on a reference signal at an inverting input of the amplifier and a feedback signal at a non-inverting input of the amplifier. A driving current flowing toward an output node of the voltage regulator circuit is generated by a driver responsive to the control signal, and the driver is coupled between a first power node and the output node. The feedback signal is generated responsive to a voltage level at the output node. A transistor, coupled between the output node and a second power node, is caused to operate in saturation mode during a period while the voltage regulator circuit is operating.

    Abstract translation: 一种操作电压调节器电路的方法包括由稳压器电路的放大器产生控制信号。 控制信号基于放大器的反相输入处的参考信号和放大器的非反相输入端的反馈信号而产生。 通过响应于控制信号的驱动器产生朝向电压调节器电路的输出节点流动的驱动电流,并且驱动器耦合在第一功率节点和输出节点之间。 响应于输出节点处的电压电平产生反馈信号。 耦合在输出节点和第二功率节点之间的晶体管在电压调节器电路工作期间的一段时间内使其工作在饱和模式。

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