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    System and method to facilitate automatic globalization verification test
    12.
    发明授权
    System and method to facilitate automatic globalization verification test 有权
    系统和方法方便自动全球化验证测试

    公开(公告)号：US07793156B2

    公开(公告)日：2010-09-07

    申请号：US11828459

    申请日：2007-07-26

    申请人： Teppei Tsurumi ,  Yu Wang ,  John F. Sefler ,  Jeff Weiss ,  Morgan Johnson ,  Al Chakra

    发明人： Teppei Tsurumi ,  Yu Wang ,  John F. Sefler ,  Jeff Weiss ,  Morgan Johnson ,  Al Chakra

    IPC分类号： G06F11/00

    CPC分类号： G06F11/3696 ,  G06F11/3692

    摘要： A method, system and program are disclosed for validating the generation of globalized versions of software programs. The directory structure of an installed software program is traversed to discover resource files containing globalized strings. The values of the globalized string and its corresponding key in the resource file are then used to generate a unique key, formatted to identify the location of the globalized string. The locale supported by the globalized string is determined and the unique key and the globalized string value are appended to a corresponding locale table. A globalized string value that causes the failure of a globalization test for a predetermined locale is identified. The corresponding locale table is then searched for the failed globalized string value. Once found, the unique key for the failed globalized string value is retrieved to identify the location of the defective globalized string and perform predetermined remedial actions.

    摘要翻译： 公开了用于验证软件程序的全球化版本的生成的方法，系统和程序。 遍历安装的软件程序的目录结构以发现包含全球化字符串的资源文件。 然后，全局化字符串的值和资源文件中的对应关键字用于生成唯一的密钥，用于标识全局化字符串的位置。 确定全局化字符串支持的语言环境，并将唯一键和全局化字符串值附加到相应的语言环境表。 识别出导致全局测试失败的全局化字符串值对于预定区域。 然后搜索相应的语言环境表以获取失败的全局化字符串值。 一旦找到，检索失败的全球化字符串值的唯一键，以识别缺陷全局化字符串的位置，并执行预定的补救措施。

    Method and apparatus for fixed-form multi-planar extension of electrical conductors beyond the margins of a substrate
    13.
    发明申请
    Method and apparatus for fixed-form multi-planar extension of electrical conductors beyond the margins of a substrate 有权
    电导体的固定形式多平面延伸超过衬底边缘的方法和装置

    公开(公告)号：US20080001617A1

    公开(公告)日：2008-01-03

    申请号：US11811874

    申请日：2007-06-11

    申请人： Morgan Johnson

    发明人： Morgan Johnson

    IPC分类号： G01R31/26

    CPC分类号： G01R31/2884 ,  G01R31/2851 ,  G01R31/2853 ,  G01R31/2855

    摘要： An apparatus, suitable for coupling a pads of integrated circuits on wafer to the pogo pins of a pogo tower in a test system without the need of a probe card, includes a body having a first surface and a second surface, the body having a substantially circular central portion, and a plurality of bendable arms extending outwardly from the central portion, each bendable arm having a connector tab disposed at the distal end thereof; a first plurality of contact terminals disposed on the second surface of the central portion of the body, the first plurality of contact terminals arranged in pattern to match the layout of pads on a wafer to be contacted; at least one contact terminal disposed on the first surface of the plurality of connector tabs; and a plurality of electrically conductive pathways disposed in the body such that each of the first plurality of contact terminals is electrically connected to a corresponding one of the contact terminals on the first surface of the connector tabs.

    摘要翻译： 一种适于将晶片上的集成电路的焊盘与测试系统中的浮标塔的弹簧销耦合而不需要探针卡的装置包括具有第一表面和第二表面的本体，该主体具有基本上 圆形中心部分和从中心部分向外延伸的多个可弯曲臂，每个可弯曲臂具有设置在其远端处的连接片; 设置在所述主体的中心部分的第二表面上的第一多个接触端子，所述第一多个接触端子以图案布置以匹配待接触的晶片上的焊盘的布局; 至少一个接触端子，设置在所述多个连接器接头的第一表面上; 以及设置在所述主体中的多个导电通路，使得所述第一多个接触端子中的每一个电连接到所述连接器接头的第一表面上的对应的一个接触端子。

    Selective application of conductive material to substrates by pick and place of compliant contact arrays
    14.
    发明申请
    Selective application of conductive material to substrates by pick and place of compliant contact arrays 失效
    通过拾取和放置柔性接触阵列，将导电材料选择性地应用于基板

    公开(公告)号：US20060128176A1

    公开(公告)日：2006-06-15

    申请号：US11349285

    申请日：2006-02-06

    申请人： Morgan Johnson

    发明人： Morgan Johnson

    IPC分类号： H01R12/00

    CPC分类号： H05K3/4015 ,  H05K3/027 ,  H05K3/341 ,  H05K2203/0191 ,  H05K2203/0769 ,  H05K2203/0786 ,  Y10T428/12493 ,  Y10T428/12507 ,  Y10T428/12514

    摘要： Application of a conductive material with a compliant underlayer onto selected pads of a substrate, includes forming at least one padstack, by patterning a sheet including a stack of material layers. Padstacks may include a first conductive top layer, one or more underlying layers, and a bottom attachment layer, such as a solder layer. At least one flexible, or compliant, layer is disposed in the sheet between the top and attachment layers. The compliant layer may be a conductive elastomer. The top layer of the padstacks are adhered to a soluble tape, and this composite structure is moved into place over the circuit board by means of a pick and place operation. The placement of the padstacks is followed by a solder reflow to adhere the padstacks to the contact pads of the substrate, and by a wash cycle with a solvent to remove the soluble tape.

    摘要翻译： 将具有柔顺底层的导电材料施加到衬底的选定焊盘上，包括通过图案化包括一叠材料层的片材来形成至少一个衬垫堆叠。 垫片可以包括第一导电顶层，一个或多个下层和底部附着层，例如焊料层。 在顶部和附着层之间的片材中设置至少一个柔性或柔顺层。 柔性层可以是导电弹性体。 衬垫的顶层粘附到可溶性胶带上，并且通过拾取和放置操作将该复合结构移动到电路板上的适当位置。 焊盘的放置之后是焊料回流，以将焊盘粘附到衬底的接触焊盘，并且通过用溶剂洗涤循环以除去可溶性带。

    HEAT MANAGEMENT IN AN ABOVE MOTHERBOARD INTERPOSER WITH PERIPHERAL CIRCUITS
    18.
    发明申请
    HEAT MANAGEMENT IN AN ABOVE MOTHERBOARD INTERPOSER WITH PERIPHERAL CIRCUITS 审中-公开
    具有外围电路的上述主机插座的热管理

    公开(公告)号：US20120300392A1

    公开(公告)日：2012-11-29

    申请号：US13491418

    申请日：2012-06-07

    申请人： Morgan Johnson ,  Frederick G. Weiss

    发明人： Morgan Johnson ,  Frederick G. Weiss

    IPC分类号： G06F1/20

    摘要： A computing device has a circuit substrate having a socket, a main processor inserted into the socket, an interposer substrate inserted between the socket and the main processor, the circuit substrate, the socket and the interposer substrate being electrically connected, at least one peripheral circuit on the interposer substrate, and a heat sink thermally coupled to the peripheral circuit.

    摘要翻译： 计算装置具有电路基板，具有插座，主处理器插入插座中，插入插座和主处理器之间的插入基板，电路基板，插座和插入器基板电连接，至少一个外围电路 在内插器基板上，以及热耦合到外围电路的散热器。

    System and method to facilitate automatic globalization verification test
    20.
    发明申请
    System and method to facilitate automatic globalization verification test 有权
    系统和方法方便自动全球化验证测试

    公开(公告)号：US20090031170A1

    公开(公告)日：2009-01-29

    申请号：US11828459

    申请日：2007-07-26

    申请人： Teppei Tsurumi ,  Yu Wang ,  John F. Sefler ,  Jeff Weiss ,  Morgan Johnson ,  Al Chakra

    发明人： Teppei Tsurumi ,  Yu Wang ,  John F. Sefler ,  Jeff Weiss ,  Morgan Johnson ,  Al Chakra

    IPC分类号： G06F11/36

    CPC分类号： G06F11/3696 ,  G06F11/3692

    摘要： A method, system and program are disclosed for validating the generation of globalized versions of software programs. The directory structure of an installed software program is traversed to discover resource files containing globalized strings. The values of the globalized string and its corresponding key in the resource file are then used to generate a unique key, formatted to identify the location of the globalized string. The locale supported by the globalized string is determined and the unique key and the globalized string value are appended to a corresponding locale table. A globalized string value that causes the failure of a globalization test for a predetermined locale is identified. The corresponding locale table is then searched for the failed globalized string value. Once found, the unique key for the failed globalized string value is retrieved to identify the location of the defective globalized string and perform predetermined remedial actions.

    摘要翻译： 公开了用于验证软件程序的全球化版本的生成的方法，系统和程序。 遍历安装的软件程序的目录结构以发现包含全球化字符串的资源文件。 然后，全局化字符串的值和资源文件中的对应关键字用于生成唯一的密钥，用于标识全局化字符串的位置。 确定全局化字符串支持的语言环境，并将唯一键和全局化字符串值附加到相应的语言环境表。 识别出导致全局测试失败的全局化字符串值对于预定区域。 然后搜索相应的语言环境表以获取失败的全局化字符串值。 一旦找到，检索失败的全球化字符串值的唯一键，以识别缺陷全局化字符串的位置，并执行预定的补救措施。