中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

22 records (took 0.016 seconds)

    SEMICONDUCTOR DEVICE WITH RECESS GATE AND METHOD FOR FABRICATING THE SAME
    12.
    发明申请
    SEMICONDUCTOR DEVICE WITH RECESS GATE AND METHOD FOR FABRICATING THE SAME 审中-公开
    具有凹槽的半导体器件及其制造方法

    公开(公告)号：US20120261748A1

    公开(公告)日：2012-10-18

    申请号：US13534516

    申请日：2012-06-27

    Applicant: Seung-Mi LEE ,  Yun-Hyuck Ji ,  Tae-Kyun Kim ,  Jin-Yul Lee

    Inventor： Seung-Mi LEE ,  Yun-Hyuck Ji ,  Tae-Kyun Kim ,  Jin-Yul Lee

    IPC: H01L29/78

    CPC classification number: H01L29/66621 ,  H01L21/28114 ,  H01L21/28211 ,  H01L29/42368 ,  H01L29/66537 ,  H01L29/78

    Abstract: A semiconductor device includes a substrate with a recess pattern, a gate electrode filling the recess pattern, a threshold voltage adjusting layer formed in the substrate under the recess pattern, a source/drain region formed in the substrate on both sides of the gate electrode and a gate insulation layer, with the recess pattern being disposed between the gate electrode and the substrate, wherein the thickness of the gate insulation layer formed in a region adjacent to the source/drain region is greater than the thickness of the gate insulation layer formed in a region adjacent to the threshold voltage adjusting layer.

    Abstract translation: 半导体器件包括具有凹陷图案的衬底，填充凹陷图案的栅电极，在凹槽图案下形成在衬底中的阈值电压调节层，形成在栅电极两侧的衬底中的源/漏区，以及 栅极绝缘层，其中凹部图案设置在栅电极和衬底之间，其中形成在与源极/漏极区相邻的区域中的栅极绝缘层的厚度大于形成在栅极绝缘层中的栅极绝缘层的厚度 与阈值电压调整层相邻的区域。

    Method of doping P-type impurity ions in dual poly gate and method of forming dual poly gate using the same
    14.
    发明授权
    Method of doping P-type impurity ions in dual poly gate and method of forming dual poly gate using the same 失效
    在双重多晶硅栅极中掺杂P型杂质离子的方法和使用其形成双重多晶硅栅的方法

    公开(公告)号：US08003501B2

    公开(公告)日：2011-08-23

    申请号：US12650833

    申请日：2009-12-31

    Applicant: Kyoung Bong Rouh ,  Seung Mi Lee

    Inventor： Kyoung Bong Rouh ,  Seung Mi Lee

    IPC: H01L21/42 ,  H01L21/425

    CPC classification number: H01L21/28035 ,  H01L21/2236 ,  H01L21/32155 ,  H01L21/823842

    Abstract: A method of doping p-type impurity ions in a dual poly gate, comprising: forming a polysilicon layer doped with n-type impurity ions on a substrate with a gate insulation layer being interposed between the polysilicon layer and the substrate; exposing a region of the polysilicon layer; implementing a first doping of p-type impurity ions into the exposed region of the polysilicon layer by ion implantation so with a projection range Rp to a predetermined depth of the polysilicon layer; and implementing a second doping of p-type impurity ions into the exposed region of the polysilicon layer doped with the p-type impurity ions by plasma doping with a sloped doping profile.

    Abstract translation: 一种在双重多晶硅栅极中掺杂p型杂质离子的方法，包括：在衬底上形成掺杂n型杂质离子的多晶硅层，其中栅极绝缘层介于多晶硅层和衬底之间; 暴露多晶硅层的区域; 通过离子注入实现p型杂质离子的第一掺杂进入多晶硅层的暴露区域，使投影范围Rp达到多晶硅层的预定深度; 以及通过具有倾斜掺杂分布的等离子体掺杂，将p型杂质离子第二次掺杂到掺杂有p型杂质离子的多晶硅层的暴露区域中。

    Semiconductor device having buried bit line and method for fabricating the same
    15.
    发明授权
    Semiconductor device having buried bit line and method for fabricating the same 有权
    具有掩埋位线的半导体器件及其制造方法

    公开(公告)号：US09431402B2

    公开(公告)日：2016-08-30

    申请号：US13468091

    申请日：2012-05-10

    Applicant: Yun-Hyuck Ji ,  Kwan-Woo Do ,  Beom-Yong Kim ,  Seung-Mi Lee ,  Woo-Young Park

    Inventor： Yun-Hyuck Ji ,  Kwan-Woo Do ,  Beom-Yong Kim ,  Seung-Mi Lee ,  Woo-Young Park

    IPC: H01L21/336 ,  H01L27/108 ,  H01L21/20 ,  H01L29/78 ,  H01L29/66

    CPC classification number: H01L27/10808 ,  H01L21/2018 ,  H01L27/10873 ,  H01L27/10885 ,  H01L29/66666 ,  H01L29/7827

    Abstract: A method for fabricating a semiconductor device includes: forming an insulation layer over a semiconductor substrate; forming a first conductive layer over the insulation layer; forming a plurality of buried bit lines and insulation layer patterns isolated by a plurality of trenches, wherein the plurality of trenches are formed by etching the first conductive layer and the insulation layer; forming a sacrificial layer to gap-fill the trenches; forming a second conductive layer over the buried bit lines and the sacrificial layer; and forming a plurality of pillars over each of the buried bit lines by etching the second conductive layer.

    Abstract translation: 一种制造半导体器件的方法包括：在半导体衬底上形成绝缘层; 在所述绝缘层上形成第一导电层; 形成由多个沟槽隔离的多个掩埋位线和绝缘层图案，其中所述多个沟槽通过蚀刻所述第一导电层和所述绝缘层而形成; 形成牺牲层以间隙填充沟槽; 在所述掩埋位线和所述牺牲层上形成第二导电层; 以及通过蚀刻所述第二导电层在每个所述掩埋位线上形成多个柱。

    AMNIOTIC FLUID COLLECTOR
    17.
    发明申请
    AMNIOTIC FLUID COLLECTOR 有权
    生物流体收集器

    公开(公告)号：US20130030325A1

    公开(公告)日：2013-01-31

    申请号：US13639600

    申请日：2011-04-05

    Applicant: Bo Hyun Yoon ,  Chan Wook Park ,  Seung Mi Lee ,  Joong Shin Park

    Inventor： Bo Hyun Yoon ,  Chan Wook Park ,  Seung Mi Lee ,  Joong Shin Park

    IPC: A61B5/00

    CPC classification number: A61B17/4208 ,  A61B10/0045 ,  A61B10/0048 ,  A61M1/0009

    Abstract: According to the present invention, an amniotic fluid collector is configured so as to be inserted and positioned inside the vagina of a birthing mother in order to collect amniotic fluid from the womb of the birthing mother. In particular, the amniotic fluid collector of the present invention comprises: a receiving member, in the side of which an opening is defined, which is inserted into the vagina of the birthing mother and which has a receptacle defined therein for receiving the amniotic fluid; and a positioning portion for positioning the receiving member inside the vagina. Thus, the effects of alleviating pain and psychological anxiety of a birthing mother and eliminating the danger of the occurrence of complications can be achieved, as well as those of easily and smoothly collecting amniotic fluid from the womb of the birthing mother.

    Abstract translation: 根据本发明，羊水收集器被构造为插入并定位在分娩母亲的阴道内部，以从分娩母亲的子宫收集羊水。 特别地，本发明的羊水收集器包括：接收构件，其侧面限定开口，其被插入到分娩母亲的阴道中，并且具有限定在其中的用于接收羊水的容器; 以及用于将所述接收构件定位在所述阴道内的定位部。 因此，可以实现减轻分娩母亲的疼痛和心理焦虑，消除并发症发生的危险的效果，以及从分娩母亲子宫容易且顺利收集羊水的效果。

    Method of Doping P-type Impurity Ions in Dual Poly Gate and Method of Forming Dual Poly Gate Using the Same
    18.
    发明申请
    Method of Doping P-type Impurity Ions in Dual Poly Gate and Method of Forming Dual Poly Gate Using the Same 失效
    双聚门中掺杂P型杂质离子的方法及其使用双聚合门的方法

    公开(公告)号：US20100317180A1

    公开(公告)日：2010-12-16

    申请号：US12650833

    申请日：2009-12-31

    Applicant: Kyoung Bong Rouh ,  Seung Mi Lee

    Inventor： Kyoung Bong Rouh ,  Seung Mi Lee

    IPC: H01L21/28

    CPC classification number: H01L21/28035 ,  H01L21/2236 ,  H01L21/32155 ,  H01L21/823842

    Abstract: A method of doping p-type impurity ions in a dual poly gate, comprising: forming a polysilicon layer doped with n-type impurity ions on a substrate with a gate insulation layer being interposed between the polysilicon layer and the substrate; exposing a region of the polysilicon layer; implementing a first doping of p-type impurity ions into the exposed region of the polysilicon layer by ion implantation so with a projection range Rp to a predetermined depth of the polysilicon layer; and implementing a second doping of p-type impurity ions into the exposed region of the polysilicon layer doped with the p-type impurity ions by plasma doping with a sloped doping profile.

    Abstract translation: 一种在双重多晶硅栅极中掺杂p型杂质离子的方法，包括：在衬底上形成掺杂n型杂质离子的多晶硅层，其中栅极绝缘层介于多晶硅层和衬底之间; 暴露多晶硅层的区域; 通过离子注入实现p型杂质离子的第一掺杂进入多晶硅层的暴露区域，使投影范围Rp达到多晶硅层的预定深度; 以及通过具有倾斜掺杂分布的等离子体掺杂，将p型杂质离子第二次掺杂到掺杂有p型杂质离子的多晶硅层的暴露区域中。

    SEMICONDUCTOR DEVICE WITH RECESS GATE AND METHOD FOR FABRICATING THE SAME
    19.
    发明申请
    SEMICONDUCTOR DEVICE WITH RECESS GATE AND METHOD FOR FABRICATING THE SAME 失效
    具有凹槽的半导体器件及其制造方法

    公开(公告)号：US20100258861A1

    公开(公告)日：2010-10-14

    申请号：US12614543

    申请日：2009-11-09

    Applicant: Seung-Mi Lee ,  Yun-Hyuck Ji ,  Tae-Kyun Kim ,  Jin-Yul Lee

    Inventor： Seung-Mi Lee ,  Yun-Hyuck Ji ,  Tae-Kyun Kim ,  Jin-Yul Lee

    IPC: H01L29/78 ,  H01L21/336

    CPC classification number: H01L29/66621 ,  H01L21/28114 ,  H01L21/28211 ,  H01L29/42368 ,  H01L29/66537 ,  H01L29/78

    Abstract: A semiconductor device includes a substrate with a recess pattern, a gate electrode filling the recess pattern, a threshold voltage adjusting layer formed in the substrate under the recess pattern, a source/drain region formed in the substrate on both sides of the gate electrode and a gate insulation layer, with the recess pattern being disposed between the gate electrode and the substrate, wherein the thickness of the gate insulation layer formed in a region adjacent to the source/drain region is greater than the thickness of the gate insulation layer formed in a region adjacent to the threshold voltage adjusting layer.

    Abstract translation: 半导体器件包括具有凹陷图案的衬底，填充凹陷图案的栅电极，在凹槽图案下形成在衬底中的阈值电压调节层，形成在栅电极两侧的衬底中的源/漏区，以及 栅极绝缘层，其中凹部图案设置在栅电极和衬底之间，其中形成在与源极/漏极区相邻的区域中的栅极绝缘层的厚度大于形成在栅极绝缘层中的栅极绝缘层的厚度 与阈值电压调整层相邻的区域。

    Amniotic fluid collector
    20.
    发明授权
    Amniotic fluid collector 有权
    羊水收集器

    公开(公告)号：US09125687B2

    公开(公告)日：2015-09-08

    申请号：US13639600

    申请日：2011-04-05

    Applicant: Bo Hyun Yoon ,  Chan Wook Park ,  Seung Mi Lee ,  Joong Shin Park

    Inventor： Bo Hyun Yoon ,  Chan Wook Park ,  Seung Mi Lee ,  Joong Shin Park

    IPC: A61B17/42 ,  A61B10/00 ,  A61M1/00

    CPC classification number: A61B17/4208 ,  A61B10/0045 ,  A61B10/0048 ,  A61M1/0009

    Abstract: According to the present invention, an amniotic fluid collector is configured so as to be inserted and positioned inside the vagina of a birthing mother in order to collect amniotic fluid from the womb of the birthing mother. In particular, the amniotic fluid collector of the present invention comprises: a receiving member, in the side of which an opening is defined, which is inserted into the vagina of the birthing mother and which has a receptacle defined therein for receiving the amniotic fluid; and a positioning portion for positioning the receiving member inside the vagina. Thus, the effects of alleviating pain and psychological anxiety of a birthing mother and eliminating the danger of the occurrence of complications can be achieved, as well as those of easily and smoothly collecting amniotic fluid from the womb of the birthing mother.

    Abstract translation: 根据本发明，羊水收集器被构造为插入并定位在分娩母亲的阴道内部，以从分娩母亲的子宫收集羊水。 特别地，本发明的羊水收集器包括：接收构件，其侧面限定开口，其被插入到分娩母亲的阴道中，并且具有限定在其中的用于接收羊水的容器; 以及用于将所述接收构件定位在所述阴道内的定位部。 因此，可以实现减轻分娩母亲的疼痛和心理焦虑，消除并发症发生的危险的效果，以及从分娩母亲子宫容易且顺利收集羊水的效果。

Patent Agency Ranking