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公开(公告)号：US11653115B2
公开(公告)日：2023-05-16
申请号：US17429709
申请日：2020-01-23
发明人： Adi Xhakoni , Ali Jaderi , Guy Meynants
IPC分类号： H04N5/369 , H04N5/3745
CPC分类号： H04N5/36963 , H04N5/3698 , H04N5/37455
摘要： An image sensor system has a pixel array with a plurality of pixels, each of the pixels comprising a photodiode, a pixel buffer and a transfer gate coupled between the photodiode and an input of the pixel buffer. A voltage supply block is configured to generate a pixel supply voltage from an input voltage based on a first reference voltage and to provide the pixel supply voltage to the pixel array. A calibration processing block is configured to determine an average pixel signal based on an average of individual pixel signals at outputs of the pixels of the pixel array and to determine a correction value based on the average pixel signal and a reference pixel signal. A correction processing block is configured to determine the first reference voltage based on a combination of a second reference voltage and the correction value.
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公开(公告)号：US20180323795A1
公开(公告)日：2018-11-08
申请号：US15773149
申请日：2016-10-27
发明人： Adi XHAKONI , Tim BLANCHAERT
CPC分类号： H03M1/182 , H03M1/1235 , H03M1/56 , H04N5/3575 , H04N5/365 , H04N5/378
摘要： An analog-to-digital converter (110) for an imaging device comprises an analog signal input (123) for receiving an analog signal from a pixel array of the imaging device and N ramp signal inputs (121, 122) for receiving N ramp signals, where N is an integer≥2. The N ramp signals have different slopes. The ADC has a clock input (143) for receiving at least one clock signal. A comparison stage (120) is connected to the ramp signal inputs and to the analog signal input. The comparison stage (120) is configured to compare the ramp signals with the analog signal to provide comparison outputs during the conversion period. A control stage (130) is configured to control a counter stage (140) based on the comparison outputs and a selection input indicative of when at least one handover point has been reached during the conversion period.
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13.发明授权公开(公告)号：US12123771B2
公开(公告)日：2024-10-22
申请号：US17792285
申请日：2020-12-08
发明人： Adi Xhakoni
IPC分类号： G01J1/44 , H04N23/11 , H04N25/40 , H04N25/771 , H04N25/772 , H04N25/79
CPC分类号： G01J1/44 , H04N23/11 , H04N25/40 , H04N25/771 , H04N25/772 , H04N25/79 , G01J2001/446
摘要： A pixel cell comprises a plurality of pixels, each pixel comprising a photodiode, a readout circuit comprising a first readout component and a second readout component, wherein a first group of the pixels is configured to detect electromagnetic radiation in a first wavelength range, a second group of the pixels is configured to detect electromagnetic radiation in a second wavelength range, the first readout component is connected with the first group of pixels, the second readout component is connected with the second group of pixels, the first wavelength range is different from the second wavelength range, and the second readout component comprises a plurality of storage capacitors, wherein each pixel of the second group of pixels is assigned to at least one of the storage capacitors, or the second readout component comprises a memory element. Furthermore, a method for operating a pixel cell is provided.
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公开(公告)号：US11910111B2
公开(公告)日：2024-02-20
申请号：US17264668
申请日：2019-07-17
发明人： Guy Meynants
IPC分类号： H04N25/531 , H04N25/75 , H04N25/771 , H01L27/146 , H04N25/778
CPC分类号： H04N25/531 , H04N25/75 , H04N25/771 , H01L27/1464 , H01L27/14621 , H01L27/14625 , H01L27/14634 , H04N25/778
摘要： A pixel cell includes a pixel set with a plurality of pixels, with each pixel of the pixel set being configured to capture optical information incident upon the respective pixel and generate electrical information representative of the optical information. The pixel cell further includes a readout circuit which is configured to manage collection and output of the electrical information from each pixel of the pixel set and to operate the pixel set in a global shutter mode and in a rolling shutter mode of operation. In the global shutter mode, the electrical information from each pixel is combined for generating a global shutter output signal, while in the rolling shutter mode, the electrical information from each pixel is used to generate individual rolling shutter output signals.
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公开(公告)号：US20230232132A1
公开(公告)日：2023-07-20
申请号：US18002413
申请日：2021-06-17
发明人： Adi XHAKONI , Xiaoliang GE
IPC分类号： H04N25/771 , H04N25/78
CPC分类号： H04N25/771 , H04N25/78 , G03B15/02
摘要： A pixel includes a transfer gate, and a sample structure having a first sample stage and a second sample stage. The transfer gate and the first and the second sample stages are configured to be operated in conjunction with a light source in response to a control signal. The first sample stage is configured to sample a first sample value that depends on radiation incident on the photosensitive element from an object or a scene that is illuminated by the light source emitting light at a first output power, while the second sample stage is configured to sample a second sample value that depends on radiation incident on the photosensitive element from the object or the scene that is illuminated by the light source emitting light at a second output power. The first output power is different, in particular significantly different, from the second output power.
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公开(公告)号：US20220132061A1
公开(公告)日：2022-04-28
申请号：US17429709
申请日：2020-01-23
发明人： Adi XHAKONI , Ali JADERI , Guy MEYNANTS
IPC分类号： H04N5/369 , H04N5/3745
摘要： An image sensor system has a pixel array with a plurality of pixels, each of the pixels comprising a photodiode, a pixel buffer and a transfer gate coupled between the photodiode and an input of the pixel buffer. A voltage supply block is configured to generate a pixel supply voltage from an input voltage based on a first reference voltage and to provide the pixel supply voltage to the pixel array. A calibration processing block is configured to determine an average pixel signal based on an average of individual pixel signals at outputs of the pixels of the pixel array and to determine a correction value based on the average pixel signal and a reference pixel signal. A correction processing block is configured to determine the first reference voltage based on a combination of a second reference voltage and the correction value.
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公开(公告)号：US20220085089A1
公开(公告)日：2022-03-17
申请号：US17416550
申请日：2019-11-13
发明人： Guy MEYNANTS , Gerhard EILMSTEINER
IPC分类号： H01L27/146
摘要： A pixel with enhanced quantum efficiency comprises a semiconductor body that has a first surface configured as an entrance surface and a light capturing region configured for capturing light that is incident on the first surface. The pixel further comprises a structured interface, isolation layers on at least two surfaces of the semiconductor body that are perpendicular to the first surface, and a filter element that is arranged at a distance from the first surface such that light that is incident on the first surface at an angle of incidence smaller than a critical angle impinges on the filter element.
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公开(公告)号：US20220030187A1
公开(公告)日：2022-01-27
申请号：US17298329
申请日：2019-11-28
发明人： Guy Meynants , Koen Ruythooren , Pieter De Wit
IPC分类号： H04N5/369 , H04N5/376 , H04N5/3745 , H01L27/146
摘要： An image sensor comprises an array comprising rows and columns of pixels, a first number N of connection lines connected to a first number N of pixels of the array, a voltage regulating circuit having an output, a first terminal, and a driver circuit. The driver circuit has a first number N of switches coupled to the first number N of connection lines and to the output of the voltage regulating circuit, and a first number N of further switches coupled to the first number N of connection lines and to the first terminal. The first number N is at least two.
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公开(公告)号：US20180351570A1
公开(公告)日：2018-12-06
申请号：US15773537
申请日：2016-10-27
发明人： Adi XHAKONI , Tim BLANCHAERT , Guy MEYNANTS
CPC分类号： H03M1/56 , H03M1/1235 , H03M1/1245 , H03M1/183 , H04N5/355 , H04N5/3575 , H04N5/365 , H04N5/378
摘要： An analog-to-digital converter (110) comprises an analog signal input (122) for receiving an analog signal and an amplifying stage (160) configured to generate a set of N amplified analog signals, where N is an integer≥2. The set of N signals have different gains. The ADC has a ramp signal input (121) for receiving a ramp signal and a clock input (143) for receiving at least one clock signal. A comparison stage (120) is connected to the set of amplified analog signals (SigG1, SigG2) and to the ramp signal input (121). The comparison stage (120) is configured to compare the amplified analog signals with the ramp signal to provide comparison outputs during a conversion period. A control stage is configured to control the counter stage (140) based on the comparison outputs and a selection input indicative of when at least one handover point has been reached during the conversion period.
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公开(公告)号：US20240340547A1
公开(公告)日：2024-10-10
申请号：US18681721
申请日：2022-08-10
发明人： Denver Lloyd , Scott Johnson , Adi Xhakoni
IPC分类号： H04N25/59 , H04N25/53 , H04N25/616 , H04N25/703
CPC分类号： H04N25/59 , H04N25/53 , H04N25/616 , H04N25/703
摘要： In an embodiment a method for operating a pixel arrangement includes, during an exposure period, accumulating, by a photodetector, in a first integration period, charge carriers, pulsing, at an end of the first integration period, a transfer transistor to a first voltage level for transferring a portion of the accumulated charge carriers to a diffusion node, wherein the portion is configured to be drained to a supply voltage, continuing, by the photodetector, to accumulate, in a second integration period, charge carriers, after the second integration period, pulsing the transfer transistor to a respective further voltage level with at least one additional pulse, wherein, with each additional pulse, an additional portion of the accumulated charge carriers is configured to be drained to the supply voltage, and wherein each additional pulse is followed by an additional continued accumulation of charge carriers in a respective additional integration period with the photodetector.
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