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公开(公告)号:US20220352006A1
公开(公告)日:2022-11-03
申请号:US17730967
申请日:2022-04-27
Applicant: ASM IP Holding B.V.
Inventor: Shujin Huang , Junwei Su , Xing Lin , Alexandros Demos , Rutvij Naik , Wentao Wang , Matthew Goodman , Robin Scott , Amir Kajbafvala , Robinson James , Youness Alvandi-Tabrizi , Caleb Miskin
IPC: H01L21/687 , C23C16/52 , C23C16/458
Abstract: A susceptor has a circular pocket portion, an annular ledge portion, and an annular rim ledge portion. The circular pocket portion is arranged along a rotation axis and has a perforated surface. The annular ledge portion extends circumferentially about pocket portion and has ledge surface that slopes axially upward from the perforated surface. The rim portion extends circumferentially about the ledge portion and is connected to the pocket portion by the ledge portion of the susceptor. The susceptor has one or more of a tuned pocket, a contact break, a precursor vent, and a purge channel located radially outward of the perforated surface to control deposition of a film onto a substrate supported by the susceptor. Semiconductor processing systems, film deposition methods, and methods of making susceptors are also described.
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公开(公告)号:US20240355688A1
公开(公告)日:2024-10-24
申请号:US18642877
申请日:2024-04-23
Applicant: ASM IP Holding B.V.
Inventor: Amir Kajbafvala , Arun Murali , Caleb Miskin
CPC classification number: H01L22/20 , C23C16/0209 , C23C16/0227 , C23C16/45544 , C23C16/46 , C23C16/50 , C23C16/52 , H01L21/67248
Abstract: A method for removing contaminants from an upper surface of a substrate inside various chambers of a semiconductor processing system is provided. The method may comprise heating at least a portion of the upper surface to a predetermined upper surface bake temperature to induce a chemical reaction of the contaminants with hydrogen gas in the deposition chamber and remove contaminants from the upper surface. The temperature of the bulk material forming the substrate remains substantially lower than the predetermined upper surface bake temperature. After heating the upper surface to remove the contaminants, a material layer may be deposited onto the upper surface. The semiconductor processing system and computer instructions for operating the semiconductor processing system are also described.
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公开(公告)号:US20240222116A1
公开(公告)日:2024-07-04
申请号:US18398995
申请日:2023-12-28
Applicant: ASM IP Holding B.V.
Inventor: Gregory Deye , Caleb Miskin
IPC: H01L21/02 , C23C16/24 , C23C16/455 , C23C16/458 , C23C16/52 , C23C16/56 , C30B25/18
CPC classification number: H01L21/0262 , C23C16/24 , C23C16/45544 , C23C16/45553 , C23C16/4583 , C23C16/52 , C23C16/56 , C30B25/186 , H01L21/02576 , H01L21/02579
Abstract: A semiconductor processing system, comprising a chamber configured to support a substrate, a first precursor source, a second precursor source and a dopant source connected to the chamber and a controller operably connected the first precursor source, the second precursor source and the dopant source. The controller responsive to instructions recorded on a memory is to support a substrate within a chamber of a semiconductor processing system, flow a first precursor into the chamber in contact with a first surface of the substrate, form a template layer of silicon-containing film on the first surface of the substrate, etch non-uniformities on the first surface of the substrate, flow a dopant-containing precursor into the chamber in contact with a second surface of the substrate wherein the second surface is a top surface of the template layer, and form a nucleation layer on the second surface.
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14.
公开(公告)号:US20240203734A1
公开(公告)日:2024-06-20
申请号:US18540329
申请日:2023-12-14
Applicant: ASM IP Holding B.V.
Inventor: Maritza Mujica , Ernesto Suarez , Amir Kajbafvala , Rami Khazaka , Arum Murali , Frederick Aryeetey , Yanfu Lu , Caleb Miskin , Alexandros Demos , Bibek Karki
CPC classification number: H01L21/0262 , C30B25/10 , C30B25/16 , C30B29/06 , C30B29/52 , C30B29/68 , H01L21/02532 , H01L21/02579 , H01L29/7848 , H01L29/167
Abstract: Methods for forming multilayer structures are disclosed. The methods may include, seating a substrate within a chamber body, and regulating a temperature profile across an upper surface of the substrate during each individual deposition phase of multiphase deposition process. Semiconductor device structures including multilayer structures are also disclosed.
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公开(公告)号:US20230420309A1
公开(公告)日:2023-12-28
申请号:US18212827
申请日:2023-06-22
Applicant: ASM IP Holding B.V.
Inventor: Omar Elleuch , Robinson James , Peter Westrom , Caleb Miskin , Alexandros Demos
IPC: H01L21/66 , H01L21/02 , H01L21/3065
CPC classification number: H01L22/20 , H01L21/02532 , H01L21/3065
Abstract: A method of forming silicon within a gap on a surface of a substrate. The method includes use of two or more pyrometers to measure temperatures at two or more positions on a substrate and/or a substrate support and a plurality of heaters that can be divided into zones of heaters, wherein the heaters or zones of heaters can be independently controlled based on the measured temperatures and desired temperature profiles.
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16.
公开(公告)号:US20230125884A1
公开(公告)日:2023-04-27
申请号:US18048145
申请日:2022-10-20
Applicant: ASM IP Holding, B.V.
Inventor: Gregory Deye , Arun Murali , Frederick Aryeetey , Caleb Miskin , Alexandros Demos
IPC: H01L21/02 , H01L21/285 , H01L21/67 , H01L21/687
Abstract: A material layer deposition method includes supporting a substrate in a preclean module and exposing the substrate to a preclean etchant while supported within the preclean module. The substrate is transferred to a deposition module and exposed to an adsorbate while supported within the deposition module. A material layer is the deposited onto the substrate while supported within the deposition module subsequent to exposing the substrate to the adsorbate. Semiconductor processing systems and computer program products are also described.
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公开(公告)号:US20230005744A1
公开(公告)日:2023-01-05
申请号:US17850370
申请日:2022-06-27
Applicant: ASM IP Holding B.V.
Inventor: Caleb Miskin , Omar Elleuch , Peter Westrom , Rami Khazaka , Qi Xie , Alexandros Demos
IPC: H01L21/02 , C23C16/455
Abstract: A method of forming a structure includes supporting a substrate within a reaction chamber of a semiconductor processing system, the substrate having a recess with a bottom surface and a sidewall surface extending upwards from the bottom surface of the recess. A film is deposited within the recess and onto the bottom surface and the sidewall surface of the recess, the film having a bottom segment overlaying the bottom surface of the recess and a sidewall segment deposited onto the sidewall surface of the recess. The sidewall segment of the film is removed while at least a portion bottom segment of the film is retained within the recess, the sidewall segment of the film removed from the sidewall surface more rapidly than removing the bottom segment of the film from the bottom surface of the recess. Semiconductor processing systems and structures formed using the method are also described.
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公开(公告)号:US20250079167A1
公开(公告)日:2025-03-06
申请号:US18815636
申请日:2024-08-26
Applicant: ASM IP Holding B.V.
Inventor: Ernesto Suarez , Amir Kajbafvala , Arun Murali , Caleb Miskin , Alexandros Demos
IPC: H01L21/02 , H01L21/306 , H01L21/3065 , H01L29/167
Abstract: A method of forming a semiconductor structure includes seating a substrate on a substrate support arranged within a chamber arrangement of a semiconductor processing system, flowing a boron-containing precursor to the chamber arrangement at a first boron-containing precursor mass flow rate, and depositing a first portion of a first SiGe:B layer using the boron-containing precursor. Mass flow rate of the boron-containing precursor to an intermediate boron-containing precursor flow rate, a second portion of the first SiGe:B layer is deposited using the boron-containing precursor, mass flow rate of the boron-containing precursor to the chamber arrangement is further increased to a second boron-containing precursor mass flow rate, and a second SiGe:B layer is deposited onto the first SiGe:B layer using the boron-containing precursor, the increase in the mass flow rate of the boron-containing precursor to the intermediate boron-containing precursor mass flow rate limits boron concentration at a first SiGe:B layer-to-second SiGe:B layer interface defined between the first SiGe:B layer and the second SiGe:B layer to less than a boron concentration within the second SiGe:B layer. Semiconductor processing systems and related computer program products are also provided.
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公开(公告)号:US12163227B2
公开(公告)日:2024-12-10
申请号:US17684523
申请日:2022-03-02
Applicant: ASM IP Holding B.V.
Inventor: Amir Kajbafvala , Yanfu Lu , Caleb Miskin
IPC: C23C16/458 , C23C16/22 , C23C16/52
Abstract: A method of forming a structure is provided. The method includes supporting a substrate within a reaction chamber of a semiconductor processing system, flowing a silicon precursor and a germanium precursor into the reaction chamber, and forming a silicon-germanium layer overlaying the substrate with the silicon containing precursor and the germanium precursor. Concentration of the germanium precursor within the reaction chamber is increased during the forming of the silicon-germanium layer overlaying the substrate. Methods of forming film stack structures, semiconductor device structures, and semiconductor processing systems are also described.
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公开(公告)号:US20240332016A1
公开(公告)日:2024-10-03
申请号:US18742250
申请日:2024-06-13
Applicant: ASM IP Holding B.V.
Inventor: Amir Kajbafvala , Peter Westrom , Joe Margetis , Xin Sun , Caleb Miskin , Yen Lin Leow , Yanfu Lu
CPC classification number: H01L21/0262 , C23C16/08 , C23C16/45512 , C23C16/52 , C30B25/165 , C30B25/186 , C30B29/52 , H01L21/02532
Abstract: A method of forming a silicon germanium layer on a surface of a substrate and a system for forming a silicon germanium layer are disclosed. Examples of the disclosure provide a method that includes providing a plurality of growth precursors to control and/or promote parasitic gas-phase and surface reactions, such that greater control of the film (e.g., thickness and/or composition) uniformity can be realized.
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