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公开(公告)号:US20220375809A1
公开(公告)日:2022-11-24
申请号:US17883550
申请日:2022-08-08
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Ming-Han WANG , Ian HU
IPC: H01L23/31 , H01L25/065 , H01L23/00 , H01L21/56 , H01L23/48 , H01L21/683 , H01L25/10
Abstract: A semiconductor device package includes a first substrate, a second substrate, and a first electronic component between the first substrate and the second substrate. The first electronic component has a first surface facing the first substrate and a second surface facing the second substrate. The semiconductor device package also includes a first electrical contact disposed on the first surface of the first electronic component and electrically connecting the first surface of the first electronic component with the first substrate. The semiconductor device package also includes a second electrical contact disposed on the second surface of the first electronic component and electrically connecting the second surface of the first electronic component with the second substrate. A method of manufacturing a semiconductor device package is also disclosed.
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公开(公告)号:US20220084926A1
公开(公告)日:2022-03-17
申请号:US17018701
申请日:2020-09-11
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Ian HU , Jin-Feng YANG , Cheng-Yu TSAI , Hung-Hsien HUANG
IPC: H01L23/498 , H01L23/427 , H01L23/00 , H01L21/48
Abstract: A substrate structure, a method for manufacturing the same and a semiconductor device structure including the same are provided. The substrate structure includes a heat pipe, a first conductive layer and an insulation layer. The heat pipe has an upper surface and a lower surface. The heat pipe includes an opening extending from the upper surface to the lower surface. The first conductive layer is disposed on the upper surface and includes a via structure passing through the opening. The insulation layer is disposed between the heat pipe and the conductive layer.
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公开(公告)号:US20210265273A1
公开(公告)日:2021-08-26
申请号:US16798152
申请日:2020-02-21
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chien Lin CHANG CHIEN , Chiu-Wen LEE , Ian HU , Chang Chi LEE
IPC: H01L23/538 , H01L23/498 , H01L21/48
Abstract: A semiconductor device package includes a plurality of semiconductor chips and an interposer structure. The interposer structure has a plurality of tiers for accommodating the plurality of semiconductor chips. The interposer structure includes at least one conductive via connecting to a pad of the plurality of semiconductor chips.
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公开(公告)号:US20190341368A1
公开(公告)日:2019-11-07
申请号:US15968562
申请日:2018-05-01
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Ian HU , Ming-Han WANG , Tsun-Lung Hsieh , Chih-Yi HUANG , Chih-Pin HUNG
IPC: H01L25/065 , H01L23/498 , H01L23/00 , H01L23/31 , H01L25/00
Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a substrate, an interposer disposed on the substrate, a conductive pillar disposed on the substrate, a first semiconductor device disposed on the interposer and electrically connected to the conductive pillar, a second semiconductor device disposed on the interposer, and an encapsulant surrounding the conductive pillar. The first semiconductor device includes a first conductive pad electrically connected to the interposer. The second semiconductor device includes a second conductive pad electrically connected to the interposer.
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公开(公告)号:US20180226320A1
公开(公告)日:2018-08-09
申请号:US15429024
申请日:2017-02-09
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Ian HU , Jia-Rung HO , Jin-Feng YANG , Chih-Pin HUNG , Ping-Feng YANG
IPC: H01L23/373 , H01L23/367 , H01L23/31 , H01L23/04 , H01L23/00
CPC classification number: H01L24/48 , H01L23/04 , H01L23/3121 , H01L23/3135 , H01L23/3142 , H01L23/367 , H01L23/373 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L2224/131 , H01L2224/13101 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/48228 , H01L2224/49175 , H01L2224/49431 , H01L2224/49433 , H01L2224/73204 , H01L2224/73265 , H01L2224/83493 , H01L2224/8592 , H01L2224/92125 , H01L2924/00014 , H01L2924/15321 , H01L2924/16195 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2924/014 , H01L2224/29099
Abstract: A semiconductor package includes a substrate, a semiconductor chip and a heat dissipation structure. The semiconductor chip includes a first surface, a second surface opposite to the first surface, and at least one chip pad disposed adjacent to the first surface. The chip pad is electrically connected to the substrate. The heat dissipation structure is disposed adjacent to the second surface of the semiconductor chip and a portion of the substrate. An area of the heat dissipation structure is greater than an area of the semiconductor chip.
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公开(公告)号:US20220093528A1
公开(公告)日:2022-03-24
申请号:US17025972
申请日:2020-09-18
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Ian HU
IPC: H01L23/00 , H01L25/18 , H01L23/367 , H01L21/52
Abstract: A package structure and a method for manufacturing the same are provided. The package structure includes a redistribution structure, a first electronic device, at least one second electronic device, a protection material, a heat dissipation structure and a reinforcement structure. The first electronic device is disposed on the redistribution structure. The second electronic device is disposed on the redistribution structure. The protection material is disposed between the first electronic device and the second electronic device. The heat dissipation structure is disposed on the first electronic device and the second electronic device. The reinforcement structure is disposed in an accommodating space between the heat dissipation structure and the protection material.
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公开(公告)号:US20210327815A1
公开(公告)日:2021-10-21
申请号:US16850999
申请日:2020-04-16
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Ian HU , Shin-Luh TARNG
IPC: H01L23/538 , H01L21/48 , H01L21/50
Abstract: A substrate, a semiconductor package device and a method of manufacturing a semiconductor device package are provided. The substrate includes a low density wiring structure, a first middle density wiring structure and high density wiring structure. The first middle density wiring structure is electrically connected to the low density wiring structure. The high density wiring structure is electrically connected to the low density wiring structure. The high density wiring structure and the first middle density wiring structure are disposed side by side. A line space of a circuit layer of the low density wiring structure is greater than a line space of a circuit layer of the first middle density wiring structure. The line space of the circuit layer of the first middle density wiring structure is greater than a line space of a circuit layer of the high density wiring structure.
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公开(公告)号:US20200161206A1
公开(公告)日:2020-05-21
申请号:US16197351
申请日:2018-11-20
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Ian HU , Cheng-Yu TSAI
IPC: H01L23/367 , H01L23/538 , H01L25/16 , H01L23/31 , H01L23/00 , H01L21/56
Abstract: A semiconductor package structure includes a semiconductor die, at least one wiring structure, a metal support, a passive element, a plurality of signal vias, and a plurality of thermal structures. The semiconductor die has an active surface. The at least one wiring structure is electrically connected to the active surface of the semiconductor die. The metal support is used for supporting the semiconductor die. The passive element is electrically connected to the semiconductor die. The signal vias are electrically connecting the passive element and the semiconductor die. The thermal structures are connected to the passive element, and the thermal structures are disposed on a periphery of the at least one wiring structure.
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公开(公告)号:US20200083143A1
公开(公告)日:2020-03-12
申请号:US16566502
申请日:2019-09-10
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Jung-Che TSAI , Ian HU , Chih-Pin HUNG
IPC: H01L23/427 , H01L23/36 , H01L23/00
Abstract: An electronic device includes a main substrate, a semiconductor package structure and at least one heat pipe. The semiconductor package structure is electrically connected to the main substrate, and includes a die mounting portion, a semiconductor die and a cover structure. The semiconductor die is disposed on the die mounting portion. The cover structure covers the semiconductor die. The heat pipe contacts the cover structure for dissipating a heat generated by the semiconductor die.
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公开(公告)号:US20190164859A1
公开(公告)日:2019-05-30
申请号:US15823467
申请日:2017-11-27
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Tsan-Hsien CHEN , Ian HU , Jin-Feng YANG , Shih-Wei CHEN , Hui-Chen HSU
IPC: H01L23/31 , H01L23/433 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/373
CPC classification number: H01L23/3128 , H01L21/4814 , H01L21/565 , H01L23/367 , H01L23/373 , H01L23/3737 , H01L23/4334 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/1134 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/8592 , H01L2924/00014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/00012 , H01L2224/45099
Abstract: A semiconductor package device includes a substrate, an electronic component, a bonding wire, a heat spreader, a thermal conductive structure and an encapsulant. The electronic component is disposed on the substrate. The bonding wire connects the electronic component to the substrate. The heat spreader is disposed over the electronic component. The thermal conductive structure is disposed between the heat spreader and the electronic component. The thermal conductive structure includes two polymeric layers and a thermal conductive layer. The conductive layer is disposed between the two polymeric layers. The thermal conductive layer has a first end in contact with the electronic component and a second end in contact with the heat spreader. The encapsulant covers the bonding wire.
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