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    Self referenced single-ended chip to chip communication
    12.
    发明授权
    Self referenced single-ended chip to chip communication 有权

    公开(公告)号：US11750325B2

    公开(公告)日：2023-09-05

    申请号：US16933449

    申请日：2020-07-20

    Applicant: Apple Inc.

    Inventor： Jafar Savoj ,  Praveen R. Singh ,  Brian S. Leibowitz ,  Emerson S. Fang

    IPC: H04L1/02 ,  H03K19/0175 ,  H04L25/02 ,  H04L25/06 ,  H04L25/03

    CPC classification number: H04L1/02 ,  H03K19/0175 ,  H04L25/0272 ,  H04L25/062 ,  H04L2025/03363

    Abstract: A system and method for efficiently transporting data in a computing system are contemplated. In various embodiments, a computing system includes a source, a destination and multiple lanes between them for transporting data. Multiple receivers in the destination has a respective termination resistor connected to a single integrating capacitor, which provides a reference voltage to the multiple receivers. The receivers reconstruct the received data by comparing the corresponding input signals to the reference voltage. The source includes a table storing code words. The source maps a generated data word to a code word, which is sent to the destination. The destination maps the received code word to the data word. The values of the code words are selected to maintain a nearly same number of Boolean ones on the multiple lanes over time as a number of Boolean zeroes.

    Chip to chip interface with scalable bandwidth
    13.
    发明授权
    Chip to chip interface with scalable bandwidth 有权

    公开(公告)号：US11023403B2

    公开(公告)日：2021-06-01

    申请号：US16700356

    申请日：2019-12-02

    Applicant: Apple Inc.

    Inventor： Jafar Savoj ,  Jose A. Tierno ,  Sanjeev K. Maheshwari ,  Brian S. Leibowitz ,  Pradeep R. Trivedi ,  Gin Yee ,  Emerson S. Fang

    IPC: G06F13/42 ,  G06F9/52 ,  G06F13/40

    Abstract: A system and method for efficiently transporting data across lanes. A computing system includes an interconnect with lanes for transporting data between a source and a destination. When a source receives an indication of a bandwidth requirement change from a first data rate to a second data rate, the transmitter in the source sends messages to the receiver in the destination. The messages indicate that the data rate is going to change and reconfiguration of one or more lanes will be performed. The transmitter selects one or more lanes for transporting data at the second data rate. The transmitter maintains data transport at the first data rate while reconfiguring the selected one or more lanes to the second data rate. After completing the reconfiguration, the transmitter transports data at the second data rate on the selected one or more lanes while preventing data transport on any unselected lanes.

    Micro Analog Sensor Circuit and System
    19.
    发明申请
    Micro Analog Sensor Circuit and System 有权

    公开(公告)号：US20220100220A1

    公开(公告)日：2022-03-31

    申请号：US17033528

    申请日：2020-09-25

    Applicant: Apple Inc.

    Inventor： Ali Mesgarani ,  Ke Yun ,  Seyedeh Sedigheh Hashemi ,  Jasdeep S. Dhaliwal ,  Mansour Keramat ,  Jafar Savoj ,  Bruno W. Garlepp ,  Vahid Majidzadeh Bafar ,  Emerson S. Fang

    IPC: G05F3/26 ,  H03M1/34 ,  H03M3/00 ,  G01K7/01

    Abstract: The present disclosure is directed to a system implementing a sensor. A sensing system is implemented in a functional circuit block that is coupled to a global supply voltage node. The sensing system includes a power converter circuit configured to generate a regulated voltage level on a local supply node using the voltage present on the global supply voltage node. The system also includes a sensor circuit coupled to receive the regulated voltage node, wherein the sensor is configured to compare corresponding parameters of different ones of a number of subset of device at a plurality of different time points and generate a plurality of comparison results. The comparisons generate an analog signal that is proportional to the operating parameter. An analog-to-digital converter (ADC) is coupled to receive the analog signal and generate a plurality of bits corresponding thereto.

    Self Referenced Single-Ended Chip to Chip Communication
    20.
    发明申请
    Self Referenced Single-Ended Chip to Chip Communication 有权

    公开(公告)号：US20210099252A1

    公开(公告)日：2021-04-01

    申请号：US16933449

    申请日：2020-07-20

    Applicant: Apple Inc.

    Inventor： Jafar Savoj ,  Praveen R. Singh ,  Brian S. Leibowitz ,  Emerson S. Fang

    IPC: H04L1/02 ,  H03K19/0175

    Abstract: A system and method for efficiently transporting data in a computing system are contemplated. In various embodiments, a computing system includes a source, a destination and multiple lanes between them for transporting data. Multiple receivers in the destination has a respective termination resistor connected to a single integrating capacitor, which provides a reference voltage to the multiple receivers. The receivers reconstruct the received data by comparing the corresponding input signals to the reference voltage. The source includes a table storing code words. The source maps a generated data word to a code word, which is sent to the destination. The destination maps the received code word to the data word. The values of the code words are selected to maintain a nearly same number of Boolean ones on the multiple lanes over time as a number of Boolean zeroes.

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