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    Maintaining I/O priority and I/O sorting
    11.
    发明授权
    Maintaining I/O priority and I/O sorting 有权
    维护I / O优先级和I / O排序

    公开(公告)号：US08959263B2

    公开(公告)日：2015-02-17

    申请号：US13736846

    申请日：2013-01-08

    Applicant: Apple Inc.

    Inventor： Joseph Sokol, Jr. ,  Manoj Radhakrishnan ,  Matthew J. Byom ,  Robert Hoopes ,  Christopher Sarcone

    IPC: G06F13/00 ,  G06F13/18 ,  G06F3/00

    CPC classification number: G06F13/30 ,  G06F13/18 ,  G06F13/37 ,  G06F13/372

    Abstract: Multiple variants of a data processing system, which maintains I/O priority from the time a process makes an I/O request until the hardware services that request, will be described. In one embodiment, a data processing system has one or more processors having one or more processor cores, which execute an operating system and one or more applications of the data processing system. The data processing system also can have one or more non-volatile memory device coupled to the one or more processors to store data of the data processing system, and one or more non-volatile memory controller coupled to the one or more processors. The one or more non-volatile memory controller enables a transfer of data to at least one non-volatile memory device, and the priority level assigned by the operating system is maintained throughout the logical data path of the data processing system.

    Abstract translation: 数据处理系统的多个变体，将描述从进程I / O请求直到所请求的硬件服务之前的I / O优先级。 在一个实施例中，数据处理系统具有一个或多个处理器，其具有一个或多个处理器核，其执行操作系统和数据处理系统的一个或多个应用。 数据处理系统还可以具有耦合到一个或多个处理器的一个或多个非易失性存储器设备来存储数据处理系统的数据，以及耦合到该一个或多个处理器的一个或多个非易失性存储器控制器。 一个或多个非易失性存储器控制器使得能够将数据传送到至少一个非易失性存储器设备，并且在数据处理系统的整个逻辑数据路径中保持由操作系统分配的优先级。

    METHODS AND SYSTEMS FOR MONITORING WRITE OPERATIONS OF NON-VOLATILE MEMORY
    12.
    发明申请
    METHODS AND SYSTEMS FOR MONITORING WRITE OPERATIONS OF NON-VOLATILE MEMORY 审中-公开
    用于监视非易失性存储器的写操作的方法和系统

    公开(公告)号：US20140245084A1

    公开(公告)日：2014-08-28

    申请号：US14267277

    申请日：2014-05-01

    Applicant: Apple Inc.

    Inventor： Matthew J. Byom ,  Nir J. Wakrat

    IPC: G06F12/02 ,  G06F11/20

    CPC classification number: G06F11/2094 ,  G06F11/073 ,  G06F11/0757 ,  G06F11/076 ,  G06F11/0793 ,  G06F12/0246 ,  G06F2212/7204 ,  G06F2212/7211

    Abstract: Systems and methods are disclosed for monitoring the time it takes to perform a write operation, and based on the time it takes, a determination is made whether to retire a block that is a recipient of the write operation. The time duration of the write operation for a page or a combination of pages may indicate whether any block or blocks containing the page or combination of pages is experiencing a physical failure. That is, if the time duration of the write operation for a particular page exceeds time threshold, this may indicate that this page requires a larger number of program cycles than other pages. The longer programming cycle can be an indication of cell leakage or a failing block.

    Abstract translation: 公开了用于监视执行写入操作所花费的时间的系统和方法，并且基于所花费的时间，确定是否退出作为写入操作的接收者的块。 页面或页面组合的写入操作的持续时间可以指示包含页面或页面组合的任何块或块是否正在经历物理故障。 也就是说，如果特定页面的写入操作的持续时间超过时间阈值，则这可能表示该页面需要比其他页面更多的编程周期。 更长的编程周期可以表示单元泄漏或故障块。

    Systems and methods for determining the status of memory locations in a non-volatile memory
    13.
    发明授权
    Systems and methods for determining the status of memory locations in a non-volatile memory 有权
    用于确定非易失性存储器中存储器位置的状态的系统和方法

    公开(公告)号：US08732392B2

    公开(公告)日：2014-05-20

    申请号：US13632507

    申请日：2012-10-01

    Applicant: Apple Inc.

    Inventor： Matthew J. Byom ,  Kenneth Herman

    IPC: G06F12/00 ,  G06F12/02 ,  G06F11/08 ,  H03M13/09

    CPC classification number: G06F12/0246 ,  G06F11/08 ,  G06F2212/7207 ,  H03M13/095

    Abstract: Systems and methods are provided for storing data in a portion of a non-volatile memory (“NVM”) such that the status of the NVM portion can be determined with high probability on a subsequent read. An NVM interface, which may receive write commands to store user data in the NVM, can store a fixed predetermined sequence (“FPS”) with the user data. The FPS may ensure that a successful read operation on a NVM portion is not misinterpreted as a failed read operation or as an erased NVM portion. For example, if the NVM returns an all-zero vector when a read request fails, the FPS can include at least one “1” or one “0”, as appropriate, to differentiate between successful and unsuccessful read operations. In some embodiments, the FPS may also be used to differentiate between disturbed data, which passes an error correction check, and correct data.

    Abstract translation: 提供了用于将数据存储在非易失性存储器（“NVM”）的一部分中的系统和方法，使得可以在后续读取时以高概率确定NVM部分的状态。 可以接收写入命令以将用户数据存储在NVM中的NVM接口可以与用户数据一起存储固定的预定顺序（“FPS”）。 FPS可以确保在NVM部分上的成功读取操作不被误解为读取操作失败或被擦除的NVM部分。 例如，如果NVM在读请求失败时返回全零向量，则FPS可以适当地包括至少一个“1”或一个“0”，以区分成功和不成功的读取操作。 在一些实施例中，FPS还可用于区分经过错误校正检查的干扰数据和校正数据。

    DATA WHITENING FOR WRITING AND READING DATA TO AND FROM A NON-VOLATILE MEMORY
    14.
    发明申请
    DATA WHITENING FOR WRITING AND READING DATA TO AND FROM A NON-VOLATILE MEMORY 有权
    数据白名字写入和读取非易失性存储器中的数据

    公开(公告)号：US20140075208A1

    公开(公告)日：2014-03-13

    申请号：US14082940

    申请日：2013-11-18

    Applicant: Apple Inc.

    Inventor： Kenneth L. Herman ,  Matthew J. Byom ,  Michael J. Smith ,  Tahoma M. Toelkes

    IPC: G06F12/14

    CPC classification number: G06F12/1408 ,  G06F12/0246 ,  G06F21/72 ,  G06F21/79 ,  G06F2221/2107 ,  G11C16/10 ,  G11C16/22

    Abstract: Systems, apparatuses, and methods are provided for whitening and managing data for storage in non-volatile memories, such as Flash memory. In some embodiments, an electronic device such as media player is provided, which may include a system-on-a-chip (SoC) and a non-volatile memory. The SoC may include SoC control circuitry and a memory interface that acts as an interface between the SoC control circuitry and the non-volatile memory. The SoC can also include an encryption module, such as a block cipher based on the Advanced Encryption Standard (AES). The memory interface can direct the encryption module to whiten all types of data prior to storage in the non-volatile memory, including sensitive data, non-sensitive data, and memory management data. This can, for example, prevent or reduce program-disturb problems or other read/write/erase reliability issues.

    Abstract translation: 提供了用于白化和管理数据以存储在诸如闪存的非易失性存储器中的系统，装置和方法。 在一些实施例中，提供诸如媒体播放器的电子设备，其可以包括片上系统（SoC）和非易失性存储器。 SoC可以包括SoC控制电路和用作SoC控制电路和非易失性存储器之间的接口的存储器接口。 SoC还可以包括加密模块，例如基于高级加密标准（AES）的块密码。 存储器接口可以指示加密模块在存储在非易失性存储器之前对所有类型的数据进行白化，包括敏感数据，非敏感数据和存储器管理数据。 这可以例如防止或减少程序干扰问题或其他读/写/擦除可靠性问题。

    METHODS AND SYSTEMS FOR DYNAMICALLY CONTROLLING OPERATIONS IN A NON-VOLATILE MEMORY TO LIMIT POWER CONSUMPTION
    15.
    发明申请
    METHODS AND SYSTEMS FOR DYNAMICALLY CONTROLLING OPERATIONS IN A NON-VOLATILE MEMORY TO LIMIT POWER CONSUMPTION 审中-公开
    用于动态地控制非易失性存储器中的操作以限制功耗的方法和系统

    公开(公告)号：US20140068296A1

    公开(公告)日：2014-03-06

    申请号：US14076674

    申请日：2013-11-11

    Applicant: Apple Inc.

    Inventor： Matthew J. Byom ,  Vadim Khmelnitsky ,  Hugo B. Fiennes ,  Arjun Kapoor

    IPC: G06F1/32

    CPC classification number: G06F1/3225 ,  G06F1/3275 ,  G06F1/329 ,  G06F3/0625 ,  G06F3/0659 ,  G06F3/0679 ,  G06F9/5094 ,  G11C16/30 ,  Y02D10/14 ,  Y02D10/154 ,  Y02D10/22 ,  Y02D10/24

    Abstract: Systems and methods are disclosed for limiting power consumption of a non-volatile memory (NVM) using a power limiting scheme that distributes a number of concurrent NVM operations over time. This provides a “current consumption cap” that fixes an upper limit of current consumption for the NVM, thereby eliminating peak power events. In one embodiment, power consumption of a NVM can be limited by receiving data suitable for use as a factor in adjusting a current threshold from at least one of a plurality of system sources. The current threshold can be less than a peak current capable of being consumed by the NVM and can be adjusted based on the received data. A power limiting scheme can be used that limits the number of concurrent NVM operations performed so that a cumulative current consumption of the NVM does not exceed the adjusted current threshold.

    Abstract translation: 公开了用于使用分配多个并发NVM操作随时间推移的功率限制方案来限制非易失性存储器（NVM）的功率消耗的系统和方法。 这提供了一个“电流消耗上限”，用于确定NVM的电流消耗上限，从而消除峰值功率事件。 在一个实施例中，可以通过接收适合用作从多个系统源中的至少一个调整当前阈值的因素的数据来限制NVM的功耗。 当前阈值可以小于能够被NVM消耗的峰值电流，并且可以基于所接收的数据进行调整。 可以使用功率限制方案，其限制执行的并行NVM操作的数量，使得NVM的累积电流消耗不超过调整的电流阈值。

    DATA PARTITIONING SCHEME FOR NON-VOLATILE MEMORIES
    16.
    发明申请
    DATA PARTITIONING SCHEME FOR NON-VOLATILE MEMORIES 审中-公开
    非易失性存储器的数据分割方案

    公开(公告)号：US20130132653A1

    公开(公告)日：2013-05-23

    申请号：US13740620

    申请日：2013-01-14

    Applicant: APPLE INC.

    Inventor： Daniel J. Post ,  Matthew J. Byom ,  Vadim Khmelnitsky ,  Nir Jacob Wakrat ,  Kenneth Herman

    IPC: G06F12/02 ,  G06F3/06 ,  G06F11/10

    CPC classification number: G06F3/0643 ,  G06F3/061 ,  G06F3/0644 ,  G06F3/0652 ,  G06F3/0679 ,  G06F11/1068 ,  G06F12/0246 ,  G06F2212/7202 ,  G11C29/52

    Abstract: Systems and methods are disclosed for partitioning data for storage in a non-volatile memory (“NVM”), such as flash memory. In some embodiments, a priority may be assigned to data being stored, and the data may be logically partitioned based on the priority. For example, a file system may identify a logical address within a first predetermined range for higher priority data and within a second predetermined range for lower priority data, such using a union file system. Using the logical address, a NVM driver can determine the priority of data being stored and can process (e.g., encode) the data based on the priority. The NVM driver can store an identifier in the NVM along with the data, and the identifier can indicate the processing techniques used on the associated data.

    Abstract translation: 公开了用于分割用于存储在诸如闪存的非易失性存储器（“NVM”）中的数据的系统和方法。 在一些实施例中，可以将优先级分配给正在存储的数据，并且可以基于优先级逻辑地划分数据。 例如，文件系统可以识别用于较高优先级数据的第一预定范围内的逻辑地址，并且在较低优先权数据的第二预定范围内识别逻辑地址，诸如使用联合文件系统。 使用逻辑地址，NVM驱动器可以确定正在存储的数据的优先级，并且可以基于优先级处理（例如，编码）数据。 NVM驱动程序可以将数据与NVM一起存储在标识符中，并且标识符可以指示在相关数据上使用的处理技术。

    Techniques for reducing write amplification on solid state storage devices (SSDs)
    17.
    发明授权
    Techniques for reducing write amplification on solid state storage devices (SSDs) 有权

    公开(公告)号：US11132145B2

    公开(公告)日：2021-09-28

    申请号：US16124154

    申请日：2018-09-06

    Applicant: Apple Inc.

    Inventor： Yuhua Liu ,  Andrew W. Vogan ,  Matthew J. Byom ,  Alexander Paley

    IPC: G06F12/00 ,  G06F13/00 ,  G06F3/06

    Abstract: Disclosed herein are techniques for reducing write amplification when processing write commands directed to a non-volatile memory. According to some embodiments, the method can include the steps of (1) receiving a first plurality of write commands and a second plurality of write commands, where the first plurality of write commands and the second plurality of write commands are separated by a fence command (2) caching the first plurality of write commands, the second plurality of write commands, and the fence command, and (3) in accordance with the fence command, and in response to identifying that at least one condition is satisfied: (i) issuing the first plurality of write commands to the non-volatile memory, (ii) issuing the second plurality of write commands to the non-volatile memory, and (iii) updating log information to reflect that the first plurality of write commands precede the second plurality of write commands.

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