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公开(公告)号：US09274275B2
公开(公告)日：2016-03-01
申请号：US13935277
申请日：2013-07-03
Applicant: Cisco Technology, Inc.
Inventor： Mark Webster , Ravi Sekhar Tummidi
CPC classification number: G02B6/30 , G02B6/107 , G02B6/12 , G02B6/12002 , G02B6/122 , G02B6/1228 , G02B6/132 , G02B6/14 , G02B6/305 , G02B6/43 , G02B2006/12038 , G02B2006/12061 , G02B2006/121 , G02B2006/12147 , G02B2006/12152
Abstract: A SOI device may include a waveguide adapter that couples light between an external light source—e.g., a fiber optic cable or laser—and a silicon waveguide on the silicon surface layer of the SOI device. In one embodiment, the waveguide adapter is embedded into the insulator layer. Doing so may enable the waveguide adapter to be formed before the surface layer components are added onto the SOI device. Accordingly, fabrication techniques that use high-temperatures may be used without harming other components in the SOI device—e.g., the waveguide adapter is formed before heat-sensitive components are added to the silicon surface layer.
Abstract translation: SOI器件可以包括在外部光源（例如，光纤电缆或激光器）与SOI器件的硅表面层上的硅波导之间耦合光的波导适配器。 在一个实施例中，波导适配器被嵌入到绝缘体层中。 这样做可以使得在将表面层组分添加到SOI器件之前形成波导适配器。 因此，可以使用使用高温的制造技术，而不会损害SOI器件中的其它部件 - 例如，在将热敏部件添加到硅表面层之前形成波导适配器。
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公开(公告)号：US11886056B2
公开(公告)日：2024-01-30
申请号：US17456468
申请日：2021-11-24
Applicant: Cisco Technology, Inc.
Inventor： Donald Adams , Prakash B. Gothoskar , Vipulkumar Patel , Mark Webster
CPC classification number: G02F1/025 , G02B6/132 , G02B6/136 , G02F1/011 , G02F1/2257 , G02F1/0152
Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.
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公开(公告)号：US10598967B2
公开(公告)日：2020-03-24
申请号：US15615290
申请日：2017-06-06
Applicant: Cisco Technology, Inc.
Inventor： Donald Adams , Prakash B. Gothoskar , Vipulkumar Patel , Mark Webster
Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.
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公开(公告)号：US10509174B2
公开(公告)日：2019-12-17
申请号：US16052524
申请日：2018-08-01
Applicant: Cisco Technology, Inc.
Inventor： Mark Webster , Ravi Sekhar Tummidi
IPC: G02B6/35 , G02B6/12 , B81B5/00 , G02B6/30 , G02B6/122 , G02B6/14 , G02B6/132 , G02B6/10 , G02B6/43
Abstract: A SOI device may include a waveguide adapter that couples light between an external light source—e.g., a fiber optic cable or laser—and a silicon waveguide on the silicon surface layer of the SOI device. In one embodiment, the waveguide adapter is embedded into the insulator layer. Doing so may enable the waveguide adapter to be formed before the surface layer components are added onto the SOI device. Accordingly, fabrication techniques that use high-temperatures may be used without harming other components in the SOI device—e.g., the waveguide adapter is formed before heat-sensitive components are added to the silicon surface layer.
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公开(公告)号：US09864133B2
公开(公告)日：2018-01-09
申请号：US15208658
申请日：2016-07-13
Applicant: Cisco Technology ,Inc.
Inventor： Vipulkumar Patel , Mark Webster , Ravi Tummidi , Mary Nadeau
CPC classification number: G02B6/12004 , G02B6/12002 , G02B6/1228 , G02B6/124 , G02B6/125 , G02B6/305 , G02B6/34 , G02B6/4206 , G02B6/4274 , G02B6/4291
Abstract: The embodiments herein describe a photonic chip (formed from a SOI structure) which includes an optical interface for coupling the optical components in the photonic chip to an external optical device. In one embodiment, the optical interface is formed on a separate substrate which is later joined to the photonic chip. Through oxide vias (TOVs) and through silicon vias (TSVs) can be used to electrically couple the optical components in the photonic chip to external integrated circuits or amplifiers. In one embodiment, after the separate wafer is bonded to the photonic chip, a TOV is formed in the photonic chip to electrically connect metal routing layers coupled to the optical components in the photonic chip to a TSV in the separate wafer. For example, the TOV may extend across a wafer bonding interface where the two substrates where bonded to form an electrical connection with the TSV.
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Patent Agency Ranking
公开(公告)号：US09766484B2
公开(公告)日：2017-09-19
申请号：US14248081
申请日：2014-04-08
Applicant: CISCO TECHNOLOGY, INC.
Inventor： Donald Adams , Prakash Gothoskar , Vipulkumar Patel , Mark Webster
CPC classification number: G02F1/025 , G02B6/132 , G02B6/136 , G02F1/011 , G02F1/2257 , G02F2001/0152
Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.
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17.发明授权公开(公告)号：US09209509B2
公开(公告)日：2015-12-08
申请号：US14218634
申请日：2014-03-18
Applicant: Cisco Technology, Inc.
Inventor： Kalpendu Shastri , Bipin Dama , Mark Webster , David Piede
CPC classification number: H01P3/00 , G02F1/011 , G02F1/0121 , G02F1/0327 , G02F1/225 , G02F1/2255 , G02F2201/124 , G02F2201/126 , H05K1/0245 , H05K2201/09245 , H05K2201/09254 , H05K2201/10121
Abstract: A configuration for routing electrical signals between a conventional electronic integrated circuit (IC) and an opto-electronic subassembly is formed as an array of signal paths carrying oppositely-signed signals on adjacent paths to lower the inductance associated with the connection between the IC and the opto-electronic subassembly. The array of signal paths can take the form of an array of wirebonds between the IC and the subassembly, an array of conductive traces formed on the opto-electronic subassembly, or both.
Abstract translation: 在常规电子集成电路（IC）和光电子组件之间布置电信号的配置被形成为在相邻路径上承载相反信号的信号路径阵列，以降低与IC和IC之间的连接相关联的电感 光电子组件。 信号路径阵列可以采取在IC和子组件之间的引线阵列的形式，形成在光电子组件上的导电迹线阵列，或两者。
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公开(公告)号：US11226505B2
公开(公告)日：2022-01-18
申请号：US16789317
申请日：2020-02-12
Applicant: Cisco Technology, Inc.
Inventor： Donald Adams , Prakash B. Gothoskar , Vipulkumar Patel , Mark Webster
Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.
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19.发明授权公开(公告)号：US10175448B2
公开(公告)日：2019-01-08
申请号：US14331315
申请日：2014-07-15
Applicant: Cisco Technology, Inc.
Inventor： Mary Nadeau , Vipulkumar Patel , Prakash Gothoskar , John Fangman , John Matthew Fangman , Mark Webster
Abstract: An arrangement for improving adhesive attachment of micro-components in an assembly utilizes a plurality of parallel-disposed slots formed in the top surface of the substrate used to support the micro-components. The slots are used to control the flow and “shape” of an adhesive “dot” so as to quickly and accurately attach a micro-component to the surface of a substrate. The slots are formed (preferably, etched) in the surface of the substrate in a manner that lends itself to reproducible accuracy from one substrate to another. Other slots (“channels”) may be formed in conjunction with the bonding slots so that extraneous adhesive material will flow into these channels and not spread into unwanted areas.
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公开(公告)号：US10054745B2
公开(公告)日：2018-08-21
申请号：US15461789
申请日：2017-03-17
Applicant: Cisco Technology, Inc.
Inventor： Mark Webster , Ravi Sekhar Tummidi
CPC classification number: G02B6/30 , G02B6/107 , G02B6/12 , G02B6/12002 , G02B6/122 , G02B6/1228 , G02B6/132 , G02B6/14 , G02B6/305 , G02B6/43 , G02B2006/12038 , G02B2006/12061 , G02B2006/121 , G02B2006/12147 , G02B2006/12152
Abstract: A SOI device may include a waveguide adapter that couples light between an external light source—e.g., a fiber optic cable or laser—and a silicon waveguide on the silicon surface layer of the SOI device. In one embodiment, the waveguide adapter is embedded into the insulator layer. Doing so may enable the waveguide adapter to be formed before the surface layer components are added onto the SOI device. Accordingly, fabrication techniques that use high-temperatures may be used without harming other components in the SOI device—e.g., the waveguide adapter is formed before heat-sensitive components are added to the silicon surface layer.
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