公开(公告)号：US20190013460A1

公开(公告)日：2019-01-10

申请号：US16029938

申请日：2018-07-09

Applicant: EVERSPIN TECHNOLOGIES, INC.

Inventor： Sumio IKEGAWA

IPC: H01L43/02 ,  G11C11/16 ,  H01L43/10 ,  H01L43/12 ,  H01F41/32 ,  H01F10/32

Abstract: A magnetoresistive device comprises a fixed magnetic region positioned on or over a first electrically conductive region, an intermediate layer positioned on or over the fixed magnetic region, a free magnetic region positioned on or over the intermediate layer, and a metal insertion substance positioned in contact with the free magnetic region, wherein the metal insertion substance includes one or more transition metal elements.

公开(公告)号：US20240315145A1

公开(公告)日：2024-09-19

申请号：US18674289

申请日：2024-05-24

Applicant: Everspin Technologies, Inc.

Inventor： Sumio IKEGAWA

IPC: H10N50/80 ,  G11C11/16 ,  H01F10/32 ,  H01F41/32 ,  H10N50/01 ,  H10N50/10 ,  H10N50/85

CPC classification number: H10N50/80 ,  G11C11/161 ,  H01F10/3254 ,  H01F10/3272 ,  H01F10/3286 ,  H01F10/329 ,  H01F41/32 ,  H10N50/01 ,  H10N50/10 ,  H10N50/85

Abstract: A magnetoresistive device comprises a fixed magnetic region positioned on or over a first electrically conductive region, an intermediate layer positioned on or over the fixed magnetic region, a free magnetic region positioned on or over the intermediate layer, and a metal insertion substance positioned in contact with the free magnetic region, wherein the metal insertion substance includes one or more transition metal elements.

公开(公告)号：US20240006011A1

公开(公告)日：2024-01-04

申请号：US18467996

申请日：2023-09-15

Applicant: Everspin Technologies, Inc.

Inventor： Syed M. ALAM ,  Jason JANESKY ,  Han Kyu LEE ,  Hamid ALMASI ,  Pedro SANCHEZ ,  Cristian P. MASGRAS ,  Iftekhar RAHMAN ,  Sumio IKEGAWA ,  Sanjeev AGGARWAL ,  Dimitri HOUSSAMEDDINE ,  Frederick Charles NEUMEYER

IPC: G11C29/42 ,  G11C29/12 ,  G11C29/18 ,  G11C29/44

CPC classification number: G11C29/42 ,  G11C29/1201 ,  G11C2029/0407 ,  G11C29/4401 ,  G11C29/18

Abstract: The present disclosure is drawn to, among other things, a method of managing a memory device. In some aspects, the method includes determining whether a first address for a page in a first memory region is mapped in a map table, setting a target address as a second address identified in the map table as being mapped to the first address, setting the target address as the first address, determining a number of bits that fail in each word of a plurality of first-layer error correction code (ECC) words for the target address, and adding the target address to the map table, writing-back contents from the target address to a repair address in the first memory region, and updating the map table by mapping the target address to the repair address.

公开(公告)号：US20220139488A1

公开(公告)日：2022-05-05

申请号：US17512392

申请日：2021-10-27

Applicant: Everspin Technologies, Inc.

Inventor： Syed M. ALAM ,  Jason JANESKY ,  Han Kyu LEE ,  Hamid ALMASI ,  Pedro SANCHEZ ,  Cristian P. MASGRAS ,  Iftekhar RAHMAN ,  Sumio IKEGAWA ,  Sanjeev AGGARWAL ,  Dimitri HOUSSAMEDDINE ,  Frederick Charles NEUMEYER

IPC: G11C29/42 ,  G11C29/44 ,  G11C29/12 ,  G11C29/18

Abstract: The present disclosure is drawn to, among other things, a method of managing a memory device. In some aspects, the method includes determining whether a first address for a page in a first memory region is mapped in a map table, setting a target address as a second address identified in the map table as being mapped to the first address, setting the target address as the first address, determining a number of bits that fail in each word of a plurality of first-layer error correction code (ECC) words for the target address, and adding the target address to the map table, writing-back contents from the target address to a repair address in the first memory region, and updating the map table by mapping the target address to the repair address.

公开(公告)号：US20210249589A1

公开(公告)日：2021-08-12

申请号：US16783740

申请日：2020-02-06

Applicant: Everspin Technologies, Inc.

Inventor： Sumio IKEGAWA ,  Hamid ALMASI ,  SHIMON ,  Kerry NAGEL ,  Han Kyu LEE

IPC: H01L43/08 ,  H01L43/10 ,  H01L43/02

Abstract: A magnetoresistive device may include one or more electrodes or electrically conductive lines and a fixed region and a free region disposed between the electrodes or electrically conductive lines. The fixed region may have a fixed magnetic state and the free region may be configured to have a first magnetic state and a second magnetic state. The free region may store a first value when in the first magnetic state and store a second value when in the second magnetic state. The magnetoresistive device may further include a dielectric layer between the free region and the fixed region and a spin-Hall (SH) material proximate to at least a portion of the free region. An insertion layer may be disposed between the SH material and the free region.

公开(公告)号：US20190189176A1

公开(公告)日：2019-06-20

申请号：US16286793

申请日：2019-02-27

Applicant: Everspin Technologies, Inc.

Inventor： Han-Jong CHIA ,  Sumio IKEGAWA ,  Michael TRAN ,  Jon SLAUGHTER

IPC: G11C11/16 ,  H01F10/32 ,  H01L43/12 ,  H01L43/02 ,  H01L43/10 ,  G11C11/56 ,  H01L43/08

Abstract: A magnetoresistive memory device that stores data in the synthetic antiferromagnet (SAF) included in each spin-torque memory cell provides for more robust data storage. In normal operation, the memory cells use the free portion of the memory cell for data storage. Techniques for storing data in the reference portions of memory cells are presented, where an unbalanced SAF that includes ferromagnetic layers having different magnetic moments is used to lower the switching barrier for the SAF and allow for writing data values to the SAF using lower currents and magnetic fields than would be required for a balanced SAF.