公开(公告)号：US11211459B2

公开(公告)日：2021-12-28

申请号：US16715439

申请日：2019-12-16

Applicant: Infineon Technologies AG

Inventor： Andre Brockmeier ,  Guenter Denifl ,  Ronny Kern ,  Michael Knabl ,  Matteo Piccin ,  Francisco Javier Santos Rodriguez

IPC: H01L21/02 ,  H01L21/56 ,  H01L21/78 ,  H01L29/16 ,  H01L23/544 ,  H01L23/31

Abstract: An auxiliary carrier and a silicon carbide substrate are provided. The silicon carbide substrate includes an idle layer and a device layer between a main surface at a front side of the silicon carbide substrate and the idle layer. The device layer includes a plurality of laterally separated device regions. Each device region extends from the main surface to the idle layer. The auxiliary carrier is structurally connected with the silicon carbide substrate at the front side. The idle layer is removed. A mold structure is formed that fills a grid-shaped groove that laterally separates the device regions. The device regions are separated, and parts of the mold structure form frame structures laterally surrounding the device regions.

公开(公告)号：US20210351077A1

公开(公告)日：2021-11-11

申请号：US17382399

申请日：2021-07-22

Applicant: Infineon Technologies AG

Inventor： Francisco Javier Santos Rodriguez ,  Günter Denifl ,  Tobias Hoechbauer ,  Martin Huber ,  Wolfgang Lehnert ,  Roland Rupp ,  Hans-Joachim Schulze

IPC: H01L21/78 ,  H01L21/02

Abstract: A method for processing a wide band gap semiconductor wafer includes: depositing a support layer including semiconductor material at a back side of a wide band gap semiconductor wafer, the wide band gap semiconductor wafer having a band gap larger than the band gap of silicon; depositing an epitaxial layer at a front side of the wide band gap semiconductor wafer; and splitting the wide band gap semiconductor wafer along a splitting region to obtain a device wafer comprising at least a part of the epitaxial layer, and a remaining wafer comprising the support layer.

公开(公告)号：US10967450B2

公开(公告)日：2021-04-06

申请号：US15971830

申请日：2018-05-04

Applicant: Infineon Technologies AG

Inventor： Nirdesh Ojha ,  Francisco Javier Santos Rodriguez ,  Roland Rupp ,  Markus Heinrici ,  Karin Delalut ,  Claudia Friza

IPC: B23H7/06 ,  B23H7/10 ,  B23H7/14 ,  B23H7/30 ,  B23H7/34 ,  B23H1/02

Abstract: A method of yielding a thinner product wafer from a thicker base SiC wafer cut from a SiC ingot includes: supporting the base SiC wafer with a support substrate: and while the base SiC wafer is supported by the support substrate, cutting through the base SiC wafer in a direction parallel to a first main surface of the base SiC wafer using a wire as part of a wire electrical discharge machining (WEDM) process, to separate the product wafer from the base SiC wafer, the product wafer being attached to the support substrate when cut from the base SiC wafer.

公开(公告)号：US20190296125A1

公开(公告)日：2019-09-26

申请号：US16360652

申请日：2019-03-21

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Roland Rupp ,  Francisco Javier Santos Rodriguez

IPC: H01L29/66 ,  H01L21/02 ,  H01L21/683 ,  H01L21/04 ,  H01L21/78 ,  H01L29/10 ,  H01L29/08 ,  H01L29/16 ,  H01L29/78 ,  H01L29/739

Abstract: A method includes providing a first layer of epitaxial silicon carbide supported by a silicon carbide substrate, providing a second layer of epitaxial silicon carbide on the first layer, forming a plurality of semiconductor devices in the second layer, and separating the substrate from the second layer at the first layer. The first layer includes a plurality of voids.

公开(公告)号：US20190157435A1

公开(公告)日：2019-05-23

申请号：US16257300

申请日：2019-01-25

Applicant: Infineon Technologies AG

Inventor： Elmar Falck ,  Andreas Haertl ,  Manfred Pfaffenlehner ,  Francisco Javier Santos Rodriguez ,  Daniel Schloegl ,  Hans-Joachim Schulze ,  Andre Stegner ,  Johannes Georg Laven

IPC: H01L29/739 ,  H01L21/263 ,  H01L29/66 ,  H01L21/265 ,  H01L21/324 ,  H01L29/861 ,  H01L29/36 ,  H01L29/06

Abstract: A method of manufacturing a semiconductor device includes forming a profile of net doping in a drift zone of a semiconductor body by multiple irradiations with protons and generating hydrogen-related donors by annealing the semiconductor body. At least 50% of a vertical extension of the drift zone between first and second sides of the semiconductor body is undulated and includes multiple doping peak values between 1×1013 cm−3 and 5×1014 cm−3.

公开(公告)号：US10256097B2

公开(公告)日：2019-04-09

申请号：US15846591

申请日：2017-12-19

Applicant: Infineon Technologies AG

Inventor： Ravi Keshav Joshi ,  Romain Esteve ,  Roland Rupp ,  Francisco Javier Santos Rodriguez ,  Gerald Unegg

IPC: H01L21/04 ,  H01L29/06 ,  H01L29/10 ,  H01L29/45 ,  H01L29/66 ,  H01L29/732 ,  H01L29/808 ,  H01L29/861 ,  H01L29/417 ,  H01L29/423 ,  H01L29/08 ,  H01L29/78 ,  H01L29/16 ,  H01L29/739

Abstract: A semiconductor device includes a silicon carbide semiconductor body and a metal contact structure. Interface particles including a silicide kernel and a carbon cover on a surface of the silicide kernel are formed directly between the silicon carbide semiconductor body and the metal contact structure. Between neighboring ones of the interface particles, the metal contact structure directly adjoins the silicon carbide semiconductor body.

公开(公告)号：US10211325B2

公开(公告)日：2019-02-19

申请号：US14165658

申请日：2014-01-28

Applicant: Infineon Technologies AG

Inventor： Elmar Falck ,  Andreas Haertl ,  Manfred Pfaffenlehner ,  Francisco Javier Santos Rodriguez ,  Daniel Schloegl ,  Hans-Joachim Schulze ,  Andre Stegner ,  Johannes Georg Laven

IPC: H01L27/06 ,  H01L29/739 ,  H01L21/265 ,  H01L21/324 ,  H01L29/06 ,  H01L29/66 ,  H01L29/861 ,  H01L21/263 ,  H01L29/36 ,  H01L29/10 ,  H01L29/08

Abstract: A semiconductor device includes a semiconductor body having opposite first and second sides. The semiconductor device further includes a drift zone in the semiconductor body between the second side and a pn junction. A profile of net doping of the drift zone along at least 50% of a vertical extension of the drift zone between the first and second sides is undulated and includes doping peak values between 1×1013 cm−3 and 5×1014 cm−3. A device blocking voltage Vbr is defined by a breakdown voltage of the pn junction between the drift zone and a semiconductor region of opposite conductivity type that is electrically coupled to the first side of the semiconductor body.

公开(公告)号：US20180330981A1

公开(公告)日：2018-11-15

申请号：US16032862

申请日：2018-07-11

Applicant: Infineon Technologies AG

Inventor： Roland Rupp ,  Hans-Joachim Schulze ,  Francisco Javier Santos Rodriguez ,  Iris Moder ,  Ingo Muri

IPC: H01L21/762 ,  H01L21/265 ,  H01L21/306

CPC classification number: H01L21/76243 ,  H01L21/02005 ,  H01L21/26533 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/30608 ,  H01L21/30625 ,  H01L21/324 ,  H01L21/7806

Abstract: According to various embodiments, a method includes: providing a substrate having a first side and a second side opposite the first side; forming a buried layer in and/or over the substrate by implanting a chemical element having a greater electronegativity than the substrate into the first side of the substrate by ion implantation; and thinning the substrate from the second side of the substrate, wherein the buried layer comprises a solid state compound having a greater resistance to the thinning than the substrate and wherein the thinning stops at the buried layer.

公开(公告)号：US20180265354A1

公开(公告)日：2018-09-20

申请号：US15981393

申请日：2018-05-16

Applicant: Infineon Technologies AG

Inventor： Alexander Breymesser ,  Andre Brockmeier ,  Carsten von Koblinski ,  Francisco Javier Santos Rodriguez

IPC: B81C99/00 ,  H01L21/56 ,  C03B11/08 ,  C03B40/02 ,  H01L23/31 ,  H01L23/29 ,  G02B6/12

CPC classification number: B81C99/008 ,  B81C2201/034 ,  C03B11/082 ,  C03B40/02 ,  C03B2215/07 ,  C03B2215/79 ,  G02B2006/12038 ,  H01L21/56 ,  H01L23/291 ,  H01L23/3178 ,  H01L2924/0002 ,  Y10T428/24479 ,  H01L2924/00

Abstract: A semiconductor element is formed in a mesa portion of a semiconductor substrate. A cavity is formed in a working surface of the semiconductor substrate. The semiconductor substrate is brought in contact with a glass piece made of a glass material and having a protrusion. The glass piece and the semiconductor substrate are arranged such that the protrusion extends into the cavity. The glass piece is bonded to the semiconductor substrate. The glass piece is in-situ bonded to the semiconductor substrate by pressing the glass piece against the semiconductor substrate. During the pressing a temperature of the glass piece exceeds a glass transition temperature and the temperature and a force exerted on the glass piece are controlled to fluidify the glass material and after re-solidifying the protrusion completely fills the cavity.

公开(公告)号：US20180019127A1

公开(公告)日：2018-01-18

申请号：US15648546

申请日：2017-07-13

Applicant: Infineon Technologies AG

Inventor： Francisco Javier Santos Rodriguez

IPC: H01L21/20 ,  H01L21/311 ,  H01L21/3065 ,  H01L21/304 ,  H01L21/02 ,  H01L21/67 ,  C25D5/08

Abstract: In various embodiments, a method for processing a wafer is provided. The method includes forming a layer stack, including a support layer and a useful layer and a sacrificial region between them, said sacrificial region having, vis-à-vis a processing fluid, a lower mechanical and/or chemical resistance than the support layer and than the useful layer. The support layer has a depression, which exposes the sacrificial region. The method further includes forming at least one channel in the exposed sacrificial region by means of the processing fluid. The channel connects the depression to an exterior of the layer stack.