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公开(公告)号:US20220302377A1
公开(公告)日:2022-09-22
申请号:US17207798
申请日:2021-03-22
Applicant: International Business Machines Corporation
Inventor: JUNTAO LI , Kangguo Cheng , Carl Radens , Ruilong Xie
Abstract: A semiconductor structure for a vertical phase change memory cell that includes a bottom electrode on a portion of a semiconductor substrate and a pair of vertical phase change bridge elements that are each on a portion of the bottom electrode. The semiconductor structure for the vertical phase change memory cell includes a dielectric material separating the pair of vertical phase change bridge elements and a top electrode over the pair of vertical phase change bridge elements.
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公开(公告)号:US20200091245A1
公开(公告)日:2020-03-19
申请号:US16691724
申请日:2019-11-22
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: JUNTAO LI , Kangguo Cheng , TAKASHI ANDO , DEXIN KONG
Abstract: Embodiments of the invention provide a semiconductor memory device. In some embodiments, the device includes a bottom electrode extending in a y-direction relative to top surface of a substrate and a top electrode extending in an x-direction relative to the top surface of the substrate. An active area is located at the cross-section between the bottom electrode and the top electrode and is located on vertical side walls extending in a z-direction of the semiconductor memory device with respect to the top surface of the substrate. An insulating layer is located in the active area in between the top electrode and the bottom electrode.
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公开(公告)号:US20200066882A1
公开(公告)日:2020-02-27
申请号:US16666590
申请日:2019-10-29
Applicant: International Business Machines Corporation
Inventor: ZHENXING BI , Kangguo Cheng , JUNTAO LI , PENG XU
IPC: H01L29/66 , H01L23/522 , H01L21/768 , H01L27/112 , H01L27/11582 , H01L21/311 , H01L29/417 , H01L29/78 , H01L29/08
Abstract: A method of forming a semiconductor device and resulting structures having closely packed vertical transistors with reduced contact resistance by forming a semiconductor structure on a doped region of a substrate, the semiconductor structure including a gate formed over a channel region of a semiconductor fin. A liner is formed on the gate and the semiconductor fin, and a dielectric layer is formed on the liner. Portions of the liner are removed to expose a top surface and sidewalls of the semiconductor fin and a sidewall of the dielectric layer. A recessed opening is formed by recessing portions of the liner from the exposed sidewall of the dielectric layer. A top epitaxy region is formed on the exposed portions of the semiconductor fin and dielectric layer such that an extension of the top epitaxy region fills the recessed opening. The top epitaxy region is confined between portions of the liner.
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公开(公告)号:US20230301207A1
公开(公告)日:2023-09-21
申请号:US17655081
申请日:2022-03-16
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: CHING-TZU CHEN , JUNTAO LI , KANGGUO CHENG , CARL RADENS
IPC: H01L45/00
CPC classification number: H01L45/06 , H01L45/1226 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/1675
Abstract: A phase change memory (PCM) semiconductor device is provided. The PCM semiconductor device includes: a phase change material stack on a substrate, the phase change material stack including at least two phase change material layers each separated by an insulating layer; a first electrode on a first side of the phase change material stack; and a second electrode on a second side of the phase change material stack, wherein a first one of the phase change material layers has a length that is different from a length of a second one of the phase change material layers.
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公开(公告)号:US20230189672A1
公开(公告)日:2023-06-15
申请号:US17643416
申请日:2021-12-09
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: JUNTAO LI , KANGGUO CHENG , DEXIN KONG , RUILONG XIE
IPC: H01L45/00
CPC classification number: H01L45/126 , H01L45/143 , H01L45/1233 , H01L45/144 , H01L45/06 , H01L45/142 , H01L45/16
Abstract: A phase change memory (PCM) device is provided. The PCM device includes a bottom electrode formed on a substrate, a heater electrode formed on the bottom electrode, the heater electrode having a tapered portion that becomes narrower in a direction away from the substrate. The PCM device also includes an interlayer dielectric (ILD) layer formed on the tapered portion of the heater electrode, the interlayer layer dielectric including an airgap that at least partially surrounds the tapered portion of the heater electrode. The PCM device also includes a phase change layer formed on the heater electrode, and a top electrode formed on the phase change layer.
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16.
公开(公告)号:US20230099156A1
公开(公告)日:2023-03-30
申请号:US17481353
申请日:2021-09-22
Applicant: International Business Machines Corporation
Inventor: Kangguo Cheng , SHOGO MOCHIZUKI , JUNTAO LI
Abstract: An approach provides a semiconductor structure with a first crystalline surface orientation and a first nanosheet stack on the semiconductor substrate with the first crystalline surface orientation. The semiconductor substrate structure includes a second nanosheet stack with a second crystalline surface orientation above the first nanosheet stack, wherein the first nanosheet stack and the second nanosheet stack are separated by a dielectric material.
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公开(公告)号:US20220416161A1
公开(公告)日:2022-12-29
申请号:US17358223
申请日:2021-06-25
Applicant: International Business Machines Corporation
Inventor: Kangguo Cheng , Carl Radens , JUNTAO LI , Ruilong Xie , Praneet Adusumilli , Oscar van der Straten , Alexander Reznicek
IPC: H01L45/00
Abstract: A ring-shaped heater, system, and method to gradually change the conductance of the phase change memory through a concentric ring-shaped heater. The system may include a phase change memory. The phase change memory may include a bottom electrode. The phase change memory may also include a ring-shaped heater patterned on top of the bottom electrode, the ring-shaped heater including: a plurality of concentric conductive heating layers, and a plurality of insulator spacers, where each insulator spacer separates each conductive heating layer. The phase change memory may also include a phase change material proximately connected to the ring-shaped heater. The phase change memory may also include a top electrode proximately connected to the phase change material.
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18.
公开(公告)号:US20220399493A1
公开(公告)日:2022-12-15
申请号:US17303836
申请日:2021-06-09
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Kangguo Cheng , Ruilong Xie , Carl Radens , JUNTAO LI
IPC: H01L45/00
Abstract: A phase change memory (PCM) cell comprising a substrate a first electrode located on the substrate. A phase change material layer located adjacent to the first electrode, wherein a first side of the phase change material layer is in direct contact with the first electrode. A second electrode located adjacent to phase change material layer, wherein the second electrode is in direct contact with a second side of the phase change material layer, wherein the first side and the second side are different sides of the phase change material layer. An airgap is located directly above the phase change material layer, wherein the airgap provides space for the phase change material to expand or restrict.
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19.
公开(公告)号:US20200144378A1
公开(公告)日:2020-05-07
申请号:US16178725
申请日:2018-11-02
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: CHOONGHYUN LEE , KANGGUO CHENG , JUNTAO LI , SHOGO MOCHIZUKI
IPC: H01L29/36 , H01L27/088 , H01L29/10 , H01L21/8234
Abstract: A technique relates to a semiconductor device. Fins are formed of varying concentrations of germanium. Gate material is formed on the fins. Source or drain (S/D) regions are adjacent to the fins, and transistor devices include the fins.
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公开(公告)号:US20170365713A1
公开(公告)日:2017-12-21
申请号:US15422724
申请日:2017-02-02
Applicant: International Business Machines Corporation
Inventor: KANGGUO CHENG , JUNTAO LI , GENG WANG , QINTAO ZHANG
IPC: H01L29/78 , H01L29/10 , H01L29/08 , H01L27/088 , H01L21/8234 , H01L21/324 , H01L21/311 , H01L21/265 , H01L21/223 , H01L29/66 , H01L21/02
CPC classification number: H01L29/7827 , H01L21/0228 , H01L21/2236 , H01L21/26513 , H01L21/31116 , H01L21/324 , H01L21/823412 , H01L21/823418 , H01L21/823487 , H01L27/088 , H01L27/0886 , H01L29/0847 , H01L29/1037 , H01L29/6653 , H01L29/66553 , H01L29/66666
Abstract: A method of forming a spacer for a vertical transistor is provided. The method includes forming a fin structure that includes a fin on a semiconductor substrate, forming a source junction or a drain junction at an upper surface of the semiconductor substrate and at a base of the fin and epitaxially growing a rare earth oxide (REO) spacer to have a substantially uniform thickness along respective upper surfaces of the source or drain junction and on opposite sides of the fin structure.
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