公开(公告)号：US11557522B2

公开(公告)日：2023-01-17

申请号：US17366870

申请日：2021-07-02

Applicant: Infineon Technologies AG

Inventor： Alexander Roth ,  Olaf Hohlfeld

IPC: H01L23/24 ,  H01L23/053 ,  H01L21/56 ,  H01L23/29 ,  H01L21/54 ,  H01L23/00

Abstract: A method is disclosed for producing a power semiconductor module that includes a substrate, at least one semiconductor body, a connecting element and a contact element. The method includes: arranging the substrate in a housing having walls; at least partly filling a capacity formed by the walls of the housing and the substrate with an encapsulation material; hardening the encapsulation material to form a hard encapsulation; and closing the housing, wherein the contact element extends from the connecting element through an interior of the housing and through an opening in a cover of the housing to an outside of the housing in a direction perpendicular to a first surface of a first metallization layer of the substrate.

公开(公告)号：US11557490B2

公开(公告)日：2023-01-17

申请号：US17008763

申请日：2020-09-01

Applicant: Infineon Technologies AG

Inventor： Alexander Roth

IPC: H01L21/48 ,  C04B35/645 ,  C04B37/02 ,  H05K3/40 ,  C04B41/00 ,  C04B41/51 ,  C04B41/88 ,  H01L23/15 ,  H01L23/373 ,  H01L23/498 ,  H05K1/03 ,  H05K3/02

Abstract: A method for producing a metal-ceramic substrate with electrically conductive vias includes: attaching a first metal layer in a planar manner to a first surface side of a ceramic layer; after attaching the first metal layer, introducing a copper hydroxide or copper acetate brine into holes in the ceramic layer delimiting a via, to form an assembly; converting the copper hydroxide or copper acetate brine into copper oxide; subjecting the assembly to a high-temperature step above 500° C. in which the copper oxide forms a copper body in the holes; and after converting the copper hydroxide or copper acetate brine into the copper oxide, attaching a second metal layer in a planar manner to a second surface side of the ceramic layer opposite the first surface side. The copper body produces an electrically conductive connection between the first and the second metal layers.

公开(公告)号：US10796929B2

公开(公告)日：2020-10-06

申请号：US15688307

申请日：2017-08-28

Applicant: Infineon Technologies AG

Inventor： Alexander Roth

IPC: H01L21/48 ,  C04B35/645 ,  C04B37/02 ,  H05K3/40 ,  C04B41/00 ,  C04B41/51 ,  C04B41/88 ,  H01L23/15 ,  H01L23/373 ,  H01L23/498 ,  H05K1/03 ,  H05K3/02

Abstract: A method for producing a metal-ceramic substrate with at least one electrically conductive via, in which one metal layer, respectively, is attached in a planar manner to a ceramic plate or a ceramic layer to each of two opposing surface sides of the ceramic layer is provided. The method includes introducing a metal-containing, powdery and/or liquid substance into a hole in the ceramic layer delimiting the via prior to the attachment of both metal layers, or subsequent to the attachment of one of the two metal layers to form an assembly. Prior to the attachment of the other one of the two metal layers, and the assembly is subjected to a high-temperature step above 500° C. in which the metal-containing substance wets the ceramic layer at least partially with a wetting angle of less than 90°.

公开(公告)号：US10679978B2

公开(公告)日：2020-06-09

申请号：US15952282

申请日：2018-04-13

Applicant: Infineon Technologies AG

Inventor： Alexander Roth ,  Juergen Hoegerl ,  Hans-Joachim Schulze ,  Hans-Joerg Timme

IPC: H01L25/00 ,  H01L23/14 ,  H01L23/373 ,  H01L21/48 ,  H01L25/18 ,  H01L23/495 ,  H01L21/56 ,  H01L25/16 ,  H01L23/498 ,  H01L23/31

Abstract: A module is disclosed. In one example, the module includes a carrier, an at least partially thermally conductive and electrically insulating body mounted on only a part of a main surface of the carrier, an at least partially electrically conductive redistribution structure on the thermally conductive and electrically insulating body, an electronic chip mounted on the redistribution structure and above the thermally conductive and electrically insulating body, and an encapsulant encapsulating at least part of the carrier, at least part of the thermally conductive and electrically insulating body, at least part of the redistribution structure, and at least part of the electronic chip.

公开(公告)号：US20240266311A1

公开(公告)日：2024-08-08

申请号：US18422673

申请日：2024-01-25

Applicant: Infineon Technologies AG

Inventor： Alexander Roth ,  Andreas Waterloo

IPC: H01L23/00 ,  C22B5/02

CPC classification number: H01L24/32 ,  C22B5/02 ,  H01L24/27 ,  H01L2224/27334 ,  H01L2224/32225 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/13091

Abstract: A solderable electronic device includes: a base including one or more of a semiconductor die and a power electronic substrate; a first layer arranged over the base, the first layer including a solid reducing agent; and a solder preform arranged over the first layer. The solid reducing agent is configured to reduce a solder material of the solder preform during a soldering process.

公开(公告)号：US10586756B2

公开(公告)日：2020-03-10

申请号：US15723431

申请日：2017-10-03

Applicant: Infineon Technologies AG

Inventor： Alexander Roth ,  Andreas Grassmann ,  Juergen Hoegerl ,  Angela Kessler

IPC: H01L23/495 ,  H01L23/29 ,  H01L23/00 ,  H05K7/10 ,  H01L23/31 ,  H01L23/433 ,  H01L21/56 ,  H01L23/373

Abstract: A chip carrier for carrying an electronic chip, wherein the chip carrier comprises a mounting section configured for mounting an electronic chip by sintering, and an encapsulation section configured for being encapsulated by an encapsulant.

公开(公告)号：US20180148623A1

公开(公告)日：2018-05-31

申请号：US15824158

申请日：2017-11-28

Applicant: Infineon Technologies AG

Inventor： Alexander Roth

IPC: C09K5/14 ,  C08K3/38 ,  C08J5/24 ,  B29C71/02

CPC classification number: C09K5/14 ,  C04B41/009 ,  C04B41/4853 ,  C04B41/4961 ,  C04B41/83 ,  C04B41/84 ,  C04B2111/00844 ,  C08J5/24 ,  C08J7/08 ,  C08J2363/00 ,  C08J2383/04 ,  C08K3/38 ,  C08K2003/385 ,  C08K2201/001 ,  H01L23/3737 ,  C04B35/583 ,  C04B38/06

Abstract: A resin-impregnated boron nitride body includes a polymer-derived boron nitride and a resin. A process for manufacturing such a resin-impregnated boron nitride body includes: polymerizing a boron nitride molecular precursor into a preceramic polymer shaping the preceramic polymer to form an infusible polymer body; submitting the polymer body to a thermal treatment to obtain a boron nitride body; impregnating the boron nitride body with a resin; and curing the resin.

公开(公告)号：US12023762B2

公开(公告)日：2024-07-02

申请号：US18088238

申请日：2022-12-23

Applicant: Infineon Technologies AG

Inventor： Alexander Heinrich ,  Alexander Roth ,  Catharina Wille

IPC: B23K35/02 ,  B22F1/052 ,  B23K35/30 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/495 ,  B23K101/40

CPC classification number: B23K35/0244 ,  B22F1/052 ,  B23K35/0227 ,  B23K35/3033 ,  H01L21/56 ,  H01L23/3121 ,  H01L23/49582 ,  H01L24/27 ,  H01L24/29 ,  B22F2301/15 ,  B22F2304/10 ,  B23K2101/40 ,  H01L2224/2746 ,  H01L2224/29111 ,  H01L2224/29118 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29169

Abstract: A layer structure includes a first layer including at least one material selected from a first group consisting of nickel, copper, gold, silver, palladium, tin, zinc, platinum, and an alloy of any of these materials; a third layer including at least one material selected from a second group consisting of nickel, copper, gold, palladium, tin, silver, zinc, platinum, and an alloy of any of these materials; and a second layer between the first layer and the third layer. The second layer consists of or essentially consists of nickel and tin. The second layer includes an intermetallic phase of nickel and tin.

公开(公告)号：US11626351B2

公开(公告)日：2023-04-11

申请号：US17158234

申请日：2021-01-26

Applicant: Infineon Technologies AG

Inventor： Ivan Nikitin ,  Timo Bohnenberger ,  Andreas Grassmann ,  Martin Mayer ,  Alexander Roth ,  Franz Zollner

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/28 ,  H01L21/00 ,  H01L23/31 ,  H01L25/065 ,  H01L25/07 ,  H01L23/36 ,  H01L23/00

Abstract: A semiconductor package includes a semiconductor die, an encapsulant body of electrically insulating material that encapsulates the semiconductor die, a thermal conduction plate comprising an outer surface that is exposed from the encapsulant body, a region of thermal interface material interposed between the thermal conduction plate and the semiconductor die, the region of thermal interface material being a liquid or semi-liquid, and a barrier that is configured to prevent the thermal interface material of the region from flowing laterally across the barrier.

公开(公告)号：US20220238422A1

公开(公告)日：2022-07-28

申请号：US17158234

申请日：2021-01-26

Applicant: Infineon Technologies AG

Inventor： Ivan Nikitin ,  Timo Bohnenberger ,  Andreas Grassmann ,  Martin Mayer ,  Alexander Roth ,  Franz Zollner

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor package includes a semiconductor die, an encapsulant body of electrically insulating material that encapsulates the semiconductor die, a thermal conduction plate comprising an outer surface that is exposed from the encapsulant body, a region of thermal interface material interposed between the thermal conduction plate and the semiconductor die, the region of thermal interface material being a liquid or semi-liquid, and a barrier that is configured to prevent the thermal interface material of the region from flowing laterally across the barrier