公开(公告)号：US20200098617A1

公开(公告)日：2020-03-26

申请号：US16695999

申请日：2019-11-26

Applicant: Infineon Technologies AG

Inventor： Oliver Hellmund ,  Ingo Muri ,  Johannes Baumgartl ,  Iris Moder ,  Thomas Christian Neidhart ,  Hans-Joachim Schulze

IPC: H01L21/762 ,  H01L29/78 ,  H01L29/66 ,  H01L29/423 ,  H01L21/311 ,  H01L21/306 ,  H01L21/28 ,  H01L21/74 ,  H01L29/872 ,  H01L21/764 ,  H01L29/16 ,  H01L29/861

Abstract: A semiconductor device includes a first epitaxial layer, a second epitaxial layer disposed below the first epitaxial layer, a conductive layer disposed below and directly contacting the second epitaxial layer, and a plurality of spacers disposed between the second epitaxial layer and the conductive layer. The conductive layer includes a metal. The plurality of spacers include a bulk semiconductor material.

公开(公告)号：US20180277391A1

公开(公告)日：2018-09-27

申请号：US15927551

申请日：2018-03-21

Applicant: Infineon Technologies AG

Inventor： Iris Moder ,  Sophia Friedler ,  Ingo Muri ,  Hans-Joachim Schulze

IPC: H01L21/3213 ,  H01L29/10 ,  H01L29/739 ,  H01L29/66 ,  H01L21/265 ,  H01L21/306 ,  H01L21/308 ,  H01L21/324 ,  H01L21/784 ,  H01L21/304

CPC classification number: H01L21/32139 ,  H01L21/265 ,  H01L21/26506 ,  H01L21/304 ,  H01L21/30608 ,  H01L21/3083 ,  H01L21/324 ,  H01L21/784 ,  H01L29/0638 ,  H01L29/0661 ,  H01L29/1095 ,  H01L29/6634 ,  H01L29/66348 ,  H01L29/7397

Abstract: According to embodiments, a method for manufacturing a semiconductor device includes forming a mask comprising a pattern of inert structures on a side of a first main surface of a semiconductor substrate. A semiconductor layer is formed over the first main surface, and the semiconductor substrate is thinned from a second main surface opposite to the first main surface. Thereafter, a semiconductor region laterally adjoining the inert structures is anisotropically etched.

公开(公告)号：US09875926B2

公开(公告)日：2018-01-23

申请号：US14953362

申请日：2015-11-29

Applicant: Infineon Technologies AG

Inventor： Iris Moder ,  Ingo Muri ,  Johannes Baumgartl ,  Oliver Hellmund ,  Manfred Engelhardt ,  Hans-Joachim Schulze

IPC: H01L21/76 ,  H01L21/762 ,  H01L21/20 ,  H01L21/02

CPC classification number: H01L21/76267 ,  H01L21/02238 ,  H01L21/02258 ,  H01L21/02647 ,  H01L21/2022 ,  H01L21/31144 ,  H01L21/7621 ,  H01L21/7624 ,  H01L21/76248 ,  H01L21/76264 ,  H01L21/76272 ,  H01L21/76281 ,  H01L21/76283 ,  H01L21/76286 ,  H01L21/76289 ,  H01L21/76297

Abstract: A method for fabricating a semiconductor device includes forming an opening in a first epitaxial lateral overgrowth region to expose a surface of the semiconductor substrate within the opening. The method further includes forming an insulation region at the exposed surface of the semiconductor substrate within the opening and filling the opening with a second semiconductor material to form a second epitaxial lateral overgrowth region using a lateral epitaxial growth process.

公开(公告)号：US20160203977A1

公开(公告)日：2016-07-14

申请号：US14594838

申请日：2015-01-12

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Ingo Muri ,  Iris Moder

IPC: H01L21/02 ,  H01L21/225 ,  H01L21/74

CPC classification number: H01L21/02258 ,  H01L21/02238 ,  H01L21/2252 ,  H01L21/74 ,  H01L21/78

Abstract: In accordance with a method of manufacturing a semiconductor arrangement, a first trench is formed into a semiconductor body from a first side. An anodic oxide structure is formed at a bottom side of the first trench by immersing the semiconductor body in an electrolyte and applying an anodizing voltage between the semiconductor body and an electrode in contact with the electrolyte.

Abstract translation: 根据制造半导体装置的方法，从第一侧将第一沟槽形成为半导体本体。 通过将半导体本体浸入电解质中并在半导体本体和与电解质接触的电极之间施加阳极氧化电压，在第一沟槽的底侧形成阳极氧化物结构。

公开(公告)号：US20230127556A1

公开(公告)日：2023-04-27

申请号：US17743006

申请日：2022-05-12

Applicant: Infineon Technologies AG

Inventor： Bernhard Goller ,  Alexander Binter ,  Tobias Hoechbauer ,  Martin Huber ,  Iris Moder ,  Matteo Piccin ,  Francisco Javier Santos Rodriguez ,  Hans-Joachim Schulze

IPC: H01L21/02 ,  H01L21/288 ,  H01L21/78

Abstract: A method of processing a semiconductor wafer includes: forming one or more epitaxial layers over a first main surface of the semiconductor wafer; forming one or more porous layers in the semiconductor wafer or in the one or more epitaxial layers, wherein the semiconductor wafer, the one or more epitaxial layers and the one or more porous layers collectively form a substrate; forming doped regions of a semiconductor device in the one or more epitaxial layers; and after forming the doped regions of the semiconductor device, separating a non-porous part of the semiconductor wafer from a remainder of the substrate along the one or more porous layers.

公开(公告)号：US11476111B2

公开(公告)日：2022-10-18

申请号：US16811192

申请日：2020-03-06

Applicant: Infineon Technologies AG

Inventor： Iris Moder ,  Bernhard Goller ,  Tobias Franz Wolfgang Hoechbauer ,  Roland Rupp ,  Francisco Javier Santos Rodriguez ,  Hans-Joachim Schulze

IPC: H01L21/00 ,  H01L21/02 ,  H01L21/4757 ,  H01L21/475 ,  H01L21/467

Abstract: A semiconductor substrate includes a base portion, an auxiliary layer and a surface layer. The auxiliary layer is formed on the base portion. The surface layer is formed on the auxiliary layer. The surface layer is in contact with a first main surface of the semiconductor substrate. The auxiliary layer has a different electrochemical dissolution efficiency than the base portion and the surface layer. At least a portion of the auxiliary layer and at least a portion of the surface layer are converted into a porous structure. Subsequently, an epitaxial layer is formed on the first main surface.

公开(公告)号：US20210265468A1

公开(公告)日：2021-08-26

申请号：US17235989

申请日：2021-04-21

Applicant: Infineon Technologies AG

Inventor： Ingo Muri ,  Johannes Konrad Baumgartl ,  Oliver Hellmund ,  Jacob Tillmann Ludwig ,  Iris Moder ,  Thomas Neidhart ,  Gerhard Schmidt ,  Hans-Joachim Schulze

IPC: H01L29/36 ,  H01L21/223 ,  H01L21/02 ,  H01L21/225 ,  H01L29/167 ,  H01L21/265

Abstract: A semiconductor device includes a semiconductor substrate having a first dopant and a second dopant. A covalent atomic radius of a material of the semiconductor substrate is i) larger than a covalent atomic radius of the first dopant and smaller than a covalent atomic radius of the second dopant, or ii) smaller than the covalent atomic radius of the first dopant and larger than the covalent atomic radius of the second dopant. The semiconductor device further includes a semiconductor layer on the semiconductor substrate and semiconductor device elements in the semiconductor layer. A vertical concentration profile of the first dopant decreases along at least 80% of a distance between an interface of the semiconductor substrate and the semiconductor layer to a surface of the semiconductor substrate opposite to the interface.

公开(公告)号：US11038028B2

公开(公告)日：2021-06-15

申请号：US16406773

申请日：2019-05-08

Applicant: Infineon Technologies AG

Inventor： Ingo Muri ,  Johannes Konrad Baumgartl ,  Oliver Hellmund ,  Jacob Tillmann Ludwig ,  Iris Moder ,  Thomas Christian Neidhart ,  Gerhard Schmidt ,  Hans-Joachim Schulze

IPC: H01L29/36 ,  H01L21/223 ,  H01L21/02 ,  H01L21/225 ,  H01L29/167 ,  H01L21/265

Abstract: A method of manufacturing a semiconductor device includes providing a semiconductor substrate having opposing first and second main surfaces and first and second dopants. A covalent atomic radius of a material of the substrate is i) larger than a covalent atomic radius of the first dopant and smaller than that of the second dopant, or ii) smaller than the covalent atomic radius of the first dopant and larger than that of the second dopant. A vertical extension of the first dopant into the substrate from the first main surface ends at a bottom of a substrate portion at a first vertical distance to the first main surface. The method further includes forming a semiconductor layer on the first main surface, forming semiconductor device elements in the semiconductor layer, and reducing a thickness of the substrate by removing material from the second main surface at least up to the substrate portion.

公开(公告)号：US11011409B2

公开(公告)日：2021-05-18

申请号：US16695999

申请日：2019-11-26

Applicant: Infineon Technologies AG

Inventor： Oliver Hellmund ,  Ingo Muri ,  Johannes Baumgartl ,  Iris Moder ,  Thomas Christian Neidhart ,  Hans-Joachim Schulze

IPC: H01L29/417 ,  H01L21/762 ,  H01L29/861 ,  H01L29/16 ,  H01L29/66 ,  H01L21/764 ,  H01L29/872 ,  H01L21/74 ,  H01L21/28 ,  H01L21/306 ,  H01L21/311 ,  H01L29/423 ,  H01L29/78 ,  H01L21/3105

Abstract: A semiconductor device includes a first epitaxial layer, a second epitaxial layer disposed below the first epitaxial layer, a conductive layer disposed below and directly contacting the second epitaxial layer, and a plurality of spacers disposed between the second epitaxial layer and the conductive layer. The conductive layer includes a metal. The plurality of spacers include a bulk semiconductor material.

公开(公告)号：US10802404B2

公开(公告)日：2020-10-13

申请号：US15919989

申请日：2018-03-13

Applicant: Infineon Technologies AG

Inventor： Joerg Ortner ,  Iris Moder ,  Ingo Muri

IPC: G03F7/20 ,  G03F1/00 ,  G03F1/42

Abstract: An exposure method includes projecting a reticle pattern into a first exposure field of a photoresist layer, wherein the reticle pattern includes first and second line patterns on opposite edges of the reticle pattern and wherein at least the first line pattern includes an end section through which light flux decreases outwards. The reticle pattern is further projected into a second exposure field of the photoresist layer, wherein a first tapering projection zone of the end section of the first line pattern in the second exposure field overlaps a projection area of the second line pattern in the first exposure field.