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公开(公告)号：US20230178615A1
公开(公告)日：2023-06-08
申请号：US18072965
申请日：2022-12-01
IPC分类号： H01L29/423 , H01L29/10 , H01L29/40 , H01L29/78
CPC分类号： H01L29/4236 , H01L29/1095 , H01L29/1033 , H01L29/407 , H01L29/7813
摘要： A power transistor device includes a semiconductor substrate, a gate trench extending into the semiconductor substrate, a transistor gate provided in the gate trench, and an insulating structure formed between the transistor gate and a side wall of the gate trench. The insulating structure is configured to electrically insulate the transistor gate from a channel region which extends along the side wall of the gate trench. The insulating structure includes a layer of piezoelectric material.
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公开(公告)号：US20230163167A1
公开(公告)日：2023-05-25
申请号：US17990142
申请日：2022-11-18
CPC分类号： H01L29/063 , H01L29/1608 , H01L29/1095 , H01L29/7813 , H01L21/0465 , H01L21/047 , H01L29/66068
摘要： A semiconductor device is provided. In an example, the semiconductor device includes a trench gate structure in a silicon carbide (SiC) semiconductor body. The semiconductor device includes a source region of a first conductivity type that adjoins the trench gate structure in a first segment. The semiconductor device includes a semiconductor region of a second conductivity type. The semiconductor region includes a first sub-region arranged below the source region in the first segment, and a second sub-region arranged in a second segment that adjoins the first segment. The semiconductor device includes a current spread region of the first conductivity type. The current spread region includes a first sub-region that adjoins the trench gate structure in the first segment at a vertical distance to a first surface of the SiC semiconductor body, and a second sub-region that is spaced from the trench gate structure in the second segment at the vertical distance to the first surface by a lateral distance.
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公开(公告)号：US20230035144A1
公开(公告)日：2023-02-02
申请号：US17387504
申请日：2021-07-28
摘要： A semiconductor device includes a SiC substrate and a plurality of transistor cells formed in the SiC substrate and electrically connected in parallel to form a transistor. Each transistor cell includes a gate structure including a gate electrode and a gate dielectric stack separating the gate electrode from the SiC substrate. The gate dielectric stack includes a ferroelectric insulator. The transistor has a specified operating temperature range, and the ferroelectric insulator is doped with a doping material such that the Curie temperature of the ferroelectric insulator is in a range above the specified operating temperature range of the transistor. A corresponding method of producing the semiconductor device is also described.
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公开(公告)号：US20220157607A1
公开(公告)日：2022-05-19
申请号：US17666654
申请日：2022-02-08
摘要： A method for forming a wide band gap semiconductor device is provided. The method includes forming a gate insulation layer on a wide band gap semiconductor substrate and annealing the gate insulation layer using at least a first reactive gas species and a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species. The method can include forming a gate electrode on the gate insulation layer after annealing the gate insulation layer.
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公开(公告)号：US20210343835A1
公开(公告)日：2021-11-04
申请号：US17375034
申请日：2021-07-14
发明人： Ralf Siemieniec , Thomas Aichinger , Thomas Basler , Wolfgang Bergner , Rudolf Elpelt , Romain Esteve , Michael Hell , Daniel Kueck , Caspar Leendertz , Dethard Peters , Hans-Joachim Schulze
摘要： A semiconductor component includes: gate structures extending from a first surface into an SiC semiconductor body; a drift zone of a first conductivity type formed in the SiC semiconductor body; first mesas and second mesas arranged between the gate structures in the SiC semiconductor body; body areas of a second conductivity type arranged in the first mesas and the second mesas, the body areas each adjoining a first side wall of one of the gate structures; first shielding areas of the second conductivity type adjoining a second side wall of one of the gate structures; second shielding areas of the second conductivity type adjoining the body areas in the second mesas; and diode areas of the conductivity type of the drift zone, the diode areas forming Schottky contacts with a load electrode between the first shielding areas and the second shielding areas.
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16.发明申请公开(公告)号：US20190311903A1
公开(公告)日：2019-10-10
申请号：US16374457
申请日：2019-04-03
摘要： A method for forming a wide band gap semiconductor device is provided. The method includes forming a gate insulation layer on a wide band gap semiconductor substrate and annealing the gate insulation layer using at least a first reactive gas species and a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species. The method can include forming a gate electrode on the gate insulation layer after annealing the gate insulation layer.
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公开(公告)号：US10211306B2
公开(公告)日：2019-02-19
申请号：US15866755
申请日：2018-01-10
发明人： Ralf Siemieniec , Dethard Peters , Romain Esteve , Wolfgang Bergner , Thomas Aichinger , Daniel Kueck , Roland Rupp , Bernd Zippelius , Karlheinz Feldrapp , Christian Strenger
IPC分类号： H01L29/06 , H01L29/10 , H01L29/78 , H01L29/739 , H01L29/04 , H01L29/423 , H01L29/40 , H01L29/16 , H01L29/20
摘要： A semiconductor device includes a semiconductor body formed from a semiconductor material with a band-gap of at least 2.0 eV, the semiconductor body having a diode region and a source region. The semiconductor device further includes a trench gate structure having a first sidewall and a second sidewall opposite the first sidewall, the first sidewall and the second sidewall extending along a common longitudinal direction. A doping concentration of a first doping type is higher in the diode region than in the source region. The trench gate structure projects from a first surface of the semiconductor body into the semiconductor body. A first portion of the second sidewall at the first surface is directly adjoined by the source region. A second portion of the second sidewall is in direct contact with the diode region. Additional semiconductor device embodiments are provided.
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18.发明授权公开(公告)号：US09934972B2
公开(公告)日：2018-04-03
申请号：US15288349
申请日：2016-10-07
发明人： Thomas Aichinger , Wolfgang Bergner , Romain Esteve , Daniel Kueck , Dethard Peters , Victorina Poenariu , Gerald Reinwald , Roland Rupp , Gerald Unegg
IPC分类号： H01L21/04 , H01L21/02 , H01L21/265 , H01L29/78 , H01L29/66 , H01L29/16 , H01L29/10 , H01L29/40 , H01L29/861 , H01L29/06 , H01L21/3065 , H01L29/423
CPC分类号： H01L21/0475 , H01L21/049 , H01L21/3065 , H01L29/0661 , H01L29/0696 , H01L29/1095 , H01L29/1608 , H01L29/401 , H01L29/42376 , H01L29/4238 , H01L29/66068 , H01L29/7813 , H01L29/8613
摘要： A trench is formed that extends from a main surface into a crystalline silicon carbide semiconductor layer. A mask is formed that includes a mask opening exposing the trench and a rim section of the main surface around the trench. By irradiation with a particle beam a first portion of the semiconductor layer exposed by the mask opening and a second portion outside of the vertical projection of the mask opening and directly adjoining to the first portion are amorphized. A vertical extension of the amorphized second portion gradually decreases with increasing distance to the first portion. The amorphized first and second portions are removed.
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19.发明申请Semiconductor Device with Stripe-Shaped Trench Gate Structures and Gate Connector Structure 有权半导体器件带条状沟槽栅极结构和栅极连接器结构公开(公告)号：US20160181408A1
公开(公告)日：2016-06-23
申请号：US14976566
申请日：2015-12-21
发明人： Thomas Aichinger , Wolfgang Bergner
IPC分类号： H01L29/739 , H01L29/423 , H01L29/06 , H01L29/16
CPC分类号： H01L29/4236 , H01L21/02236 , H01L21/02255 , H01L21/049 , H01L21/823462 , H01L24/48 , H01L29/0696 , H01L29/1608 , H01L29/42368 , H01L29/4238 , H01L29/7397 , H01L29/7813 , H01L2924/00014 , H01L2224/05599 , H01L2224/45099
摘要： A semiconductor device includes a transistor cell with a stripe-shaped trench gate structure that extends from a first surface into a semiconductor body. A gate connector structure at a distance to the first surface is electrically connected to a gate electrode in the trench gate structure. A gate dielectric separates the gate electrode from the semiconductor body. First sections of the gate dielectric outside a vertical projection of the gate connector structure are thinner than second sections within the vertical projection of the gate connector structure.
摘要翻译： 半导体器件包括具有从第一表面延伸到半导体本体的条形沟槽栅极结构的晶体管单元。 距离第一表面一定距离的栅极连接器结构电连接到沟槽栅极结构中的栅电极。 栅极电介质将栅电极与半导体本体分开。 栅极连接器结构的垂直投影外部的栅极电介质的第一部分比栅极连接器结构的垂直投影内的第二部分薄。
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公开(公告)号：US20160172468A1
公开(公告)日：2016-06-16
申请号：US14567504
申请日：2014-12-11
发明人： Romain Esteve , Dethard Peters , Wolfgang Bergner , Ralf Siemieniec , Thomas Aichinger , Daniel Kueck
IPC分类号： H01L29/66 , H01L29/423 , H01L21/311 , H01L21/324 , H01L21/04 , H01L29/16 , H01L21/02
CPC分类号： H01L29/063 , H01L21/02236 , H01L21/045 , H01L21/0465 , H01L21/0475 , H01L21/049 , H01L21/3065 , H01L21/31111 , H01L21/324 , H01L21/3247 , H01L29/1095 , H01L29/1608 , H01L29/4236 , H01L29/42364 , H01L29/66068 , H01L29/66734 , H01L29/7813
摘要： A silicon-carbide semiconductor substrate having a plurality of first doped regions being laterally spaced apart from one another and beneath a main surface, and a second doped region extending from the main surface to a third doped region that is above the first doped regions is formed. Fourth doped regions extending from the main surface to the first doped regions are formed. A gate trench having a bottom that is arranged over a portion of one of the first doped regions is formed. A high-temperature step is applied to the substrate so as to realign silicon-carbide atoms along sidewalls of the trench and form rounded corners in the gate trench. A surface layer that forms along the sidewalls of the gate trench during the high-temperature step from the substrate is removed.
摘要翻译： 一种碳化硅半导体衬底，其具有多个第一掺杂区域，该第一掺杂区域在主表面之间彼此横向间隔开，并且形成从主表面延伸至位于第一掺杂区域之上的第三掺杂区域的第二掺杂区域 。 形成从主表面延伸到第一掺杂区的第四掺杂区。 形成具有布置在一个第一掺杂区域的一部分上的底部的栅极沟槽。 将高温步骤施加到衬底上，以便沿着沟槽的侧壁重新排列碳化硅原子，并在栅极沟槽中形成圆角。 去除在离开衬底的高温步骤期间沿着栅极沟槽的侧壁形成的表面层。
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