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    Cache coherency apparatus and method minimizing memory writeback operations
    14.
    发明授权
    Cache coherency apparatus and method minimizing memory writeback operations 有权
    缓存一致性设备和最小化内存回写操作的方法

    公开(公告)号：US09436605B2

    公开(公告)日：2016-09-06

    申请号：US14136131

    申请日：2013-12-20

    Applicant: Intel Corporation

    Inventor： Jeffrey D. Chamberlain ,  Vedaraman Geetha ,  Robert G. Blankenship ,  Yen-Cheng Liu ,  Adrian C. Moga ,  Herbert H. Hum ,  Sailesh Kottapalli

    IPC: G06F12/08

    CPC classification number: G06F12/0817 ,  G06F12/0815

    Abstract: An apparatus and method for reducing or eliminating writeback operations. For example, one embodiment of a method comprises: detecting a first operation associated with a cache line at a first requestor cache; detecting that the cache line exists in a first cache in a modified (M) state; forwarding the cache line from the first cache to the first requestor cache and storing the cache line in the first requestor cache in a second modified (M′) state; detecting a second operation associated with the cache line at a second requestor; responsively forwarding the cache line from the first requestor cache to the second requestor cache and storing the cache line in the second requestor cache in an owned (O) state if the cache line has not been modified in the first requestor cache; and setting the cache line to a shared (S) state in the first requestor cache.

    Abstract translation: 一种用于减少或消除写回操作的设备和方法。 例如，方法的一个实施例包括：在第一请求者高速缓存处检测与高速缓存行相关联的第一操作; 检测到所述高速缓存行存在于修改（M）状态的第一高速缓存中; 将所述高速缓存行从所述第一高速缓存转发到所述第一请求者高速缓存，并且以第二修改（M'）状态将所述高速缓存行存储在所述第一请求程序高速缓存中; 在第二请求者处检测与所述高速缓存线相关联的第二操作; 响应地将所述高速缓存行从所述第一请求者缓存转发到所述第二请求器高速缓存，并且如果所述高速缓存行尚未在所述第一请求者高速缓存中被修改则将所述高速缓存行存储在所述第二请求程序高速缓存中; 以及将所述高速缓存行设置为所述第一请求者缓存中的共享（S）状态。

    Allocation and write policy for a glueless area-efficient directory cache for hotly contested cache lines
    15.
    发明授权
    Allocation and write policy for a glueless area-efficient directory cache for hotly contested cache lines 有权
    一个无缝区域高效的目录缓存的分配和写入策略，用于热烈争议的缓存行

    公开(公告)号：US08631210B2

    公开(公告)日：2014-01-14

    申请号：US13786305

    申请日：2013-03-05

    Applicant: Intel Corporation

    Inventor： Adrian C. Moga ,  Malcolm Mandviwalla ,  Vedaraman Geetha ,  Herbert H. Hum

    IPC: G06F12/00

    CPC classification number: G06F12/0831 ,  G06F12/082 ,  G06F2212/2542

    Abstract: Methods and apparatus relating to allocation and/or write policy for a glueless area-efficient directory cache for hotly contested cache lines are described. In one embodiment, a directory cache stores data corresponding to a caching status of a cache line. The caching status of the cache line is stored for each of a plurality of caching agents in the system. An write-on-allocate policy is used for the directory cache by using a special state (e.g., snoop-all state) that indicates one or more snoops are to be broadcasted to all agents in the system. Other embodiments are also disclosed.

    Abstract translation: 描述与用于热挑战的高速缓存行的无胶带区域高效目录高速缓存的分配和/​​或写入策略有关的方法和装置。 在一个实施例中，目录高速缓存存储与高速缓存行的高速缓存状态对应的数据。 为系统中的多个缓存代理中的每一个存储缓存行的高速缓存状态。 通过使用指示要广播到系统中的所有代理的一个或多个窥探的特殊状态（例如，窥探全状态），对目录高速缓存使用写入分配策略。 还公开了其他实施例。

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