公开(公告)号：US20090064497A1

公开(公告)日：2009-03-12

申请号：US12289534

申请日：2008-10-29

申请人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Eung-Suek Lee ,  Youn-Soo Seo ,  Hee-Bum Shin ,  Yoong Oh ,  Byung-Bae Seo ,  Tae-Kyoung Kim ,  Dong-Jin Park

发明人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Eung-Suek Lee ,  Youn-Soo Seo ,  Hee-Bum Shin ,  Yoong Oh ,  Byung-Bae Seo ,  Tae-Kyoung Kim ,  Dong-Jin Park

IPC分类号： H05K3/10

CPC分类号： H05K3/462 ,  H01R12/523 ,  H05K3/4069 ,  H05K3/4647 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2203/0353 ,  Y10T29/49155

摘要： The method of manufacturing a printed circuit board using paste bumps includes perforating a core board to form at least one via hole, filling the at least one via hole by fill-plating and forming a circuit pattern on at least one surface of the core board, stacking a paste bump board on at least one surface of the core board, and forming an outer layer circuit on a surface of the paste bump board. The method provides a structurally stable all-layer IVH structure due to increased strength in the BVH's of the plated core boards and the interlayer connection area is increased between circuit patterns for improved connection reliability, and dimple coverage can be obtained.

摘要翻译： 使用糊状凸块的印刷电路板的制造方法包括对芯板进行穿孔以形成至少一个通孔，通过填充电镀填充至少一个通孔并在芯板的至少一个表面上形成电路图案， 在所述芯板的至少一个表面上堆叠焊料凸块，并且在所述焊料凸块的表面上形成外层电路。 该方法由于增强了镀层芯板BVH的强度而提供了结构稳定的全层IVH结构，并且层间连接区域在电路图案之间增加，从而提高了连接可靠性，并且可以获得凹坑覆盖。

公开(公告)号：US20070120253A1

公开(公告)日：2007-05-31

申请号：US11602332

申请日：2006-11-21

申请人： Yoong Oh ,  Chang-Sup Ryu ,  Dong-Jin Park ,  Jee-Soo Mok ,  Byung-Bae Seo

发明人： Yoong Oh ,  Chang-Sup Ryu ,  Dong-Jin Park ,  Jee-Soo Mok ,  Byung-Bae Seo

IPC分类号： H01L23/48

CPC分类号： H01L21/486 ,  H01L21/4867 ,  H01L23/49827 ,  H01L23/49883 ,  H01L2924/0002 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/4647 ,  H05K2201/0355 ,  H05K2203/063 ,  H05K2203/1572 ,  H01L2924/00

摘要： A core substrate and multilayer printed circuit board using paste bumps and manufacturing method thereof are disclosed. With the method of manufacturing a core substrate using paste bumps comprising: (a) aligning a pair of paste bump boards, each of which has a plurality of paste bumps joined to its surface, such that the paste bumps face each other, and (b) pressing the pair of paste bump boards together, where an insulation element is placed between the pair of paste bump boards, it is easier to implement interlayer electrical interconnection between circuit patterns, the thickness of the core substrate can readily be adjusted by adjusting the thickness of the insulation layer, the stiffness is improved as a pair of paste bump boards are pressed from the top and bottom, and high-density wiring can be formed more easily as the paste bumps are connected in pairs so that the diameters of the paste bumps formed on the paste bump boards can be reduced.

摘要翻译： 公开了一种使用糊状凸块的芯基板和多层印刷电路板及其制造方法。 利用使用糊状凸块的芯基板的制造方法，其特征在于，包括：（a）对准一对粘贴凸块，其中，每一个均具有与其表面接合的多个焊料凸块，使得所述焊膏凸起彼此面对;以及（b ）将一对焊膏凸块按压在一起，其中绝缘元件放置在一对焊膏凸块之间，更容易实现电路图案之间的层间电互连，通过调节厚度可以容易地调节芯基板的厚度 的绝缘层，由于从顶部和底部按压一对糊状凸块，刚度得以改善，并且随着糊料凸块成对连接，可以更容易地形成高密度布线，使得糊料凸块的直径 可以减少形成在糊状凸块上。

公开(公告)号：US07973248B2

公开(公告)日：2011-07-05

申请号：US12219381

申请日：2008-07-21

申请人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Eung-Suek Lee ,  Youn-Soo Seo ,  Hee-Bum Shin ,  Yoong Oh ,  Byung-Bae Seo ,  Tae-Kyoung Kim ,  Dong-Jin Park

发明人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Eung-Suek Lee ,  Youn-Soo Seo ,  Hee-Bum Shin ,  Yoong Oh ,  Byung-Bae Seo ,  Tae-Kyoung Kim ,  Dong-Jin Park

IPC分类号： H01R12/04 ,  H05K1/11

CPC分类号： H05K3/462 ,  H01R12/523 ,  H05K3/4069 ,  H05K3/4647 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2203/0353 ,  Y10T29/49155

摘要： A printed circuit board using paste bumps and manufacturing method thereof are disclosed. The method of manufacturing a printed circuit board using paste bumps, includes: (a) perforating a core board to form at least one via hole, (b) filling the at least one via hole by fill-plating and forming a circuit pattern on at least one surface of the core board, (c) stacking a paste bump board on at least one surface of the core board, and (d) forming an outer layer circuit on a surface of the paste bump board, a structurally stable all-layer IVH structure can be implemented due to increased strength in the BVH's of the plated core boards, the manufacture time can be reduced due to parallel processes and collective stacking, implementing micro circuits can be made easy due to the copper foils of the paste bump boards stacked on the outermost layers, the manufacture costs can be reduced as certain plating and drilling processes may be omitted, the interlayer connection area is increased between circuit patterns for improved connection reliability, and dimple coverage can be obtained.

摘要翻译： 公开了一种使用糊状凸块的印刷电路板及其制造方法。 使用糊状凸块制造印刷电路板的方法包括：（a）穿孔芯板以形成至少一个通孔，（b）通过填充电镀填充至少一个通孔并在其上形成电路图案 芯板的至少一个表面，（c）在芯板的至少一个表面上堆叠焊料凸块，以及（d）在焊料凸块的表面上形成外层电路，结构稳定的全层 由于镀层芯板的BVH的强度增加，可以实现IVH结构，由于并行处理和集体堆叠，制造时间可以减少，由于粘贴凸块的铜箔堆叠而实现微电路变得容易 在最外层，可以减少制造成本，因为可以省略某些电镀和钻孔工艺，在电路图案之间增加层间连接面积以提高连接可靠性，并且可以获得凹坑覆盖 d。

公开(公告)号：US20100022052A1

公开(公告)日：2010-01-28

申请号：US12585235

申请日：2009-09-09

申请人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Dong-Jin Park

发明人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Dong-Jin Park

IPC分类号： H01L21/60

CPC分类号： H01L23/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2224/48237 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2224/05599

摘要： A manufacturing method of a package on package with a cavity. The method can include forming a first upper substrate cavity in one side of an upper substrate; mounting an upper semiconductor chip on the other side of the upper substrate; forming a lower substrate cavity in one side of a lower substrate; mounting a lower semiconductor chip in the lower substrate cavity formed in the lower substrate; and stacking the upper substrate above the lower substrate such that the first upper substrate cavity accommodates a part of the lower semiconductor chip. The package on package and a manufacturing method thereof can reduce the overall thickness of the package by forming cavities in both upper and lower substrates to accommodate a semiconductor chip mounted in the lower substrate.

摘要翻译： 具有空腔的封装封装的制造方法。 该方法可以包括在上基板的一侧形成第一上基板空腔; 将上半导体芯片安装在上基板的另一侧上; 在下基板的一侧形成下基板空腔; 将下半导体芯片安装在形成在下基板中的下基板空腔中; 并且将所述上基板堆叠在所述下基板上方，使得所述第一上基板空腔容纳所述下半导体芯片的一部分。 封装上的封装及其制造方法可以通过在上基板和下基板中形成空腔来容纳安装在下基板中的半导体芯片来减小封装的整体厚度。

公开(公告)号：US07605459B2

公开(公告)日：2009-10-20

申请号：US11706223

申请日：2007-02-15

申请人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Dong-Jin Park

发明人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Dong-Jin Park

IPC分类号： H01L23/02 ,  H01L23/48

CPC分类号： H01L23/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2224/48237 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2224/05599

摘要： An aspect of the present invention features a manufacturing method of a package on package with a cavity. The method can comprise (a) forming a first upper substrate cavity in one side of an upper substrate; (b) mounting an upper semiconductor chip on the other side of the upper substrate; (c) forming a lower substrate cavity in one side of a lower substrate; (d) mounting a lower semiconductor chip in the lower substrate cavity formed in the lower substrate; and (e) stacking the upper substrate above the lower substrate such that the first upper substrate cavity accommodates a part of the lower semiconductor chip. The package on package and a manufacturing method thereof can reduce the overall thickness of the package by forming cavities in both upper and lower substrates to accommodate a semiconductor chip mounted in the lower substrate.

摘要翻译： 本发明的一个方面的特征在于具有空腔的封装的封装的制造方法。 该方法可以包括（a）在上基板的一侧中形成第一上基板空腔; （b）将上半导体芯片安装在上基板的另一侧上; （c）在下基板的一侧中形成下基板空腔; （d）将下半导体芯片安装在形成在下基板中的下基板空腔中; 和（e）将上基板堆叠在下基板上方，使得第一上基板空腔容纳下半导体芯片的一部分。 包装上的封装及其制造方法可以通过在上基板和下基板中形成空腔来容纳安装在下基板中的半导体芯片来减小封装的整体厚度。

公开(公告)号：US20070187810A1

公开(公告)日：2007-08-16

申请号：US11706223

申请日：2007-02-15

申请人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Dong-Jin Park

发明人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Dong-Jin Park

IPC分类号： H01L23/02 ,  H01L21/00

CPC分类号： H01L23/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2224/48237 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2224/05599

摘要： An aspect of the present invention features a manufacturing method of a package on package with a cavity. The method can comprise (a) forming a first upper substrate cavity in one side of an upper substrate; (b) mounting an upper semiconductor chip on the other side of the upper substrate; (c) forming a lower substrate cavity in one side of a lower substrate; (d) mounting a lower semiconductor chip in the lower substrate cavity formed in the lower substrate; and (e) stacking the upper substrate above the lower substrate such that the first upper substrate cavity accommodates a part of the lower semiconductor chip. The package on package and a manufacturing method thereof can reduce the overall thickness of the package by forming cavities in both upper and lower substrates to accommodate a semiconductor chip mounted in the lower substrate.

摘要翻译： 本发明的一个方面的特征在于具有空腔的封装的封装的制造方法。 该方法可以包括（a）在上基板的一侧中形成第一上基板空腔; （b）将上半导体芯片安装在上基板的另一侧上; （c）在下基板的一侧中形成下基板空腔; （d）将下半导体芯片安装在形成在下基板中的下基板空腔中; 和（e）将上基板堆叠在下基板上方，使得第一上基板空腔容纳下半导体芯片的一部分。 封装上的封装及其制造方法可以通过在上基板和下基板中形成空腔来容纳安装在下基板中的半导体芯片来减小封装的整体厚度。

公开(公告)号：US20070059917A1

公开(公告)日：2007-03-15

申请号：US11520729

申请日：2006-09-14

申请人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Eung-Suek Lee ,  Ki-Hwan Kim ,  Sung-Yong Kim

发明人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Eung-Suek Lee ,  Ki-Hwan Kim ,  Sung-Yong Kim

IPC分类号： H01L21/44 ,  H01L21/4763

CPC分类号： H05K3/4664 ,  H05K3/0023 ,  H05K3/1216 ,  H05K3/1258 ,  H05K3/207 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/465 ,  H05K2201/09536 ,  H05K2203/0143 ,  H05K2203/0568

摘要： A manufacturing method for a printed circuit board having a fine pattern is disclosed, comprising: providing a carrier plate; coating the carrier plate with a photosensitive material; forming a first circuit pattern on the photosensitive material; forming a first circuit layer by drying a conductive paste printed into a space between the photosensitive materials where the first circuit pattern is formed; depositing an insulation layer on the first circuit layer; processing via holes penetrating the insulation layer; coating the insulation layer with the photosensitive material and then forming a second circuit pattern in the photosensitive material; forming a second circuit layer and filling the via holes by drying the conductive paste printed into a space between the photosensitive materials, where the second circuit pattern is formed, and the via holes; and removing the carrier plate.

摘要翻译： 公开了一种具有精细图案的印刷电路板的制造方法，包括：提供载板; 用感光材料涂覆载体板; 在感光材料上形成第一电路图案; 通过干燥印刷在形成有第一电路图案的感光材料之间的空间中的导电浆料形成第一电路层; 在第一电路层上沉积绝缘层; 通过贯穿绝缘层的孔加工; 用感光材料涂覆绝缘层，然后在感光材料中形成第二电路图案; 形成第二电路层，并通过干燥印刷在其中形成第二电路图案的感光材料之间的空间中的导电浆料和通孔来填充通孔; 并移除载体板。

公开(公告)号：US07901985B2

公开(公告)日：2011-03-08

申请号：US12585235

申请日：2009-09-09

申请人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Dong-Jin Park

发明人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Dong-Jin Park

IPC分类号： H01L21/00

CPC分类号： H01L23/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2224/48237 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2224/05599

摘要： A manufacturing method of a package on package with a cavity. The method can include forming a first upper substrate cavity in one side of an upper substrate; mounting an upper semiconductor chip on the other side of the upper substrate; forming a lower substrate cavity in one side of a lower substrate; mounting a lower semiconductor chip in the lower substrate cavity formed in the lower substrate; and stacking the upper substrate above the lower substrate such that the first upper substrate cavity accommodates a part of the lower semiconductor chip. The package on package and a manufacturing method thereof can reduce the overall thickness of the package by forming cavities in both upper and lower substrates to accommodate a semiconductor chip mounted in the lower substrate.

摘要翻译： 具有空腔的封装封装的制造方法。 该方法可以包括在上基板的一侧形成第一上基板空腔; 将上半导体芯片安装在上基板的另一侧上; 在下基板的一侧形成下基板空腔; 将下半导体芯片安装在形成在下基板中的下基板空腔中; 并且将所述上基板堆叠在所述下基板上方，使得所述第一上基板空腔容纳所述下半导体芯片的一部分。 封装上的封装及其制造方法可以通过在上基板和下基板中形成空腔来容纳安装在下基板中的半导体芯片来减小封装的整体厚度。

公开(公告)号：US20090229875A1

公开(公告)日：2009-09-17

申请号：US12453741

申请日：2009-05-20

申请人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Eung-Suek Lee ,  Ki-Hwan Kim ,  Sung-Yong Kim

发明人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Eung-Suek Lee ,  Ki-Hwan Kim ,  Sung-Yong Kim

IPC分类号： H05K1/11

CPC分类号： H05K3/4664 ,  H05K3/0023 ,  H05K3/1216 ,  H05K3/1258 ,  H05K3/207 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/465 ,  H05K2201/09536 ,  H05K2203/0143 ,  H05K2203/0568

摘要： A printed circuit board having a fine pattern and related manufacturing method that includes providing a carrier plate; coating the carrier plate with a photosensitive material; forming a first circuit pattern on the photosensitive material; forming a first circuit layer by drying a conductive paste printed into a space between the photosensitive materials where the first circuit pattern is formed; depositing an insulation layer on the first circuit layer; processing via holes penetrating the insulation layer; coating the insulation layer with the photosensitive material and then forming a second circuit pattern in the photosensitive material; forming a second circuit layer and filling the via holes by drying the conductive paste printed into a space between the photosensitive materials, where the second circuit pattern is formed, and the via holes; and removing the carrier plate.

摘要翻译： 一种具有精细图案和相关制造方法的印刷电路板，包括提供载板; 用感光材料涂覆载体板; 在感光材料上形成第一电路图案; 通过干燥印刷在形成有第一电路图案的感光材料之间的空间中的导电浆料形成第一电路层; 在第一电路层上沉积绝缘层; 通过贯穿绝缘层的孔加工; 用感光材料涂覆绝缘层，然后在感光材料中形成第二电路图案; 形成第二电路层，并通过干燥印刷在其中形成第二电路图案的感光材料之间的空间中的导电浆料和通孔来填充通孔; 并移除载体板。

公开(公告)号：US08298447B2

公开(公告)日：2012-10-30

申请号：US12076117

申请日：2008-03-13

申请人： Ki-Hwan Kim ,  Jee-Soo Mok ,  Myung-Sam Kang

发明人： Ki-Hwan Kim ,  Jee-Soo Mok ,  Myung-Sam Kang

IPC分类号： H01B1/02 ,  H01B1/22 ,  B32B37/00 ,  B29C44/34 ,  C08J9/22

CPC分类号： H05K1/095 ,  H05K3/4069 ,  H05K3/4647 ,  H05K2201/0116 ,  H05K2201/0355 ,  H05K2203/1461

摘要： A conductive paste, a printed circuit board using the conductive paste, and a method of manufacturing the printed circuit board are disclosed. A conductive paste that includes conductive particles, a polymer, and a polymer foam, can reduce the number of printing repetitions, to simplify the manufacturing process, decrease process times, and improve reliability.

摘要翻译： 公开了一种导电浆料，使用导电浆料的印刷电路板以及印刷电路板的制造方法。 包括导电颗粒，聚合物和聚合物泡沫的导电糊可以减少打印重复次数，从而简化制造过程，缩短处理时间并提高可靠性。