公开(公告)号：US08013391B2

公开(公告)日：2011-09-06

申请号：US11963668

申请日：2007-12-21

申请人： Joseph A. Yedinak ,  Nathan L. Kraft

发明人： Joseph A. Yedinak ,  Nathan L. Kraft

IPC分类号： H01L29/78

CPC分类号： H01L29/407 ,  H01L21/26586 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4933 ,  H01L29/495 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7828 ,  H01L29/7831 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H02M3/00 ,  H02M3/33592 ,  H02M7/48 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor power device includes a drift region of a first conductivity type, a well region extending above the drift region and having a second conductivity type opposite the first conductivity type, active trenches extending through the well region and into the drift region where the active trenches define an active area. Inside each of the active trenches is formed a first conductive gate electrode disposed along and insulated from a first trench sidewall, a second conductive gate electrode disposed along and insulated from a second trench sidewall, and a conductive shield electrode disposed between the first and second conductive gate electrodes, wherein the shield electrode is insulated from and extends deeper inside the trench than the first and second conductive gate electrodes. The device also includes source regions having the first conductivity type formed inside the well region and adjacent the active trenches. Electrical contact to the conductive shield electrode can be made inside the active area. The device can also include a perimeter trench extending at least partially around the active trenches such that at least some of the active trenches are perpendicular to the perimeter trench, gate fingers extending from a perimeter gate poly runner located in said perimeter trench, and shield poly fingers extending from a perimeter shield poly runner located in the perimeter trench. The gate fingers are staggered with respect to the shield poly fingers.

摘要翻译： 半导体功率器件包括第一导电类型的漂移区域，在漂移区域上方延伸并具有与第一导电类型相反的第二导电类型的阱区域，有源沟槽延伸穿过阱区域并进入漂移区域，其中有源沟槽 定义一个活动区域。 在每个有源沟槽内部形成有沿第一沟槽侧壁和绝缘的第一导电栅电极，与第二沟槽侧壁绝缘的第二导电栅电极和与第二沟槽侧壁绝缘的第二导电栅电极，以及设置在第一和第二导电之间的导电屏蔽电极 栅电极，其中所述屏蔽电极与所述第一和第二导电栅电极绝缘并且在所述沟槽内更深地延伸。 该器件还包括形成在阱区内并与有源沟槽相邻的具有第一导电类型的源区。 可以在有源区域内与导电屏蔽电极电接触。 该装置还可以包括至少部分地围绕有源沟槽延伸的周边沟槽，使得至少一些有源沟槽垂直于周边沟槽，从位于所述周边沟槽中的周边门多晶硅浇道延伸的栅极指状物以及屏蔽聚 手指从位于周边沟槽中的周边屏蔽多晶硅转轮延伸。 门指与屏蔽多指交错交错。

公开(公告)号：US07923776B2

公开(公告)日：2011-04-12

申请号：US12698746

申请日：2010-02-02

申请人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Boguslaw Kocon ,  Steven P. Sapp ,  Dean E. Probst ,  Nathan L. Kraft ,  Thomas E. Grebs ,  Rodney S. Ridley ,  Gary M. Dolny ,  Bruce D. Marchant ,  Joseph A. Yedinak

发明人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Boguslaw Kocon ,  Steven P. Sapp ,  Dean E. Probst ,  Nathan L. Kraft ,  Thomas E. Grebs ,  Rodney S. Ridley ,  Gary M. Dolny ,  Bruce D. Marchant ,  Joseph A. Yedinak

IPC分类号： H01L29/772

CPC分类号： H01L29/7827 ,  H01L21/26586 ,  H01L29/0878 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/872

摘要： A field effect transistor includes a body region of a first conductivity type in a semiconductor region of a second conductivity type. A gate trench extends through the body region and terminating within the semiconductor region. A source region of the second conductivity type extends in the body region adjacent the gate trench. The source region and an interface between the body region and the semiconductor region define a channel region therebetween which extends along the gate trench sidewall. A channel enhancement region of the second conductivity type is formed adjacent the gate trench. The channel enhancement region partially extends into a lower portion of the channel region to thereby reduce a resistance of the channel region.

摘要翻译： 场效应晶体管包括在第二导电类型的半导体区域中的第一导电类型的体区。 栅极沟槽延伸穿过身体区域并终止在半导体区域内。 第二导电类型的源极区域在与栅极沟槽相邻的体区中延伸。 源极区域和主体区域和半导体区域之间的界面限定其间沿着栅极沟槽侧壁延伸的沟道区域。 第二导电类型的沟道增强区域形成在栅极沟槽附近。 沟道增强区域部分地延伸到沟道区的下部，从而减小沟道区的电阻。

公开(公告)号：US20090008709A1

公开(公告)日：2009-01-08

申请号：US11963668

申请日：2007-12-21

申请人： Joseph A. Yedinak ,  Nathan L. Kraft

发明人： Joseph A. Yedinak ,  Nathan L. Kraft

IPC分类号： H01L29/78

CPC分类号： H01L29/407 ,  H01L21/26586 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4933 ,  H01L29/495 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7828 ,  H01L29/7831 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H02M3/00 ,  H02M3/33592 ,  H02M7/48 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor power device includes a drift region of a first conductivity type, a well region extending above the drift region and having a second conductivity type opposite the first conductivity type, active trenches extending through the well region and into the drift region where the active trenches define an active area. Inside each of the active trenches is formed a first conductive gate electrode disposed along and insulated from a first trench sidewall, a second conductive gate electrode disposed along and insulated from a second trench sidewall, and a conductive shield electrode disposed between the first and second conductive gate electrodes, wherein the shield electrode is insulated from and extends deeper inside the trench than the first and second conductive gate electrodes. The device also includes source regions having the first conductivity type formed inside the well region and adjacent the active trenches. Electrical contact to the conductive shield electrode can be made inside the active area. The device can also include a perimeter trench extending at least partially around the active trenches such that at least some of the active trenches are perpendicular to the perimeter trench, gate fingers extending from a perimeter gate poly runner located in said perimeter trench, and shield poly fingers extending from a perimeter shield poly runner located in the perimeter trench. The gate fingers are staggered with respect to the shield poly fingers.

摘要翻译： 半导体功率器件包括第一导电类型的漂移区域，在漂移区域上方延伸并具有与第一导电类型相反的第二导电类型的阱区域，有源沟槽延伸穿过阱区域并进入漂移区域，其中有源沟槽 定义一个活动区域。 在每个有源沟槽内部形成有沿第一沟槽侧壁和绝缘的第一导电栅电极，与第二沟槽侧壁绝缘的第二导电栅电极和与第二沟槽侧壁绝缘的第二导电栅电极，以及设置在第一和第二导电之间的导电屏蔽电极 栅电极，其中所述屏蔽电极与所述第一和第二导电栅电极绝缘并且在所述沟槽内更深地延伸。 该器件还包括形成在阱区内并与有源沟槽相邻的具有第一导电类型的源区。 可以在有源区域内与导电屏蔽电极电接触。 该装置还可以包括至少部分地围绕有源沟槽延伸的周边沟槽，使得至少一些有源沟槽垂直于周边沟槽，从位于所述周边沟槽中的周边门多晶硅浇道延伸的栅极指状物以及屏蔽聚 手指从位于周边沟槽中的周边屏蔽多晶硅转轮延伸。 门指与屏蔽多指交错交错。

公开(公告)号：US20090008706A1

公开(公告)日：2009-01-08

申请号：US11964419

申请日：2007-12-26

申请人： Joseph A. Yedinak ,  Nathan L. Kraft ,  Christopher B. Kocon ,  Richard Stokes

发明人： Joseph A. Yedinak ,  Nathan L. Kraft ,  Christopher B. Kocon ,  Richard Stokes

IPC分类号： H01L29/78 ,  H01L21/28

CPC分类号： H01L29/407 ,  H01L21/26586 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4933 ,  H01L29/495 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7828 ,  H01L29/7831 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H02M3/00 ,  H02M3/33592 ,  H02M7/48 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor power device includes active trenches that define an active area and an edge area that is located outside of the active area. The active trenches include a lower shield poly, an upper gate poly, a first oxide layer and a second oxide layer wherein the first oxide layer separates the lower shield poly from the upper gate poly and the second oxide layer covers the upper gate poly. The lower shield poly, upper gate poly, first oxide layer and second oxide layer conform to the shape of the active trench and extend from the active trench to a surface of the edge area. The edge area includes a first opening that extends through the first oxide layer to the lower shield poly and a second opening that extends through the second oxide layer to the upper gate poly. The first opening is filled with a conductive material that makes electrical contact with the lower shield poly and the second opening is filled with conductive material that makes electrical contact with the upper gate poly. The lower shield poly is electrically insulated from the substrate. The second oxide layer can be directly over the upper gate poly, the upper gate poly can be directly over the first oxide layer, the first oxide layer can be directly over the lower shield poly, and the first opening can be lower than the second opening. The device can further include a perimeter trench with extensions in the longitudinal direction that are staggered with respect to the active trenches so that there can be offset between the extensions of the perimeter trench and the active trenches.

摘要翻译： 半导体功率器件包括有源沟槽，其限定有源区域和位于有源区域外部的边缘区域。 有源沟槽包括下屏蔽多晶硅，上栅极多晶硅，第一氧化物层和第二氧化物层，其中第一氧化物层将下屏蔽多晶硅与上栅极多晶硅分开，第二氧化物层覆盖上栅极聚合物。 下屏蔽多晶硅，上栅极多晶硅，第一氧化物层和第二氧化物层符合有源沟槽的形状并从有源沟槽延伸到边缘区域的表面。 边缘区域包括延伸穿过第一氧化物层到下屏蔽多孔体的第一开口和延伸穿过第二氧化物层到第二氧化物层的第二开口到上部栅极聚合物。 第一开口填充有导电材料，其与下屏蔽多孔电接触，并且第二开口填充有与上栅极聚电接触的导电材料。 下屏蔽多晶硅与基板电绝缘。 第二氧化物层可以直接在上栅极多晶硅上方，上栅极多晶硅可以直接在第一氧化物层上方，第一氧化物层可以直接在下屏蔽多晶硅上方，并且第一开口可以低于第二开口 。 该装置还可以包括在纵向方向上延伸的周边沟槽，其相对于有源沟槽交错排列，使得可以在周边沟槽和有源沟槽的延伸部之间偏移。

公开(公告)号：US08889511B2

公开(公告)日：2014-11-18

申请号：US13219229

申请日：2011-08-26

申请人： Joseph A. Yedinak ,  Nathan L. Kraft

发明人： Joseph A. Yedinak ,  Nathan L. Kraft

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L29/06 ,  H01L29/66 ,  H01L21/3065 ,  H01L29/40 ,  H01L29/739 ,  H01L21/683 ,  H01L21/311 ,  H02M3/335 ,  H01L29/49 ,  H01L23/498 ,  H01L29/423 ,  H01L29/165 ,  H01L21/265 ,  H02M3/00 ,  H01L29/417 ,  H02M7/48 ,  H01L23/495 ,  H01L29/10

CPC分类号： H01L29/407 ,  H01L21/26586 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4933 ,  H01L29/495 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7828 ,  H01L29/7831 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H02M3/00 ,  H02M3/33592 ,  H02M7/48 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2924/00014

摘要： In one general aspect, a method can include forming a shield dielectric layer in a trench in a semiconductor substrate, forming a shield electrode on at least a portion of the shield dielectric layer, and etching the shield dielectric layer so that a portion of the shield dielectric layer is recessed in the trench. The method can include forming a gate dielectric layer on the recessed portion of the shield dielectric layer in the trench, forming a first conductive gate electrode on a first side of the shield electrode and insulated from a first sidewall of the trench by the gate dielectric layer, and forming a second conductive gate electrode on a second side of the shield electrode and insulated from a second sidewall of the trench by the gate dielectric layer.

摘要翻译： 在一个一般方面，一种方法可以包括在半导体衬底中的沟槽中形成屏蔽电介质层，在屏蔽电介质层的至少一部分上形成屏蔽电极，以及蚀刻屏蔽电介质层，使屏蔽层的一部分 电介质层凹陷在沟槽中。 该方法可以包括在沟槽中的屏蔽电介质层的凹陷部分上形成栅极电介质层，在屏蔽电极的第一侧上形成第一导电栅电极，并通过栅介质层与沟槽的第一侧壁绝缘 并且在屏蔽电极的第二侧上形成第二导电栅电极，并通过栅介质层与沟槽的第二侧壁绝缘。

公开(公告)号：US08441069B2

公开(公告)日：2013-05-14

申请号：US13279085

申请日：2011-10-21

申请人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Boguslaw Kocon ,  Steven P. Sapp ,  Dean E. Probst ,  Nathan L. Kraft ,  Thomas E. Grebs ,  Rodney S. Ridley ,  Gary M. Dolny ,  Bruce D. Marchant ,  Joseph A. Yedinak

发明人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Boguslaw Kocon ,  Steven P. Sapp ,  Dean E. Probst ,  Nathan L. Kraft ,  Thomas E. Grebs ,  Rodney S. Ridley ,  Gary M. Dolny ,  Bruce D. Marchant ,  Joseph A. Yedinak

IPC分类号： H01L29/772

CPC分类号： H01L29/7827 ,  H01L21/26586 ,  H01L29/0878 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/872

摘要： A field effect transistor includes a gate trench extending into a semiconductor region. The gate trench has a recessed gate electrode disposed therein. A source region in the semiconductor region flanks each side of the gate trench. A conductive material fills an upper portion of the gate trench so as to make electrical contact with the source regions along upper sidewalls of the gate trench. The conductive material is insulated from the recessed gate electrode.

摘要翻译： 场效应晶体管包括延伸到半导体区域中的栅极沟槽。 栅极沟槽具有设置在其中的凹陷栅电极。 半导体区域中的源极区域位于栅极沟槽的每一侧。 导电材料填充栅极沟槽的上部，以便沿着栅极沟槽的上侧壁与源极区域电接触。 导电材料与凹陷栅电极绝缘。

公开(公告)号：US20120220091A1

公开(公告)日：2012-08-30

申请号：US13418128

申请日：2012-03-12

申请人： Ashok Challa ,  Alan Elbanhawy ,  Thomas E. Grebs ,  Nathan L. Kraft ,  Dean E. Probst ,  Rodney S. Ridley ,  Steven P. Sapp ,  Qi Wang ,  Chongman Yun ,  J.G. Lee ,  Peter H. Wilson ,  Joseph A. Yedinak ,  J.Y. Jung ,  H.C. Jang ,  Babak S. Sani ,  Richard Stokes ,  Gary M. Dolny ,  John Mytych ,  Becky Losee ,  Adam Selsley ,  Robert Herrick ,  James J. Murphy ,  Gordon K. Madson ,  Bruce D. Marchant ,  Christopher L. Rexer ,  Christopher B. Kocon ,  Debra S. Woolsey

发明人： Ashok Challa ,  Alan Elbanhawy ,  Thomas E. Grebs ,  Nathan L. Kraft ,  Dean E. Probst ,  Rodney S. Ridley ,  Steven P. Sapp ,  Qi Wang ,  Chongman Yun ,  J.G. Lee ,  Peter H. Wilson ,  Joseph A. Yedinak ,  J.Y. Jung ,  H.C. Jang ,  Babak S. Sani ,  Richard Stokes ,  Gary M. Dolny ,  John Mytych ,  Becky Losee ,  Adam Selsley ,  Robert Herrick ,  James J. Murphy ,  Gordon K. Madson ,  Bruce D. Marchant ,  Christopher L. Rexer ,  Christopher B. Kocon ,  Debra S. Woolsey

IPC分类号： H01L21/336 ,  H01L21/311

CPC分类号： H01L29/407 ,  H01L21/26586 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4933 ,  H01L29/495 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7828 ,  H01L29/7831 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H02M3/00 ,  H02M3/33592 ,  H02M7/48 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2924/00014

摘要： A method for forming thick oxide at the bottom of a trench formed in a semiconductor substrate includes forming a conformal oxide film by a sub-atmospheric chemical vapor deposition process that fills the trench and covers a top surface of the substrate. The method also includes etching the oxide film off the top surface of the substrate and inside the trench to leave a substantially flat layer of oxide having a target thickness at the bottom of the trench.

摘要翻译： 在半导体衬底中形成的沟槽的底部形成厚氧化物的方法包括通过填充沟槽并覆盖衬底顶表面的亚大气压化学气相沉积工艺形成共形氧化膜。 该方法还包括将氧化膜从衬底的顶表面和沟槽内部蚀刻，以留下在沟槽底部具有目标厚度的基本平坦的氧化物层。

公开(公告)号：US20120104490A1

公开(公告)日：2012-05-03

申请号：US13279085

申请日：2011-10-21

申请人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Boguslaw Kocon ,  Steven P. Sapp ,  Dean E. Probst ,  Nathan L. Kraft ,  Thomas E. Grebs ,  Rodney S. Ridley ,  Gary M. Dolny ,  Bruce D. Marchant ,  Joseph A. Yedinak

发明人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Boguslaw Kocon ,  Steven P. Sapp ,  Dean E. Probst ,  Nathan L. Kraft ,  Thomas E. Grebs ,  Rodney S. Ridley ,  Gary M. Dolny ,  Bruce D. Marchant ,  Joseph A. Yedinak

IPC分类号： H01L29/78 ,  H01L21/28

CPC分类号： H01L29/7827 ,  H01L21/26586 ,  H01L29/0878 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/872

摘要： A field effect transistor includes a body region of a first conductivity type over a semiconductor region of a second conductivity type. A gate trench extends through the body region and terminates within the semiconductor region. At least one conductive shield electrode is disposed in the gate trench. A gate electrode is disposed in the gate trench over but insulated from the at least one conductive shield electrode. A shield dielectric layer insulates the at lease one conductive shield electrode from the semiconductor region. A gate dielectric layer insulates the gate electrode from the body region. The shield dielectric layer is formed such that it flares out and extends directly under the body region.

摘要翻译： 场效应晶体管包括在第二导电类型的半导体区域上的第一导电类型的体区。 栅极沟槽延伸穿过身体区域并终止在半导体区域内。 至少一个导电屏蔽电极设置在栅极沟槽中。 栅极电极设置在栅极沟槽中，但与至少一个导电屏蔽电极绝缘。 屏蔽介电层绝缘至少一个导电屏蔽电极与半导体区域。 栅极电介质层使栅电极与体区绝缘。 屏蔽电介质层形成为使其伸出并直接延伸到身体区域下方。

公开(公告)号：US20110312166A1

公开(公告)日：2011-12-22

申请号：US13219281

申请日：2011-08-26

申请人： Joseph A. Yedinak ,  Nathan L. Kraft ,  Christopher B. Kocon ,  Richard Stokes

发明人： Joseph A. Yedinak ,  Nathan L. Kraft ,  Christopher B. Kocon ,  Richard Stokes

IPC分类号： H01L21/20

CPC分类号： H01L29/407 ,  H01L21/26586 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4933 ,  H01L29/495 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7828 ,  H01L29/7831 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H02M3/00 ,  H02M3/33592 ,  H02M7/48 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2924/00014

摘要： Methods of manufacturing power semiconductor devices include forming an epitaxial and dielectric layer, patterning and etching the dielectric layer, forming a first oxide layer, forming a first conductive layer on top of the first oxide layer, etching the first conductive layer away inside an active trench, forming a second oxide layer and second conductive layer. The second conductive layer does not extend completely over the first conductive layer in a first region outside of the active trench. The methods further include forming a third oxide layer over the second conductive layer, etching a first opening through the third oxide layer exposing the second conductive layer outside the active trench, etching a second opening through the second oxide layer outside the active trench in the first region exposing the first conductive layer but not the second conductive layer, and filling the first and second openings with conductive material.

摘要翻译： 制造功率半导体器件的方法包括形成外延和电介质层，图案化和蚀刻介电层，形成第一氧化物层，在第一氧化物层的顶部形成第一导电层，在有源沟槽内部蚀刻第一导电层 ，形成第二氧化物层和第二导电层。 第二导电层在有源沟槽外部的第一区域中不完全延伸到第一导电层上。 所述方法还包括在所述第二导电层上形成第三氧化物层，蚀刻通过所述第三氧化物层的第一开口，将所述第二导电层暴露于所述有源沟槽外部，在所述第一导电层中的所述有源沟槽外蚀刻穿过所述第二氧化物层的第二开口 区域暴露第一导电层而不暴露第二导电层，以及用导电材料填充第一和第二开口。

公开(公告)号：US20110312138A1

公开(公告)日：2011-12-22

申请号：US13219229

申请日：2011-08-26

申请人： Joseph A. Yedinak ,  Nathan L. Kraft

发明人： Joseph A. Yedinak ,  Nathan L. Kraft

IPC分类号： H01L21/336

CPC分类号： H01L29/407 ,  H01L21/26586 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4933 ,  H01L29/495 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7828 ,  H01L29/7831 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H02M3/00 ,  H02M3/33592 ,  H02M7/48 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2924/00014

摘要： Methods of manufacturing power semiconductor devices include forming trenches in a substrate, depositing a shield oxide layer that conforms to the trenches, depositing a gate polysilicon layer into the trenches, etching the gate polysilicon layer so that the gate polysilicon layer is recessed in the trench, etching the shield oxide layer so that the shield oxide layer is recessed in the trench and lower than the gate polysilicon layer, depositing a layer of gate oxide across the top of the substrate, sidewalls of the trenches and troughs inside the trenches leaving a recess, depositing shield polysilicon in the recess, etching the shield polysilicon layer so that the shield polysilicon layer is recessed in the trench and higher than the gate polysilicon layer, forming a well region, and forming a source region. The well region can be formed with a −p-well implant. The source region can be performed with an n+ source implant.

摘要翻译： 制造功率半导体器件的方法包括在衬底中形成沟槽，沉积符合沟槽的屏蔽氧化物层，在栅极中沉积栅极多晶硅层，蚀刻栅极多晶硅层，使得栅极多晶硅层在沟槽中凹陷， 蚀刻屏蔽氧化物层，使得屏蔽氧化物层凹陷在沟槽中并且低于栅极多晶硅层，在栅极的顶部沉积栅极氧化物层，沟槽的侧壁和槽内的沟槽离开凹槽， 将屏蔽多晶硅沉积在凹槽中，蚀刻屏蔽多晶硅层，使得屏蔽多晶硅层凹陷在沟槽中并且高于栅极多晶硅层，形成阱区，并形成源极区。 阱区可以用-p-阱植入物形成。 源区域可以用n +源植入物进行。